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ble: fix cca for esp32c2

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This commit is contained in:
cjin 2023-06-15 10:28:25 +08:00
parent 5e3488396a
commit 7b70e2eb34
4 changed files with 20 additions and 7 deletions
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9
components/bt/controller/esp32c2/bt.c
View File

@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -54,6 +54,8 @@
#include "soc/syscon_reg.h" #include "soc/syscon_reg.h"
#include "soc/dport_access.h" #include "soc/dport_access.h"
#include "hal/efuse_ll.h"
/* Macro definition /* Macro definition
************************************************************************ ************************************************************************
*/ */
@ -993,6 +995,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
return (esp_power_level_t)tx_level; return (esp_power_level_t)tx_level;
} }
uint8_t esp_ble_get_chip_rev_version(void)
{
return efuse_ll_get_chip_wafer_version_minor();
}
#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true) #if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)

2
components/bt/controller/lib_esp32c2/esp32c2-bt-lib

@ -1 +1 @@
Subproject commit c7c2303826c5ad853a3dbaf39a6e88e55a379ef5 Subproject commit c5f08bc94d0edbb0b3c66d07f5c097b0ccb1fa07

14
components/bt/include/esp32c2/include/esp_bt.h
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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -145,7 +145,14 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
*/ */
esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle); esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
#define CONFIG_VERSION 0x20230113 /**
* @brief Get version number from chip revision number
*
* @return uint8_t version_number
*/
uint8_t esp_ble_get_chip_rev_version(void);
#define CONFIG_VERSION 0x20230629
#define CONFIG_MAGIC 0x5A5AA5A5 #define CONFIG_MAGIC 0x5A5AA5A5
/** /**
@ -203,11 +210,11 @@ typedef struct {
uint8_t cca_drop_mode; uint8_t cca_drop_mode;
int8_t cca_low_tx_pwr; int8_t cca_low_tx_pwr;
uint8_t main_xtal_freq; uint8_t main_xtal_freq;
uint8_t version_num;
uint8_t ignore_wl_for_direct_adv; uint8_t ignore_wl_for_direct_adv;
uint32_t config_magic; uint32_t config_magic;
} esp_bt_controller_config_t; } esp_bt_controller_config_t;
#define BT_CONTROLLER_INIT_CONFIG_DEFAULT() { \ #define BT_CONTROLLER_INIT_CONFIG_DEFAULT() { \
.config_version = CONFIG_VERSION, \ .config_version = CONFIG_VERSION, \
.ble_ll_resolv_list_size = CONFIG_BT_LE_LL_RESOLV_LIST_SIZE, \ .ble_ll_resolv_list_size = CONFIG_BT_LE_LL_RESOLV_LIST_SIZE, \
@ -255,6 +262,7 @@ typedef struct {
.dis_scan_backoff = NIMBLE_DISABLE_SCAN_BACKOFF, \ .dis_scan_backoff = NIMBLE_DISABLE_SCAN_BACKOFF, \
.ble_scan_classify_filter_enable = 0, \ .ble_scan_classify_filter_enable = 0, \
.main_xtal_freq = CONFIG_XTAL_FREQ, \ .main_xtal_freq = CONFIG_XTAL_FREQ, \
.version_num = esp_ble_get_chip_rev_version(), \
.ignore_wl_for_direct_adv = 0, \ .ignore_wl_for_direct_adv = 0, \
.config_magic = CONFIG_MAGIC, \ .config_magic = CONFIG_MAGIC, \
} }

2
components/esp_rom/esp32c2/ld/esp32c2.rom.ld
View File

@ -810,7 +810,6 @@ r_ble_ll_event_dbuf_overflow = 0x40000f50;
r_ble_ll_event_send = 0x40000f54; r_ble_ll_event_send = 0x40000f54;
r_ble_ll_event_tx_pkt = 0x40000f58; r_ble_ll_event_tx_pkt = 0x40000f58;
r_ble_ll_ext_adv_phy_mode_to_local_phy = 0x40000f5c; r_ble_ll_ext_adv_phy_mode_to_local_phy = 0x40000f5c;
r_ble_ll_ext_conn_create = 0x40000f60;
r_ble_ll_ext_scan_parse_adv_info = 0x40000f64; r_ble_ll_ext_scan_parse_adv_info = 0x40000f64;
r_ble_ll_ext_scan_parse_aux_ptr = 0x40000f68; r_ble_ll_ext_scan_parse_aux_ptr = 0x40000f68;
r_ble_ll_flush_pkt_queue = 0x40000f6c; r_ble_ll_flush_pkt_queue = 0x40000f6c;
@ -912,7 +911,6 @@ r_ble_ll_read_local_p256_pub_key = 0x4000111c;
r_ble_ll_read_rf_path_compensation = 0x40001120; r_ble_ll_read_rf_path_compensation = 0x40001120;
r_ble_ll_read_supp_features = 0x40001124; r_ble_ll_read_supp_features = 0x40001124;
r_ble_ll_read_supp_states = 0x40001128; r_ble_ll_read_supp_states = 0x40001128;
r_ble_ll_reset = 0x40001130;
r_ble_ll_resolv_clear_all_pl_bit = 0x40001134; r_ble_ll_resolv_clear_all_pl_bit = 0x40001134;
r_ble_ll_resolv_clear_all_wl_bit = 0x40001138; r_ble_ll_resolv_clear_all_wl_bit = 0x40001138;
r_ble_ll_resolv_enable_cmd = 0x40001140; r_ble_ll_resolv_enable_cmd = 0x40001140;