refactor(lp_ana_periph): sync the reg names to TRM (part2)

This commit is contained in:
laokaiyao 2024-06-24 15:29:52 +08:00
parent 1bab9da223
commit 7ac331fea7
7 changed files with 35 additions and 44 deletions

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@ -755,10 +755,10 @@ static inline void touch_ll_filter_enable(bool enable)
*/
static inline void touch_ll_force_update_benchmark(uint32_t benchmark)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_filter3, touch_baseline_sw, benchmark);
LP_ANA_PERI.touch_filter3.touch_update_baseline_sw = 1;
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_filter3, touch_benchmark_sw, benchmark);
LP_ANA_PERI.touch_filter3.touch_update_benchmark_sw = 1;
// waiting for update
while (LP_ANA_PERI.touch_filter3.touch_update_baseline_sw);
while (LP_ANA_PERI.touch_filter3.touch_update_benchmark_sw);
}
/************************ Waterproof register setting ************************/

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@ -619,13 +619,13 @@ extern "C" {
* need_des
*/
#define LP_ANALOG_PERI_TOUCH_FILTER1_REG (DR_REG_LP_ANALOG_PERI_BASE + 0x110)
/** LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BASELINE_EN : R/W; bitpos: [0]; default: 0;
/** LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BENCHMARK_EN : R/W; bitpos: [0]; default: 0;
* Reserved
*/
#define LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BASELINE_EN (BIT(0))
#define LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BASELINE_EN_M (LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BASELINE_EN_V << LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BASELINE_EN_S)
#define LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BASELINE_EN_V 0x00000001U
#define LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BASELINE_EN_S 0
#define LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BENCHMARK_EN (BIT(0))
#define LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BENCHMARK_EN_M (LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BENCHMARK_EN_V << LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BENCHMARK_EN_S)
#define LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BENCHMARK_EN_V 0x00000001U
#define LP_ANALOG_PERI_TOUCH_NN_DISUPDATE_BENCHMARK_EN_S 0
/** LP_ANALOG_PERI_TOUCH_HYSTERESIS : R/W; bitpos: [2:1]; default: 0;
* need_des
*/
@ -727,20 +727,20 @@ extern "C" {
* need_des
*/
#define LP_ANALOG_PERI_TOUCH_FILTER3_REG (DR_REG_LP_ANALOG_PERI_BASE + 0x118)
/** LP_ANALOG_PERI_TOUCH_BASELINE_SW : R/W; bitpos: [15:0]; default: 0;
/** LP_ANALOG_PERI_TOUCH_BENCHMARK_SW : R/W; bitpos: [15:0]; default: 0;
* need_des
*/
#define LP_ANALOG_PERI_TOUCH_BASELINE_SW 0x0000FFFFU
#define LP_ANALOG_PERI_TOUCH_BASELINE_SW_M (LP_ANALOG_PERI_TOUCH_BASELINE_SW_V << LP_ANALOG_PERI_TOUCH_BASELINE_SW_S)
#define LP_ANALOG_PERI_TOUCH_BASELINE_SW_V 0x0000FFFFU
#define LP_ANALOG_PERI_TOUCH_BASELINE_SW_S 0
/** LP_ANALOG_PERI_TOUCH_UPDATE_BASELINE_SW : WT; bitpos: [16]; default: 0;
#define LP_ANALOG_PERI_TOUCH_BENCHMARK_SW 0x0000FFFFU
#define LP_ANALOG_PERI_TOUCH_BENCHMARK_SW_M (LP_ANALOG_PERI_TOUCH_BENCHMARK_SW_V << LP_ANALOG_PERI_TOUCH_BENCHMARK_SW_S)
#define LP_ANALOG_PERI_TOUCH_BENCHMARK_SW_V 0x0000FFFFU
#define LP_ANALOG_PERI_TOUCH_BENCHMARK_SW_S 0
/** LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_SW : WT; bitpos: [16]; default: 0;
* need_des
*/
#define LP_ANALOG_PERI_TOUCH_UPDATE_BASELINE_SW (BIT(16))
#define LP_ANALOG_PERI_TOUCH_UPDATE_BASELINE_SW_M (LP_ANALOG_PERI_TOUCH_UPDATE_BASELINE_SW_V << LP_ANALOG_PERI_TOUCH_UPDATE_BASELINE_SW_S)
#define LP_ANALOG_PERI_TOUCH_UPDATE_BASELINE_SW_V 0x00000001U
#define LP_ANALOG_PERI_TOUCH_UPDATE_BASELINE_SW_S 16
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_SW (BIT(16))
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_SW_M (LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_SW_V << LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_SW_S)
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_SW_V 0x00000001U
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_SW_S 16
/** LP_ANALOG_PERI_TOUCH_SLP0_REG register
* need_des

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@ -510,10 +510,10 @@ typedef union {
*/
typedef union {
struct {
/** touch_nn_disupdate_baseline_en : R/W; bitpos: [0]; default: 0;
/** touch_nn_disupdate_benchmark_en : R/W; bitpos: [0]; default: 0;
* Reserved
*/
uint32_t touch_nn_disupdate_baseline_en:1;
uint32_t touch_nn_disupdate_benchmark_en:1;
/** touch_hysteresis : R/W; bitpos: [2:1]; default: 0;
* need_des
*/
@ -585,14 +585,14 @@ typedef union {
*/
typedef union {
struct {
/** touch_baseline_sw : R/W; bitpos: [15:0]; default: 0;
/** touch_benchmark_sw : R/W; bitpos: [15:0]; default: 0;
* need_des
*/
uint32_t touch_baseline_sw:16;
/** touch_update_baseline_sw : WT; bitpos: [16]; default: 0;
uint32_t touch_benchmark_sw:16;
/** touch_update_benchmark_sw : WT; bitpos: [16]; default: 0;
* need_des
*/
uint32_t touch_update_baseline_sw:1;
uint32_t touch_update_benchmark_sw:1;
uint32_t reserved_17:15;
};
uint32_t val;
@ -750,7 +750,7 @@ typedef union {
/** touch_data_sel : R/W; bitpos: [9:8]; default: 0;
* The type of the output data for debugging
* 0/1: raw data
* 2: baseline
* 2: benchmark
* 3: smooth data
*/
uint32_t touch_data_sel:2;

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@ -1,16 +1,8 @@
// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_SENS_REG_H_
#define _SOC_SENS_REG_H_
@ -602,7 +594,7 @@ extern "C" {
#define SENS_TOUCH_DENOISE_END_V 0x1
#define SENS_TOUCH_DENOISE_END_S 18
/* SENS_TOUCH_DATA_SEL : R/W ;bitpos:[17:16] ;default: 2'd0 ; */
/*description: 3: smooth data 2: baseline 1,0: raw_data.*/
/*description: 3: smooth data 2: benchmark 1,0: raw_data.*/
#define SENS_TOUCH_DATA_SEL 0x00000003
#define SENS_TOUCH_DATA_SEL_M ((SENS_TOUCH_DATA_SEL_V)<<(SENS_TOUCH_DATA_SEL_S))
#define SENS_TOUCH_DATA_SEL_V 0x3
@ -1378,8 +1370,8 @@ extern "C" {
#define SENS_SAR_HALL_CTRL_REG (DR_REG_SENS_BASE + 0xFC)
/* SENS_HALL_PHASE_FORCE : R/W ;bitpos:[31] ;default: 1'b1 ; */
/*description: 1: HALL PHASE is controlled by SW 0: HALL PHASE is controlled by FSM in ULP-cop
rocessor.*/
/*description: 1: HALL PHASE is controlled by SW 0: HALL PHASE is controlled by FSM in
ULP-coprocessor.*/
#define SENS_HALL_PHASE_FORCE (BIT(31))
#define SENS_HALL_PHASE_FORCE_M (BIT(31))
#define SENS_HALL_PHASE_FORCE_V 0x1

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@ -217,7 +217,7 @@ typedef volatile struct sens_dev_s {
struct {
uint32_t touch_outen : 15; /*touch controller output enable*/
uint32_t touch_status_clr : 1; /*clear all touch active status*/
uint32_t touch_data_sel : 2; /*3: smooth data 2: baseline 1,0: raw_data*/
uint32_t touch_data_sel : 2; /*3: smooth data 2: benchmark 1,0: raw_data*/
uint32_t touch_denoise_end : 1; /*touch_denoise_done*/
uint32_t touch_unit_end : 1; /*touch_unit_done*/
uint32_t touch_approach_pad2 : 4; /*indicate which pad is approach pad2*/

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@ -443,7 +443,7 @@ The Touch Element Wakeup example is available in `system/light_sleep` directory.
// ESP_ERROR_CHECK(touch_element_enable_light_sleep(&sleep_config));
ESP_ERROR_CHECK(touch_element_enable_deep_sleep(button_handle[0], &sleep_config));
// ESP_ERROR_CHECK(touch_element_sleep_enable_wakeup_calibration(button_handle[0], false)); // (optional) Disable wakeup calibration to prevent updating the baseline to a wrong value
// ESP_ERROR_CHECK(touch_element_sleep_enable_wakeup_calibration(button_handle[0], false)); // (optional) Disable wakeup calibration to prevent updating the benchmark to a wrong value
touch_element_start();

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@ -687,7 +687,6 @@ components/soc/esp32s3/include/soc/rtc_io_reg.h
components/soc/esp32s3/include/soc/rtc_io_struct.h
components/soc/esp32s3/include/soc/sdmmc_pins.h
components/soc/esp32s3/include/soc/sdmmc_reg.h
components/soc/esp32s3/include/soc/sens_reg.h
components/soc/esp32s3/include/soc/sensitive_reg.h
components/soc/esp32s3/include/soc/sensitive_struct.h
components/soc/esp32s3/include/soc/soc_ulp.h