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https://github.com/espressif/esp-idf.git
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Replace non-multicore-aware rom funcs with multicore-aware funcs, ESP_LOG->ESP_EARLY_LOG fix, reserve ints used in wireless libs. Fixes WiFi crashing
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@ -228,8 +228,11 @@ void start_cpu1_default(void)
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while (port_xSchedulerRunning[0] == 0) {
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;
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}
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//Take care putting stuff here: if asked, FreeRTOS will happily tell you the scheduler
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//has started, but it isn't active *on this CPU* yet.
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esp_crosscore_int_init();
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ESP_LOGI(TAG, "Starting scheduler on APP CPU.");
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ESP_EARLY_LOGI(TAG, "Starting scheduler on APP CPU.");
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xPortStartScheduler();
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}
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#endif //!CONFIG_FREERTOS_UNICORE
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@ -106,8 +106,8 @@ const static int_desc_t int_desc[32]={
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{ 1, INTTP_NA, {INT6RES, INT6RES } }, //6
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{ 1, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //7
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //8
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //9
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{ 1, INTTP_EDGE , {INTDESC_RESVD, INTDESC_NORMAL} }, //10
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //9 //FRC1
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{ 1, INTTP_EDGE , {INTDESC_RESVD, INTDESC_RESVD } }, //10 //FRC2
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{ 3, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //11
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //12
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //13
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@ -721,7 +721,18 @@ void esp_intr_noniram_enable()
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::"r"(intmask):"a3");
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}
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//These functions are provided in ROM, but the ROM-based functions use non-multicore-capable
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//virtualized interrupt levels. Thus, we disable them in the ld file and provide working
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//equivalents here.
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void ets_isr_unmask(unsigned int mask) {
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xt_ints_on(mask);
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}
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void ets_isr_mask(unsigned int mask) {
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xt_ints_off(mask);
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}
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@ -169,12 +169,6 @@ PROVIDE ( ets_get_xtal_scale = 0x4000856c );
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PROVIDE ( ets_install_putc1 = 0x40007d18 );
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PROVIDE ( ets_install_putc2 = 0x40007d38 );
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PROVIDE ( ets_install_uart_printf = 0x40007d28 );
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PROVIDE ( ets_intr_count = 0x3ffe03fc );
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PROVIDE ( ets_intr_lock = 0x400067b0 );
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PROVIDE ( ets_intr_unlock = 0x400067c4 );
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PROVIDE ( ets_isr_attach = 0x400067ec );
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PROVIDE ( ets_isr_mask = 0x400067fc );
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PROVIDE ( ets_isr_unmask = 0x40006808 );
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PROVIDE ( ets_post = 0x4000673c );
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PROVIDE ( ets_printf = 0x40007d54 );
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PROVIDE ( ets_readySet_ = 0x3ffe01f0 );
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@ -1730,6 +1724,13 @@ PROVIDE ( Xthal_intlevel = 0x3ff9c2b4 );
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PROVIDE ( xthal_memcpy = 0x4000c0bc );
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PROVIDE ( xthal_set_ccompare = 0x4000c058 );
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PROVIDE ( xthal_set_intclear = 0x4000c1ec );
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PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
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/*
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These functions are xtos-related (or call xtos-related functions) and do not play well
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with multicore FreeRTOS. Where needed, we provide alternatives that are multicore
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compatible.
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*/
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/*
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PROVIDE ( _xtos_alloca_handler = 0x40000010 );
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PROVIDE ( _xtos_cause3_handler = 0x40000dd8 );
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PROVIDE ( _xtos_c_handler_table = 0x3ffe0548 );
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@ -1748,13 +1749,19 @@ PROVIDE ( _xtos_return_from_exc = 0x4000c034 );
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PROVIDE ( _xtos_set_exception_handler = 0x4000074c );
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PROVIDE ( _xtos_set_interrupt_handler = 0x4000bf78 );
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PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bf34 );
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PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
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PROVIDE ( _xtos_set_min_intlevel = 0x4000bff8 );
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PROVIDE ( _xtos_set_vpri = 0x40000934 );
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PROVIDE ( _xtos_syscall_handler = 0x40000790 );
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PROVIDE ( _xtos_unhandled_exception = 0x4000c024 );
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PROVIDE ( _xtos_unhandled_interrupt = 0x4000c01c );
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PROVIDE ( _xtos_vpri_enabled = 0x3ffe0654 );
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PROVIDE ( ets_intr_count = 0x3ffe03fc );
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PROVIDE ( ets_intr_lock = 0x400067b0 );
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PROVIDE ( ets_intr_unlock = 0x400067c4 );
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PROVIDE ( ets_isr_attach = 0x400067ec );
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PROVIDE ( ets_isr_mask = 0x400067fc );
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PROVIDE ( ets_isr_unmask = 0x40006808 );
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*/
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/* Following are static data, but can be used, not generated by script <<<<< btdm data */
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PROVIDE ( ld_acl_env = 0x3ffb8258 );
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PROVIDE ( ld_active_ch_map = 0x3ffb8334 );
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@ -1 +1 @@
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Subproject commit 3a412c08af1ace47a58d1f8722a8fed5b8d3b944
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Subproject commit 5902a2229e5371aeea45c09e63ea5e233b58750f
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@ -158,8 +158,10 @@ xt_ints_on:
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#else
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movi a3, 0
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xsr a3, INTENABLE /* Disables all interrupts */
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rsync
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or a2, a3, a2 /* set bits in mask */
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wsr a2, INTENABLE /* Re-enable ints */
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rsync
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mov a2, a3 /* return prev mask */
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#endif
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#else
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@ -206,9 +208,11 @@ xt_ints_off:
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#else
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movi a4, 0
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xsr a4, INTENABLE /* Disables all interrupts */
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rsync
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or a3, a4, a2 /* set bits in mask */
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xor a3, a3, a2 /* invert bits in mask set in mask, essentially clearing them */
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wsr a3, INTENABLE /* Re-enable ints */
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rsync
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mov a2, a4 /* return prev mask */
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#endif
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#else
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