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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
ota: fix ota with flash encryption
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83dbaaaee8
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771a02da93
@ -450,16 +450,14 @@ out:
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}
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#endif // CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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#if !CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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extern void spi_common_set_dummy_output(esp_rom_spiflash_read_mode_t mode);
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#ifndef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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extern void spi_dummy_len_fix(uint8_t spi, uint8_t freqdiv);
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static void IRAM_ATTR flash_rom_init(void)
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extern uint8_t g_rom_spiflash_dummy_len_plus[];
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void IRAM_ATTR flash_rom_init(void)
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{
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uint32_t freqdiv = 0;
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esp_rom_spiflash_read_mode_t read_mode;
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#if CONFIG_IDF_TARGET_ESP32
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uint32_t dummy_bit = 0;
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#if CONFIG_ESPTOOLPY_FLASHFREQ_80M
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dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_80M;
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_40M
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@ -469,7 +467,6 @@ static void IRAM_ATTR flash_rom_init(void)
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_20M
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dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_20M;
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#endif
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#endif//CONFIG_IDF_TARGET_ESP32
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#if CONFIG_ESPTOOLPY_FLASHFREQ_80M
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freqdiv = 1;
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@ -481,37 +478,17 @@ static void IRAM_ATTR flash_rom_init(void)
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freqdiv = 4;
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#endif
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#if CONFIG_ESPTOOLPY_FLASHMODE_QIO
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read_mode = ESP_ROM_SPIFLASH_QIO_MODE;
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#elif CONFIG_ESPTOOLPY_FLASHMODE_QOUT
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read_mode = ESP_ROM_SPIFLASH_QOUT_MODE;
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#elif CONFIG_ESPTOOLPY_FLASHMODE_DIO
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read_mode = ESP_ROM_SPIFLASH_DIO_MODE;
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#elif CONFIG_ESPTOOLPY_FLASHMODE_DOUT
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read_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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g_rom_spiflash_dummy_len_plus[1] = dummy_bit;
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#else
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spi_dummy_len_fix(1, freqdiv);
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#endif //CONFIG_IDF_TARGET_ESP32
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#if !CONFIG_IDF_TARGET_ESP32S2 && !CONFIG_IDF_TARGET_ESP32
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spi_common_set_dummy_output(read_mode);
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#endif //!CONFIG_IDF_TARGET_ESP32S2
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esp_rom_spiflash_config_readmode(read_mode);
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esp_rom_spiflash_config_clk(freqdiv, 1);
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}
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#else
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static void IRAM_ATTR flash_rom_init(void)
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void IRAM_ATTR flash_rom_init(void)
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{
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return;
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}
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#endif // !CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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esp_err_t IRAM_ATTR spi_flash_write_encrypted(size_t dest_addr, const void *src, size_t size)
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{
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flash_rom_init();
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CHECK_WRITE_ADDRESS(dest_addr, size);
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const uint8_t *ssrc = (const uint8_t *)src;
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if ((dest_addr % 16) != 0) {
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@ -558,6 +535,7 @@ esp_err_t IRAM_ATTR spi_flash_write_encrypted(size_t dest_addr, const void *src,
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}
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spi_flash_guard_start();
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flash_rom_init();
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rc = esp_rom_spiflash_write_encrypted(row_addr, (uint32_t *)encrypt_buf, 32);
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spi_flash_guard_end();
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if (rc != ESP_ROM_SPIFLASH_RESULT_OK) {
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@ -732,7 +710,6 @@ out:
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esp_err_t IRAM_ATTR spi_flash_read_encrypted(size_t src, void *dstv, size_t size)
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{
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flash_rom_init();
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if (src + size > g_rom_flashchip.chip_size) {
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return ESP_ERR_INVALID_SIZE;
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}
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@ -331,7 +331,7 @@ UT_020:
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- psram
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UT_021:
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extends: .unit_test_32_template
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extends: .unit_test_template
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parallel: 2
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tags:
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- ESP32_IDF
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@ -1,4 +1,4 @@
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# This config is for ESP32 only (no ESP32-S2/S3 flash encryption support yet, ESP32-C3 has no psram)
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# This config is for ESP32 only
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CONFIG_IDF_TARGET="esp32"
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TEST_COMPONENTS=spi_flash
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TEST_GROUPS=flash_encryption
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