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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
feat(cache): added psram stack test
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@ -0,0 +1,4 @@
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set(srcs "test_cache_utils.c")
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idf_component_register(SRCS ${srcs}
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INCLUDE_DIRS include)
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@ -0,0 +1,32 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <esp_types.h>
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#include "esp_err.h"
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#include "esp_log.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Set addr space dirty
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*
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* @param[in] vaddr_start start addr of the space
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* @param[in] size size of the space
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*
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* @return
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* - ESP_OK
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* - ESP_ERR_INVALID_ARG: Currently no support for non-4B-aligned space
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*/
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esp_err_t test_set_buffer_dirty(intptr_t vaddr_start, size_t size);
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#ifdef __cplusplus
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}
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#endif
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@ -0,0 +1,28 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include <inttypes.h>
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#include "test_mm_utils.h"
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const static char *TAG = "cache_utils";
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esp_err_t test_set_buffer_dirty(intptr_t vaddr_start, size_t size)
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{
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if (((vaddr_start % 32) != 0) || ((size % 32) != 0)) {
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ESP_LOGE(TAG, "addr not 4B aligned");
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return ESP_ERR_INVALID_ARG;
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}
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uint32_t *vaddr = (uint32_t *)vaddr_start;
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printf("vaddr: %p, size: 0x%zx\n", vaddr, size);
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for (int i = 0; i < size / sizeof(uint32_t); i++) {
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vaddr[i] = 0xcc;
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}
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return ESP_OK;
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}
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@ -1,7 +1,7 @@
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# This is the project CMakeLists.txt file for the test subproject
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# This is the project CMakeLists.txt file for the test subproject
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cmake_minimum_required(VERSION 3.16)
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cmake_minimum_required(VERSION 3.16)
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set(EXTRA_COMPONENT_DIRS "$ENV{IDF_PATH}/tools/unit-test-app/components")
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set(EXTRA_COMPONENT_DIRS "$ENV{IDF_PATH}/components/esp_mm/test_apps/components")
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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project(mm_test)
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project(mm_test)
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@ -10,5 +10,5 @@ endif()
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# In order for the cases defined by `TEST_CASE` to be linked into the final elf,
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# In order for the cases defined by `TEST_CASE` to be linked into the final elf,
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# the component can be registered as WHOLE_ARCHIVE
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# the component can be registered as WHOLE_ARCHIVE
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idf_component_register(SRCS ${srcs}
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idf_component_register(SRCS ${srcs}
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PRIV_REQUIRES test_utils spi_flash esp_mm driver esp_timer
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PRIV_REQUIRES unity esp_partition spi_flash esp_mm driver esp_timer test_mm_utils
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WHOLE_ARCHIVE)
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WHOLE_ARCHIVE)
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@ -13,6 +13,7 @@
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#include "unity.h"
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#include "unity.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "esp_rom_sys.h"
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#include "esp_rom_sys.h"
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#include "esp_memory_utils.h"
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#include "esp_memory_utils.h"
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#include "esp_heap_caps.h"
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#include "esp_heap_caps.h"
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@ -21,6 +22,7 @@
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#include "esp_timer.h"
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#include "esp_timer.h"
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#include "esp_partition.h"
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#include "esp_partition.h"
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#include "esp_flash.h"
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#include "esp_flash.h"
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#include "test_mm_utils.h"
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const static char *TAG = "CACHE_TEST";
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const static char *TAG = "CACHE_TEST";
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@ -28,13 +30,13 @@ const static char *TAG = "CACHE_TEST";
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#define TEST_BUF {0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9}
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#define TEST_BUF {0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9}
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#define TEST_OFFSET 0x100000
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#if CONFIG_IDF_TARGET_ESP32S2
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#if CONFIG_IDF_TARGET_ESP32S2
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#define TEST_SYNC_START 0x3F500000
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#define TEST_SYNC_START (0x3F500000 + TEST_OFFSET)
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#define TEST_SYNC_SIZE 0xA80000
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#elif CONFIG_IDF_TARGET_ESP32S3
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define TEST_SYNC_START 0x3C000000
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#define TEST_SYNC_START (0x3C000000 + TEST_OFFSET)
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#define TEST_SYNC_SIZE 0x2000000
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#endif
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#endif
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#define TEST_SYNC_SIZE 0x8000
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#define RECORD_TIME_PREPARE() uint32_t __t1, __t2
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#define RECORD_TIME_PREPARE() uint32_t __t1, __t2
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@ -205,3 +207,54 @@ TEST_CASE("test cache msync work with Flash operation when XIP from PSRAM", "[ca
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TEST_ESP_OK(esp_timer_delete(timer));
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TEST_ESP_OK(esp_timer_delete(timer));
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}
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}
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#endif //#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_RODATA
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#endif //#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_RODATA
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#if CONFIG_SPIRAM
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/*---------------------------------------------------------------
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Test esp_cache_msync with PSRAM stack
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---------------------------------------------------------------*/
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static void test_msync_on_psram(void *arg)
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{
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SemaphoreHandle_t test_semphr = *(SemaphoreHandle_t *)arg;
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extern int _instruction_reserved_end;
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extern int _rodata_reserved_end;
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esp_rom_printf("_instruction_reserved_end: %p\n", &_instruction_reserved_end);
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esp_rom_printf("_rodata_reserved_end: %p\n", &_rodata_reserved_end);
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StackType_t *start_addr_stack = esp_cpu_get_sp();
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TEST_ASSERT(esp_ptr_external_ram(start_addr_stack));
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TEST_ESP_OK(test_set_buffer_dirty(TEST_SYNC_START, TEST_SYNC_SIZE));
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uint32_t sync_time = 0;
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RECORD_TIME_PREPARE();
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printf("doing msync...\n");
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RECORD_TIME_START();
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TEST_ESP_OK(esp_cache_msync((void *)TEST_SYNC_START, 0x8000, ESP_CACHE_MSYNC_FLAG_INVALIDATE));
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RECORD_TIME_END(sync_time);
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printf("msync done\n");
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uint32_t sync_time_us = GET_US_BY_CCOUNT(sync_time);
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printf("sync_time_us: %"PRId32"\n", sync_time_us);
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xSemaphoreGive(test_semphr);
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vTaskDelete(NULL);
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}
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TEST_CASE("test cache msync work with PSRAM stack", "[cache]")
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{
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SemaphoreHandle_t test_semphr = xSemaphoreCreateBinary();
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TEST_ASSERT(test_semphr);
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int size_stack = 1024 * 4;
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StackType_t *stack_for_task = (StackType_t *) heap_caps_calloc(1, size_stack, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT);
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printf("init_task: current addr_stack = %p, stack_for_task = %p\n", esp_cpu_get_sp(), stack_for_task);
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static StaticTask_t task_buf;
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xTaskCreateStaticPinnedToCore(test_msync_on_psram, "test_msync_on_psram", size_stack, &test_semphr, 5, stack_for_task, &task_buf, 0);
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xSemaphoreTake(test_semphr, portMAX_DELAY);
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vSemaphoreDelete(test_semphr);
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free(stack_for_task);
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}
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#endif //#if CONFIG_SPIRAM
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