diff --git a/components/bootloader_support/src/bootloader_random.c b/components/bootloader_support/src/bootloader_random.c
index 4bc121450e..33fecd77aa 100644
--- a/components/bootloader_support/src/bootloader_random.c
+++ b/components/bootloader_support/src/bootloader_random.c
@@ -8,7 +8,7 @@
 #include "esp_cpu.h"
 #include "soc/wdev_reg.h"
 
-#if defined CONFIG_IDF_TARGET_ESP32C6
+#if SOC_LP_TIMER_SUPPORTED
 #include "hal/lp_timer_hal.h"
 #endif
 
@@ -34,20 +34,6 @@
   #define RNG_CPU_WAIT_CYCLE_NUM (80 * 23) /* 45 KHz reading frequency is the maximum we have tested so far on S3 */
 #endif
 
-#if defined CONFIG_IDF_TARGET_ESP32H2
-
-// TODO: temporary definition until IDF-6270 is implemented
-#include "soc/lp_timer_reg.h"
-
-static inline uint32_t lp_timer_hal_get_cycle_count(void)
-{
-    REG_SET_BIT(LP_TIMER_UPDATE_REG, LP_TIMER_MAIN_TIMER_UPDATE);
-
-    uint32_t lo = REG_GET_FIELD(LP_TIMER_MAIN_BUF0_LOW_REG, LP_TIMER_MAIN_TIMER_BUF0_LOW);
-    return lo;
-}
-#endif
-
  __attribute__((weak)) void bootloader_fill_random(void *buffer, size_t length)
 {
     uint8_t *buffer_bytes = (uint8_t *)buffer;
@@ -57,7 +43,7 @@ static inline uint32_t lp_timer_hal_get_cycle_count(void)
     assert(buffer != NULL);
 
     for (size_t i = 0; i < length; i++) {
-#if (defined CONFIG_IDF_TARGET_ESP32C6 || defined CONFIG_IDF_TARGET_ESP32H2)
+#if SOC_LP_TIMER_SUPPORTED
         random = REG_READ(WDEV_RND_REG);
         start = esp_cpu_get_cycle_count();
         do {
diff --git a/components/esp_hw_support/hw_random.c b/components/esp_hw_support/hw_random.c
index fa83bfc0d9..046ff12dba 100644
--- a/components/esp_hw_support/hw_random.c
+++ b/components/esp_hw_support/hw_random.c
@@ -14,7 +14,7 @@
 #include "soc/wdev_reg.h"
 #include "esp_private/esp_clk.h"
 
-#if defined CONFIG_IDF_TARGET_ESP32C6
+#if SOC_LP_TIMER_SUPPORTED
 #include "hal/lp_timer_hal.h"
 #endif
 
@@ -34,20 +34,6 @@
 #define APB_CYCLE_WAIT_NUM (16)
 #endif
 
-#if defined CONFIG_IDF_TARGET_ESP32H2
-
-// TODO: temporary definition until IDF-6270 is implemented
-#include "soc/lp_timer_reg.h"
-
-static uint32_t IRAM_ATTR lp_timer_hal_get_cycle_count(void)
-{
-    REG_SET_BIT(LP_TIMER_UPDATE_REG, LP_TIMER_MAIN_TIMER_UPDATE);
-
-    uint32_t lo = REG_GET_FIELD(LP_TIMER_MAIN_BUF0_LOW_REG, LP_TIMER_MAIN_TIMER_BUF0_LOW);
-    return lo;
-}
-#endif
-
 uint32_t IRAM_ATTR esp_random(void)
 {
     /* The PRNG which implements WDEV_RANDOM register gets 2 bits
@@ -73,7 +59,7 @@ uint32_t IRAM_ATTR esp_random(void)
     static uint32_t last_ccount = 0;
     uint32_t ccount;
     uint32_t result = 0;
-#if (defined CONFIG_IDF_TARGET_ESP32C6 || defined CONFIG_IDF_TARGET_ESP32H2)
+#if SOC_LP_TIMER_SUPPORTED
     for (size_t i = 0; i < sizeof(result); i++) {
         do {
             ccount = esp_cpu_get_cycle_count();
diff --git a/components/hal/CMakeLists.txt b/components/hal/CMakeLists.txt
index 84261c8fa4..4f3aebebc3 100644
--- a/components/hal/CMakeLists.txt
+++ b/components/hal/CMakeLists.txt
@@ -25,6 +25,10 @@ if(NOT ${target} STREQUAL "esp32" AND NOT CONFIG_APP_BUILD_TYPE_PURE_RAM_APP)
     list(APPEND srcs "cache_hal.c")
 endif()
 
+if(CONFIG_SOC_LP_TIMER_SUPPORTED)
+    list(APPEND srcs "lp_timer_hal.c")
+endif()
+
 if(NOT BOOTLOADER_BUILD)
     list(APPEND srcs
         "rtc_io_hal.c"
@@ -129,10 +133,6 @@ if(NOT BOOTLOADER_BUILD)
         list(APPEND srcs "${target}/modem_clock_hal.c")
     endif()
 
-    if(CONFIG_SOC_LP_TIMER_SUPPORTED)
-        list(APPEND srcs "lp_timer_hal.c")
-    endif()
-
     if(CONFIG_SOC_PAU_SUPPORTED)
         list(APPEND srcs "${target}/pau_hal.c")
     endif()