Merge branch 'feature/c2_efuse_with_26mhz_v5.0' into 'release/v5.0'

efuse(es32c2): Supports 26MHz XTAL (v5.0)

See merge request espressif/esp-idf!19820

components/efuse/esp32c2/esp_efuse_utility.c

@@ -42,7 +42,7 @@ const esp_efuse_range_addr_t range_write_addr_blocks[] = {
 // Update Efuse timing configuration
 static esp_err_t esp_efuse_set_timing(void)
 {
-    // no need to set special timing values
+    efuse_hal_set_timing(0);
     return ESP_OK;
 }
 #endif // ifndef CONFIG_EFUSE_VIRTUAL

components/hal/esp32c2/efuse_hal.c

@@ -10,6 +10,7 @@
 #include "hal/assert.h"
 #include "hal/efuse_hal.h"
 #include "hal/efuse_ll.h"
+#include "hal/clk_tree_ll.h"
 
 #define ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block) ((error_reg) & (0x0F << (4 * (block))))
 
@@ -29,6 +30,11 @@ void efuse_hal_set_timing(uint32_t apb_freq_hz)
 {
     (void) apb_freq_hz;
     efuse_ll_set_pwr_off_num(0x190);
+    int xtal = clk_ll_xtal_load_freq_mhz();
+    HAL_ASSERT(xtal == 40 || xtal == 26);
+    // for the XTAL = 40 MHz we use the default value = 200.
+    // XTAL = 26 MHz the value = 130.
+    efuse_ll_set_tpgm_inactive(xtal * 5);
 }
 
 void efuse_hal_read(void)

components/hal/esp32c2/include/hal/efuse_hal.h

@@ -19,7 +19,7 @@ extern "C" {
 /**
  * @brief set eFuse timings
  *
- * @param apb_freq_hz APB frequency in Hz
+ * @param apb_freq_hz APB frequency in Hz (not used, kept for API compatibility)
  */
 void efuse_hal_set_timing(uint32_t apb_freq_hz);
 

components/hal/esp32c2/include/hal/efuse_ll.h

@@ -120,6 +120,10 @@ __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint1
     EFUSE.wr_tim_conf2.pwr_off_num = value;
 }
 
+__attribute__((always_inline)) static inline void efuse_ll_set_tpgm_inactive(uint8_t value)
+{
+    EFUSE.wr_tim_conf0.tpgm_inactive = value;
+}
 /******************* eFuse control functions *************************/
 
 #ifdef __cplusplus