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Merge branch 'docs/update_ulp_shift_ops_description' into 'master'
docs: Updated description of ULP FSM shift operations Closes IDFGH-7237 See merge request espressif/esp-idf!20025
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@ -281,6 +281,9 @@ The detailed description of all instructions is presented below:
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**Description**
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**Description**
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The instruction does a logical shift to left of the source register by the number of bits from another source register or a 16-bit signed value and stores the result to the destination register.
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The instruction does a logical shift to left of the source register by the number of bits from another source register or a 16-bit signed value and stores the result to the destination register.
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.. note::
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Shift operations which are greater than 15 bits will have an undefined result.
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**Examples**::
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**Examples**::
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1: LSH R1, R2, R3 // R1 = R2 << R3
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1: LSH R1, R2, R3 // R1 = R2 << R3
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@ -316,6 +319,9 @@ The detailed description of all instructions is presented below:
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**Description**
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**Description**
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The instruction does a logical shift to right of a source register by the number of bits from another source register or a 16-bit signed value and stores the result to the destination register.
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The instruction does a logical shift to right of a source register by the number of bits from another source register or a 16-bit signed value and stores the result to the destination register.
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.. note::
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Shift operations which are greater than 15 bits will have an undefined result.
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**Examples**::
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**Examples**::
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1: RSH R1, R2, R3 // R1 = R2 >> R3
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1: RSH R1, R2, R3 // R1 = R2 >> R3
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