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Merge branch 'bugfix/fix_adc_digital_not_reset_issue' into 'master'
adc: fix adc digital part not reset issue Closes IDF-4680 See merge request espressif/esp-idf!17279
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748037708f
@ -74,6 +74,7 @@ void bootloader_random_enable(void)
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR, 0);
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}
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//TODO: IDF-4714
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void bootloader_random_disable(void)
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{
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/* Restore internal I2C bus state */
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@ -82,13 +83,19 @@ void bootloader_random_disable(void)
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR, 0);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR, 0);
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/* Restore SARADC to default mode */
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CLEAR_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG, SENS_SAR1_DIG_FORCE);
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SET_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN0_REG, SYSTEM_APB_SARADC_CLK_EN);
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REG_SET_FIELD(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 0);
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CLEAR_PERI_REG_MASK(APB_SARADC_CTRL2_REG, APB_SARADC_TIMER_EN);
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//Stop SAR ADC clock
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CLEAR_PERI_REG_MASK(SENS_SAR_PERI_CLK_GATE_CONF_REG, SENS_SARADC_CLK_EN);
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//Power off SAR ADC
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REG_SET_FIELD(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 0);
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//return to ADC RTC controller
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CLEAR_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG, SENS_SAR1_DIG_FORCE);
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//Invalidate ADC digital trigger timer
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CLEAR_PERI_REG_MASK(APB_SARADC_CTRL2_REG, APB_SARADC_TIMER_EN);
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//Disable ADC digital part
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CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN0_REG, SYSTEM_APB_SARADC_CLK_EN);
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//Hold reset bit for ADC digital part
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SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_APB_SARADC_RST);
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/* Note: the 8M CLK entropy source continues running even after this function is called,
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but as mentioned above it's better to enable Wi-Fi or BT or call bootloader_random_enable()
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@ -284,8 +284,10 @@ esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config)
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};
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adc_hal_context_config(&s_adc_digi_ctx->hal, &config);
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//enable SARADC module clock
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//enable ADC digital part
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periph_module_enable(PERIPH_SARADC_MODULE);
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//reset ADC digital part
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periph_module_reset(PERIPH_SARADC_MODULE);
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#if SOC_ADC_CALIBRATION_V1_SUPPORTED
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adc_hal_calibration_init(ADC_NUM_1);
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@ -1,16 +1,8 @@
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// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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@ -29,6 +21,8 @@ extern "C" {
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static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
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{
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switch (periph) {
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case PERIPH_SARADC_MODULE:
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return DPORT_APB_SARADC_CLK_EN;
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case PERIPH_LEDC_MODULE:
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return DPORT_LEDC_CLK_EN;
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case PERIPH_UART0_MODULE:
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@ -99,6 +93,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
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(void)enable; // unused
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switch (periph) {
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case PERIPH_SARADC_MODULE:
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return DPORT_APB_SARADC_RST;
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case PERIPH_LEDC_MODULE:
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return DPORT_LEDC_RST;
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case PERIPH_UART0_MODULE:
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@ -21,6 +21,8 @@ extern "C" {
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static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
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{
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switch (periph) {
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case PERIPH_SARADC_MODULE:
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return SYSTEM_APB_SARADC_CLK_EN;
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case PERIPH_RMT_MODULE:
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return SYSTEM_RMT_CLK_EN;
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case PERIPH_LEDC_MODULE:
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@ -103,6 +105,8 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
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static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable)
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{
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switch (periph) {
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case PERIPH_SARADC_MODULE:
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return SYSTEM_APB_SARADC_RST;
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case PERIPH_RMT_MODULE:
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return SYSTEM_RMT_RST;
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case PERIPH_LEDC_MODULE:
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@ -886,7 +886,6 @@ components/hal/esp32s2/brownout_hal.c
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components/hal/esp32s2/cp_dma_hal.c
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components/hal/esp32s2/include/hal/adc_hal_conf.h
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components/hal/esp32s2/include/hal/aes_ll.h
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components/hal/esp32s2/include/hal/clk_gate_ll.h
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components/hal/esp32s2/include/hal/cp_dma_hal.h
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components/hal/esp32s2/include/hal/cp_dma_ll.h
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components/hal/esp32s2/include/hal/cpu_ll.h
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