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Merge branch 'fix/esp32c5_rng_random_disable_v5.2' into 'release/v5.2'
fix(bootloader): update random disable api for ESP32-C5/C6 (v5.2) See merge request espressif/esp-idf!32762
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@ -88,9 +88,6 @@ void bootloader_random_disable(void)
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, 0);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, 0);
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// Revert PMU_RF_PWC_REG to it's initial value
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CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
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// disable ADC_CTRL_CLK (SAR ADC function clock)
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REG_WRITE(PCR_SARADC_CLKM_CONF_REG, 0x00404000);
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