change(ldo): do vddpst ldo init in early stage

components/esp_hw_support/CMakeLists.txt

@@ -70,6 +70,9 @@ if(NOT BOOTLOADER_BUILD)
 
     if(CONFIG_SOC_MULTI_USAGE_LDO_SUPPORTED)
         list(APPEND srcs "ldo/esp_ldo.c")
+        if(CONFIG_SPIRAM OR CONFIG_SOC_CLK_MPLL_SUPPORTED)
+            list(APPEND srcs "ldo/esp_ldo_psram.c")
+        endif()
     endif()
 
     if(CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED)

components/esp_hw_support/Kconfig

@@ -324,6 +324,11 @@ menu "Hardware Settings"
 
     endmenu
 
+    menu "LDO Config"
+        depends on SOC_MULTI_USAGE_LDO_SUPPORTED
+        orsource "./port/$IDF_TARGET/Kconfig.ldo"
+    endmenu
+
     # Invisible bringup bypass options for esp_hw_support component
     config ESP_BRINGUP_BYPASS_CPU_CLK_SETTING
         bool

components/esp_hw_support/include/esp_private/esp_ldo.h

@@ -44,7 +44,7 @@ typedef struct {
 } esp_ldo_unit_init_cfg_t;
 
 /**
- * @Brief Init a LDO during early stage
+ * @brief Init a LDO during early stage
  *
  * @note This API is only for early stage usage
  *

components/esp_hw_support/include/esp_private/esp_ldo_psram.h

@@ -0,0 +1,22 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Init PSRAM VDD LDO during early stage
+ */
+void esp_ldo_vdd_psram_early_init(void);
+
+#ifdef __cplusplus
+}
+#endif

components/esp_hw_support/ldo/esp_ldo_psram.c

@@ -0,0 +1,32 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include "sdkconfig.h"
+#include "esp_attr.h"
+#include "esp_log.h"
+#include "esp_check.h"
+#include "soc/soc_caps.h"
+#include "hal/ldo_ll.h"
+#include "esp_private/esp_ldo.h"
+#include "esp_private/esp_ldo_psram.h"
+
+void esp_ldo_vdd_psram_early_init(void)
+{
+    if (CONFIG_ESP_VDD_PSRAM_LDO_ID != -1) {
+        esp_ldo_unit_init_cfg_t unit_cfg = {
+            .unit_id = LDO_ID2UNIT(CONFIG_ESP_VDD_PSRAM_LDO_ID),
+            .cfg = {
+                .voltage_mv = CONFIG_ESP_VDD_PSRAM_LDO_VOLTAGE_MV,
+            },
+            .flags.enable_unit = true,
+            .flags.shared_ldo = true,
+        };
+        esp_ldo_unit_handle_t early_unit = esp_ldo_init_unit_early(&unit_cfg);
+        assert(early_unit);
+    }
+}

components/esp_hw_support/port/esp32p4/Kconfig.ldo

@@ -0,0 +1,24 @@
+config ESP_VDD_PSRAM_LDO_ID
+    int "PSRAM VDD connected LDO ID, set -1 for using external power supply and disable internal LDO"
+    default 2
+    range -1 4
+    help
+        PSRAM VDD pin connected LDO ID.
+        PSRAM VDD needs to be connected to an voltage output. This option selects the on-chip
+        LDO which is connected to the PSRAM VDD.
+        Set to -1 for connecting to external voltage output.
+
+choice ESP_VDD_PSRAM_LDO_VOLTAGE_MV
+    prompt "PSRAM VDD connected LDO voltage"
+    depends on ESP_VDD_PSRAM_LDO_ID != -1
+    default ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1800
+    help
+        Select the LDO (ESP_VDD_PSRAM_LDO_ID) voltage output
+
+    config ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1800
+        bool "1.8V"
+endchoice
+
+config ESP_VDD_PSRAM_LDO_VOLTAGE_MV
+    int
+    default 1800 if ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1800

components/esp_psram/device/esp_psram_impl_ap_hex.c

@@ -8,8 +8,10 @@
 #include "esp_attr.h"
 #include "esp_err.h"
 #include "esp_log.h"
+#include "esp_clk_tree.h"
 #include "esp_private/periph_ctrl.h"
-#include "esp_private/esp_ldo.h"
+#include "esp_private/rtc_clk.h"
+#include "esp_private/esp_ldo_psram.h"
 #include "../esp_psram_impl.h"
 #include "rom/opi_flash.h"
 #include "hal/psram_ctrlr_ll.h"
@@ -36,6 +38,8 @@
 #define AP_HEX_PSRAM_CS_ECC_HOLD_TIME      4
 #define AP_HEX_PSRAM_CS_HOLD_DELAY         3
 
+#define AP_HEX_PSRAM_MPLL_DEFAULT_FREQ_MHZ 400
+
 typedef struct {
     union {
         struct {
@@ -350,18 +354,13 @@ static void s_configure_psram_ecc(void)
 
 esp_err_t esp_psram_impl_enable(void)
 {
-#if CONFIG_SPIRAM_LDO_ID
+    esp_ldo_vdd_psram_early_init();
-    if (CONFIG_SPIRAM_LDO_ID != -1) {
+#if SOC_CLK_MPLL_SUPPORTED
-        esp_ldo_unit_init_cfg_t unit_cfg = {
+    uint32_t xtal_freq = 0;
-            .unit_id = LDO_ID2UNIT(CONFIG_SPIRAM_LDO_ID),
+    ESP_ERROR_CHECK(esp_clk_tree_src_get_freq_hz(SOC_MOD_CLK_XTAL, ESP_CLK_TREE_SRC_FREQ_PRECISION_EXACT, &xtal_freq));
-            .cfg = {
+    assert(xtal_freq == 40000000);
-                .voltage_mv = CONFIG_SPIRAM_LDO_VOLTAGE_MV,
+    rtc_clk_mpll_enable();
-            },
+    rtc_clk_mpll_configure(xtal_freq / 1000000, AP_HEX_PSRAM_MPLL_DEFAULT_FREQ_MHZ);
-            .flags.enable_unit = true,
-        };
-        esp_ldo_unit_handle_t early_unit = esp_ldo_init_unit_early(&unit_cfg);
-        assert(early_unit);
-    }
 #endif
 
     PSRAM_RCC_ATOMIC() {

components/esp_psram/esp32p4/Kconfig.spiram

@@ -46,31 +46,6 @@ menu "PSRAM config"
 
             If enabled, 1/8 of the PSRAM total size will be reserved for error-correcting code.
 
-    config SPIRAM_LDO_ID
-        int "PSRAM connected LDO ID, set -1 for using external power supply"
-        default 2
-        range -1 4
-        help
-            PSRAM VDD needs to be connected to an voltage output. This option selects the on-chip
-            LDO which is connected to the PSRAM VDD.
-            Set to -1 for connecting to external voltage output.
-
-    choice SPIRAM_LDO_VOLTAGE_MV
-        prompt "PSRAM connected LDO voltage"
-        depends on SPIRAM_LDO_ID != -1
-        default SPIRAM_LDO_VOLTAGE_MV_1800
-        help
-            Select the speed for the PSRAM chip.
-
-        config SPIRAM_LDO_VOLTAGE_MV_1800
-            bool "1.8V"
-    endchoice
-
-    config SPIRAM_LDO_VOLTAGE_MV
-        int
-        default 1800 if SPIRAM_LDO_VOLTAGE_MV_1800
-
-
     config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
         bool "Allow external memory as an argument to xTaskCreateStatic"
         default y

components/esp_system/port/cpu_start.c

@@ -69,6 +69,8 @@
 #include "soc/keymng_reg.h"
 #endif
 
+#include "esp_private/rtc_clk.h"
+#include "esp_private/esp_ldo_psram.h"
 #include "esp_private/esp_mmu_map_private.h"
 #if CONFIG_SPIRAM
 #include "esp_psram.h"
@@ -518,6 +520,14 @@ void IRAM_ATTR call_start_cpu0(void)
         abort();
     }
 #endif
+
+#if SOC_CLK_MPLL_SUPPORTED
+#if SOC_PSRAM_VDD_POWER_MPLL
+    esp_ldo_vdd_psram_early_init();
+#endif
+    rtc_clk_mpll_enable();
+#endif
+
     esp_mspi_pin_init();
     // For Octal flash, it's hard to implement a read_id function in OPI mode for all vendors.
     // So we have to read it here in SPI mode, before entering the OPI mode.

components/soc/esp32p4/include/soc/Kconfig.soc_caps.in

@@ -1295,6 +1295,10 @@ config SOC_PM_PAU_LINK_NUM
     int
     default 4
 
+config SOC_PSRAM_VDD_POWER_MPLL
+    bool
+    default y
+
 config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
     bool
     default n

components/soc/esp32p4/include/soc/soc_caps.h

@@ -558,6 +558,9 @@
 
 #define SOC_PM_PAU_LINK_NUM             (4)
 
+/*-------------------------- PSRAM CAPS ----------------------------*/
+#define SOC_PSRAM_VDD_POWER_MPLL    (1)
+
 /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
 #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION       (0)
 #define SOC_MODEM_CLOCK_IS_INDEPENDENT            (0)