diff --git a/components/esp_lcd/CMakeLists.txt b/components/esp_lcd/CMakeLists.txt index 31dc623873..ffc0cd5119 100644 --- a/components/esp_lcd/CMakeLists.txt +++ b/components/esp_lcd/CMakeLists.txt @@ -1,14 +1,17 @@ set(srcs "src/esp_lcd_common.c" "src/esp_lcd_panel_io.c" "src/esp_lcd_panel_io_i2c.c" + "src/esp_lcd_panel_io_i2s.c" "src/esp_lcd_panel_io_spi.c" "src/esp_lcd_panel_io_i80.c" + "src/esp_lcd_panel_nt35510.c" "src/esp_lcd_panel_ssd1306.c" "src/esp_lcd_panel_st7789.c" "src/esp_lcd_panel_ops.c" "src/esp_lcd_rgb_panel.c") set(includes "include" "interface") +set(priv_requires "driver") idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${includes} - PRIV_INCLUDE_DIRS ${priv_includes}) + PRIV_REQUIRES ${priv_requires}) diff --git a/components/esp_lcd/Kconfig b/components/esp_lcd/Kconfig index d7ca5dc1c2..f29c883cae 100644 --- a/components/esp_lcd/Kconfig +++ b/components/esp_lcd/Kconfig @@ -1,9 +1,7 @@ menu "LCD and Touch Panel" menu "LCD Peripheral Configuration" - depends on IDF_TARGET_ESP32S3 choice LCD_PERIPH_CLK_SRC prompt "Select clock source for LCD peripheral" - default LCD_PERIPH_CLK_SRC_XTAL if PM_ENABLE default LCD_PERIPH_CLK_SRC_PLL160M help The peripheral clock is where LCD bus clock derives from. @@ -16,5 +14,12 @@ menu "LCD and Touch Panel" config LCD_PERIPH_CLK_SRC_XTAL bool "XTAL clock" endchoice # LCD_PERIPH_CLK_SRC + + config LCD_PANEL_IO_FORMAT_BUF_SIZE + int "LCD panel io format buffer size" + default 32 + help + LCD driver allocates an internal buffer to transform the data into a proper format, because of + the endian order mismatch. This option is to set the size of the buffer, in bytes. endmenu endmenu diff --git a/components/esp_lcd/include/esp_lcd_panel_io.h b/components/esp_lcd/include/esp_lcd_panel_io.h index c362180f53..bde0edeb97 100644 --- a/components/esp_lcd/include/esp_lcd_panel_io.h +++ b/components/esp_lcd/include/esp_lcd_panel_io.h @@ -28,14 +28,13 @@ typedef struct esp_lcd_i80_bus_t *esp_lcd_i80_bus_handle_t; /*!< Type of LCD i * * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()` * @param[in] lcd_cmd The specific LCD command - * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits) * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command * @return * - ESP_ERR_INVALID_ARG if parameter is invalid * - ESP_OK on success */ -esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size); +esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, const void *param, size_t param_size); /** * @brief Transmit LCD RGB data @@ -47,14 +46,13 @@ esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, i * * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()` * @param[in] lcd_cmd The specific LCD command - * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits) * @param[in] color Buffer that holds the RGB color data * @param[in] color_size Size of `color` in memory, in bytes * @return * - ESP_ERR_INVALID_ARG if parameter is invalid * - ESP_OK on success */ -esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size); +esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, const void *color, size_t color_size); /** * @brief Destory LCD panel IO handle (deinitialize panel and free all corresponding resource) @@ -76,7 +74,9 @@ typedef struct { unsigned int pclk_hz; /*!< Frequency of pixel clock */ size_t trans_queue_depth; /*!< Size of internal transaction queue */ bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */ - void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */ + void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */ + int lcd_cmd_bits; /*!< Bit-width of LCD command */ + int lcd_param_bits; /*!< Bit-width of LCD parameter */ struct { unsigned int dc_as_cmd_phase: 1; /*!< D/C line value is encoded into SPI transaction command phase */ unsigned int dc_low_on_data: 1; /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */ @@ -102,6 +102,8 @@ typedef struct { void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */ size_t control_phase_bytes; /*!< I2C LCD panel will encode control information (e.g. D/C seclection) into control phase, in several bytes */ unsigned int dc_bit_offset; /*!< Offset of the D/C selection bit in control phase */ + int lcd_cmd_bits; /*!< Bit-width of LCD command */ + int lcd_param_bits; /*!< Bit-width of LCD parameter */ struct { unsigned int dc_low_on_data: 1; /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */ } flags; @@ -128,7 +130,7 @@ typedef struct { int dc_gpio_num; /*!< GPIO used for D/C line */ int wr_gpio_num; /*!< GPIO used for WR line */ int data_gpio_nums[SOC_LCD_I80_BUS_WIDTH]; /*!< GPIOs used for data lines */ - size_t data_width; /*!< Number of data lines, 8 or 16 */ + size_t bus_width; /*!< Number of data lines, 8 or 16 */ size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */ } esp_lcd_i80_bus_config_t; @@ -164,7 +166,9 @@ typedef struct { unsigned int pclk_hz; /*!< Frequency of pixel clock */ size_t trans_queue_depth; /*!< Transaction queue size, larger queue, higher throughput */ bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data was tranferred done */ - void *user_data; /*!< User private data, passed directly to on_trans_done's user_data */ + void *user_data; /*!< User private data, passed directly to on_trans_done's user_data */ + int lcd_cmd_bits; /*!< Bit-width of LCD command */ + int lcd_param_bits; /*!< Bit-width of LCD parameter */ struct { unsigned int dc_idle_level: 1; /*!< Level of DC line in IDLE phase */ unsigned int dc_cmd_level: 1; /*!< Level of DC line in CMD phase */ @@ -172,7 +176,7 @@ typedef struct { unsigned int dc_data_level: 1; /*!< Level of DC line in DATA phase */ } dc_levels; /*!< Each i80 device might have its own D/C control logic */ struct { - unsigned int invert_cs: 1; /*!< Whether to invert the CS line */ + unsigned int cs_active_high: 1; /*!< If set, a high level of CS line will select the device, otherwise, CS line is low level active */ unsigned int reverse_color_bits: 1; /*!< Reverse the data bits, D[N:0] -> D[0:N] */ unsigned int swap_color_bytes: 1; /*!< Swap adjacent two color bytes */ unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on WR signal (a.k.a the PCLK) */ diff --git a/components/esp_lcd/include/esp_lcd_panel_vendor.h b/components/esp_lcd/include/esp_lcd_panel_vendor.h index ac98cc3913..dde8be68d3 100644 --- a/components/esp_lcd/include/esp_lcd_panel_vendor.h +++ b/components/esp_lcd/include/esp_lcd_panel_vendor.h @@ -39,6 +39,19 @@ typedef struct { */ esp_err_t esp_lcd_new_panel_st7789(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel); +/** + * @brief Create LCD panel for model NT35510 + * + * @param[in] io LCD panel IO handle + * @param[in] panel_dev_config general panel device configuration + * @param[out] ret_panel Returned LCD panel handle + * @return + * - ESP_ERR_INVALID_ARG if parameter is invalid + * - ESP_ERR_NO_MEM if out of memory + * - ESP_OK on success + */ +esp_err_t esp_lcd_new_panel_nt35510(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel); + /** * @brief Create LCD panel for model SSD1306 * diff --git a/components/esp_lcd/interface/esp_lcd_panel_io_interface.h b/components/esp_lcd/interface/esp_lcd_panel_io_interface.h index b6b85564cd..2faa6fab26 100644 --- a/components/esp_lcd/interface/esp_lcd_panel_io_interface.h +++ b/components/esp_lcd/interface/esp_lcd_panel_io_interface.h @@ -25,14 +25,13 @@ struct esp_lcd_panel_io_t { * * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()` * @param[in] lcd_cmd The specific LCD command - * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits) * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command * @return * - ESP_ERR_INVALID_ARG if parameter is invalid * - ESP_OK on success */ - esp_err_t (*tx_param)(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size); + esp_err_t (*tx_param)(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size); /** * @brief Transmit LCD RGB data @@ -41,14 +40,13 @@ struct esp_lcd_panel_io_t { * * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()` * @param[in] lcd_cmd The specific LCD command - * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits) * @param[in] color Buffer that holds the RGB color data * @param[in] color_size Size of `color` in memory, in bytes * @return * - ESP_ERR_INVALID_ARG if parameter is invalid * - ESP_OK on success */ - esp_err_t (*tx_color)(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size); + esp_err_t (*tx_color)(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size); /** * @brief Destory LCD panel IO handle (deinitialize all and free resource) diff --git a/components/esp_lcd/src/esp_lcd_common.c b/components/esp_lcd/src/esp_lcd_common.c index 5d2d59e460..631b767912 100644 --- a/components/esp_lcd/src/esp_lcd_common.c +++ b/components/esp_lcd/src/esp_lcd_common.c @@ -7,8 +7,8 @@ #include "freertos/FreeRTOS.h" #include "soc/rtc.h" // for querying XTAL clock #include "soc/soc_caps.h" -#if SOC_LCDCAM_SUPPORTED #include "esp_lcd_common.h" +#if SOC_LCDCAM_SUPPORTED #include "hal/lcd_ll.h" #include "hal/lcd_hal.h" @@ -81,8 +81,8 @@ void lcd_com_remove_device(lcd_com_device_type_t device_type, int member_id) unsigned long lcd_com_select_periph_clock(lcd_hal_context_t *hal) { - unsigned long resolution_hz = 0; - int clock_source = -1; + unsigned long resolution_hz; + int clock_source; #if CONFIG_LCD_PERIPH_CLK_SRC_PLL160M resolution_hz = 160000000 / LCD_PERIPH_CLOCK_PRE_SCALE; clock_source = LCD_LL_CLOCK_SRC_PLL160M; @@ -97,6 +97,8 @@ unsigned long lcd_com_select_periph_clock(lcd_hal_context_t *hal) return resolution_hz; } +#endif // SOC_LCDCAM_SUPPORTED + void lcd_com_mount_dma_data(dma_descriptor_t *desc_head, const void *buffer, size_t len) { size_t prepared_length = 0; @@ -122,5 +124,3 @@ void lcd_com_mount_dma_data(dma_descriptor_t *desc_head, const void *buffer, siz prepared_length += len; } } - -#endif // SOC_LCDCAM_SUPPORTED diff --git a/components/esp_lcd/src/esp_lcd_common.h b/components/esp_lcd/src/esp_lcd_common.h index 08cac613bd..8a52bb5319 100644 --- a/components/esp_lcd/src/esp_lcd_common.h +++ b/components/esp_lcd/src/esp_lcd_common.h @@ -5,22 +5,21 @@ */ #pragma once +#include #include "soc/soc_caps.h" +#include "hal/dma_types.h" #if SOC_LCDCAM_SUPPORTED #include "hal/lcd_hal.h" -#include "hal/dma_types.h" -#else -#error "lcd peripheral is not supported on this chip" #endif #ifdef __cplusplus extern "C" { #endif -#if SOC_LCDCAM_SUPPORTED - #define LCD_PERIPH_CLOCK_PRE_SCALE (2) // This is the minimum divider that can be applied to LCD peripheral +#if SOC_LCDCAM_SUPPORTED + typedef enum { LCD_COM_DEVICE_TYPE_I80, LCD_COM_DEVICE_TYPE_RGB @@ -54,6 +53,8 @@ void lcd_com_remove_device(lcd_com_device_type_t device_type, int member_id); */ unsigned long lcd_com_select_periph_clock(lcd_hal_context_t *hal); +#endif // SOC_LCDCAM_SUPPORTED + /** * @brief Mount data to DMA descriptors * @@ -63,7 +64,28 @@ unsigned long lcd_com_select_periph_clock(lcd_hal_context_t *hal); */ void lcd_com_mount_dma_data(dma_descriptor_t *desc_head, const void *buffer, size_t len); -#endif // SOC_LCDCAM_SUPPORTED +/** + * @brief Reverse the bytes in the buffer + * + * @note LCD is big-endian, e.g. to send command 0x1234, byte 0x12 should appear on the bus first + * However, the low level peripheral (like i80, i2s) will send 0x34 first. + * This helper function is used to reverse the bytes order + * + * @param buf buffer address + * @param start start index of the buffer + * @param end end index of the buffer + */ +static inline void lcd_com_reverse_buffer_bytes(uint8_t *buf, int start, int end) +{ + uint8_t temp = 0; + while (start < end) { + temp = buf[start]; + buf[start] = buf[end]; + buf[end] = temp; + start++; + end--; + } +} #ifdef __cplusplus } diff --git a/components/esp_lcd/src/esp_lcd_panel_commands.h b/components/esp_lcd/src/esp_lcd_panel_commands.h index c2ae3933b3..091ef1cffe 100644 --- a/components/esp_lcd/src/esp_lcd_panel_commands.h +++ b/components/esp_lcd/src/esp_lcd_panel_commands.h @@ -45,7 +45,7 @@ #define LCD_CMD_VSCSAD 0x37 // Vertical scroll start address #define LCD_CMD_IDMOFF 0x38 // Recover from IDLE mode #define LCD_CMD_IDMON 0x39 // Fall into IDLE mode (8 color depth is displayed) -#define LCD_CMD_COLMOD 0x3A // Defines the format of RGB picture data, which is to be transferred via the MCU interface +#define LCD_CMD_COLMOD 0x3A // Defines the format of RGB picture data #define LCD_CMD_RAMWRC 0x3C // Memory write continue #define LCD_CMD_RAMRDC 0x3E // Memory read continue #define LCD_CMD_STE 0x44 // Set tear scanline, tearing effect output signal when display module reaches line N diff --git a/components/esp_lcd/src/esp_lcd_panel_io.c b/components/esp_lcd/src/esp_lcd_panel_io.c index 4c80eaf8da..1c45c65a0a 100644 --- a/components/esp_lcd/src/esp_lcd_panel_io.c +++ b/components/esp_lcd/src/esp_lcd_panel_io.c @@ -10,16 +10,16 @@ static const char *TAG = "lcd_panel.io"; -esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size) +esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, const void *param, size_t param_size) { ESP_RETURN_ON_FALSE(io, ESP_ERR_INVALID_ARG, TAG, "invalid panel io handle"); - return io->tx_param(io, lcd_cmd, lcd_cmd_bits, param, param_size); + return io->tx_param(io, lcd_cmd, param, param_size); } -esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size) +esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, const void *color, size_t color_size) { ESP_RETURN_ON_FALSE(io, ESP_ERR_INVALID_ARG, TAG, "invalid panel io handle"); - return io->tx_color(io, lcd_cmd, lcd_cmd_bits, color, color_size); + return io->tx_color(io, lcd_cmd, color, color_size); } esp_err_t esp_lcd_panel_io_del(esp_lcd_panel_io_handle_t io) diff --git a/components/esp_lcd/src/esp_lcd_panel_io_i2c.c b/components/esp_lcd/src/esp_lcd_panel_io_i2c.c index 1453e245f2..037fddedee 100644 --- a/components/esp_lcd/src/esp_lcd_panel_io_i2c.c +++ b/components/esp_lcd/src/esp_lcd_panel_io_i2c.c @@ -22,13 +22,15 @@ static const char *TAG = "lcd_panel.io.i2c"; #define BYTESHIFT(VAR, IDX) (((VAR) >> ((IDX) * 8)) & 0xFF) static esp_err_t panel_io_i2c_del(esp_lcd_panel_io_t *io); -static esp_err_t panel_io_i2c_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size); -static esp_err_t panel_io_i2c_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size); +static esp_err_t panel_io_i2c_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size); +static esp_err_t panel_io_i2c_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size); typedef struct { esp_lcd_panel_io_t base; // Base class of generic lcd panel io uint32_t i2c_bus_id; // I2C bus id, indicating which I2C port uint32_t dev_addr; // Device address + int lcd_cmd_bits; // Bit width of LCD command + int lcd_param_bits; // Bit width of LCD parameter uint32_t control_phase_cmd; // control byte when transferring command uint32_t control_phase_data; // control byte when transferring data bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // User register's callback, invoked when color data trans done @@ -46,6 +48,8 @@ esp_err_t esp_lcd_new_panel_io_i2c(esp_lcd_i2c_bus_handle_t bus, const esp_lcd_p ESP_GOTO_ON_FALSE(i2c_panel_io, ESP_ERR_NO_MEM, err, TAG, "no mem for i2c panel io"); i2c_panel_io->i2c_bus_id = (uint32_t)bus; + i2c_panel_io->lcd_cmd_bits = io_config->lcd_cmd_bits; + i2c_panel_io->lcd_param_bits = io_config->lcd_param_bits; i2c_panel_io->on_color_trans_done = io_config->on_color_trans_done; i2c_panel_io->control_phase_data = (!io_config->flags.dc_low_on_data) << (io_config->dc_bit_offset); i2c_panel_io->control_phase_cmd = (io_config->flags.dc_low_on_data) << (io_config->dc_bit_offset); @@ -72,7 +76,7 @@ static esp_err_t panel_io_i2c_del(esp_lcd_panel_io_t *io) return ret; } -static esp_err_t panel_io_i2c_tx_buffer(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *buffer, size_t buffer_size, bool is_param) +static esp_err_t panel_io_i2c_tx_buffer(esp_lcd_panel_io_t *io, int lcd_cmd, const void *buffer, size_t buffer_size, bool is_param) { esp_err_t ret = ESP_OK; lcd_panel_io_i2c_t *i2c_panel_io = __containerof(io, lcd_panel_io_i2c_t, base); @@ -81,14 +85,12 @@ static esp_err_t panel_io_i2c_tx_buffer(esp_lcd_panel_io_t *io, int lcd_cmd, int ESP_GOTO_ON_FALSE(cmd_link, ESP_ERR_NO_MEM, err, TAG, "no mem for i2c cmd link"); ESP_GOTO_ON_ERROR(i2c_master_start(cmd_link), err, TAG, "issue start failed"); // start phase ESP_GOTO_ON_ERROR(i2c_master_write_byte(cmd_link, (i2c_panel_io->dev_addr << 1) | I2C_MASTER_WRITE, true), err, TAG, "write address failed"); // address phase - ESP_GOTO_ON_ERROR( - i2c_master_write_byte(cmd_link, is_param ? i2c_panel_io->control_phase_cmd : i2c_panel_io->control_phase_data, true), - err, TAG, "write control phase failed"); // control phase + ESP_GOTO_ON_ERROR(i2c_master_write_byte(cmd_link, is_param ? i2c_panel_io->control_phase_cmd : i2c_panel_io->control_phase_data, true), + err, TAG, "write control phase failed"); // control phase uint8_t cmds[4] = {BYTESHIFT(lcd_cmd, 3), BYTESHIFT(lcd_cmd, 2), BYTESHIFT(lcd_cmd, 1), BYTESHIFT(lcd_cmd, 0)}; - size_t cmds_size = lcd_cmd_bits / 8; + size_t cmds_size = i2c_panel_io->lcd_cmd_bits / 8; if (cmds_size > 0 && cmds_size <= sizeof(cmds)) { - ESP_GOTO_ON_ERROR(i2c_master_write(cmd_link, cmds + (sizeof(cmds) - cmds_size), cmds_size, true), err, TAG, - "write LCD cmd failed"); + ESP_GOTO_ON_ERROR(i2c_master_write(cmd_link, cmds + (sizeof(cmds) - cmds_size), cmds_size, true), err, TAG, "write LCD cmd failed"); } if (buffer) { @@ -114,12 +116,12 @@ err: return ret; } -static esp_err_t panel_io_i2c_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size) +static esp_err_t panel_io_i2c_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size) { - return panel_io_i2c_tx_buffer(io, lcd_cmd, lcd_cmd_bits, param, param_size, true); + return panel_io_i2c_tx_buffer(io, lcd_cmd, param, param_size, true); } -static esp_err_t panel_io_i2c_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size) +static esp_err_t panel_io_i2c_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size) { - return panel_io_i2c_tx_buffer(io, lcd_cmd, lcd_cmd_bits, color, color_size, false); + return panel_io_i2c_tx_buffer(io, lcd_cmd, color, color_size, false); } diff --git a/components/esp_lcd/src/esp_lcd_panel_io_i2s.c b/components/esp_lcd/src/esp_lcd_panel_io_i2s.c new file mode 100644 index 0000000000..f132b3bd29 --- /dev/null +++ b/components/esp_lcd/src/esp_lcd_panel_io_i2s.c @@ -0,0 +1,692 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +// #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG + +///////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Although we're manipulating I2S peripheral (on esp32/s2 target), it has nothing to do with the AUDIO BUS. +// In fact, we're simulating the Intel 8080 bus with I2S peripheral, in a special parallel mode. +///////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include +#include +#include +#include +#include +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "freertos/queue.h" +#include "esp_attr.h" +#include "esp_check.h" +#include "esp_intr_alloc.h" +#include "esp_heap_caps.h" +#include "esp_lcd_panel_io_interface.h" +#include "esp_lcd_panel_io.h" +#include "esp_lcd_common.h" +#include "esp_rom_gpio.h" +#include "soc/soc_caps.h" +#include "hal/dma_types.h" +#include "hal/gpio_hal.h" +#include "driver/gpio.h" +#include "driver/periph_ctrl.h" +#if SOC_I2S_LCD_I80_VARIANT +#include "esp_private/i2s_platform.h" +#include "soc/lcd_periph.h" +#include "hal/i2s_hal.h" +#include "hal/i2s_ll.h" +#include "hal/i2s_types.h" + +static const char *TAG = "lcd_panel.io.i80"; + +typedef struct esp_lcd_i80_bus_t esp_lcd_i80_bus_t; +typedef struct lcd_panel_io_i80_t lcd_panel_io_i80_t; +typedef struct lcd_i80_trans_descriptor_t lcd_i80_trans_descriptor_t; + +static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size); +static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size); +static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io); +static unsigned long i2s_lcd_select_periph_clock(i2s_hal_context_t *hal); +static esp_err_t i2s_lcd_init_dma_link(esp_lcd_i80_bus_handle_t bus); +static esp_err_t i2s_lcd_configure_gpio(esp_lcd_i80_bus_handle_t bus, const esp_lcd_i80_bus_config_t *bus_config); +static void i2s_lcd_trigger_quick_trans_done_event(esp_lcd_i80_bus_handle_t bus); +static void lcd_i80_switch_devices(lcd_panel_io_i80_t *cur_device, lcd_panel_io_i80_t *next_device); +static IRAM_ATTR void lcd_default_isr_handler(void *args); + +struct esp_lcd_i80_bus_t { + int bus_id; // Bus ID, index from 0 + portMUX_TYPE spinlock; // spinlock used to protect i80 bus members(hal, device_list, cur_trans) + i2s_hal_context_t hal; // Hal object + size_t bus_width; // Number of data lines + int dc_gpio_num; // GPIO used for DC line + int wr_gpio_num; // GPIO used for WR line + intr_handle_t intr; // LCD peripheral interrupt handle + size_t num_dma_nodes; // Number of DMA descriptors + uint8_t *format_buffer;// The driver allocates an internal buffer for DMA to do data format transformer + size_t resolution_hz; // LCD_CLK resolution, determined by selected clock source + lcd_i80_trans_descriptor_t *cur_trans; // Current transaction + lcd_panel_io_i80_t *cur_device; // Current working device + LIST_HEAD(i80_device_list, lcd_panel_io_i80_t) device_list; // Head of i80 device list + dma_descriptor_t dma_nodes[]; // DMA descriptor pool, the descriptors are shared by all i80 devices +}; + +struct lcd_i80_trans_descriptor_t { + lcd_panel_io_i80_t *i80_device; // i80 device issuing this transaction + const void *data; // Data buffer + uint32_t data_length; // Data buffer size + void *cb_user_data; // private data used by trans_done_cb + bool (*trans_done_cb)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // transaction done callback + struct { + unsigned int dc_level: 1; // Level of DC line for this transaction + } flags; +}; + +struct lcd_panel_io_i80_t { + esp_lcd_panel_io_t base; // Base class of generic lcd panel io + esp_lcd_i80_bus_t *bus; // Which bus the device is attached to + int cs_gpio_num; // GPIO used for CS line + unsigned int pclk_hz; // PCLK clock frequency + size_t clock_prescale; // Prescaler coefficient, determined by user's configured PCLK frequency + QueueHandle_t trans_queue; // Transaction queue, transactions in this queue are pending for scheduler to dispatch + QueueHandle_t done_queue; // Transaction done queue, transactions in this queue are finished but not recycled by the caller + size_t queue_size; // Size of transaction queue + size_t num_trans_inflight; // Number of transactions that are undergoing (the descriptor not recycled yet) + int lcd_cmd_bits; // Bit width of LCD command + int lcd_param_bits; // Bit width of LCD parameter + void *cb_user_data; // private data used when transfer color data + bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // color data trans done callback + LIST_ENTRY(lcd_panel_io_i80_t) device_list_entry; // Entry of i80 device list + struct { + unsigned int dc_cmd_level: 1; // Level of DC line in CMD phase + unsigned int dc_data_level: 1; // Level of DC line in DATA phase + } dc_levels; + struct { + unsigned int cs_active_high: 1; // Whether the CS line is active on high level + unsigned int swap_color_bytes: 1; // Swap adjacent two data bytes before sending out + unsigned int pclk_idle_low: 1; // The WR line keeps at low level in IDLE phase + } flags; + lcd_i80_trans_descriptor_t trans_pool[]; // Transaction pool +}; + +esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lcd_i80_bus_handle_t *ret_bus) +{ + esp_err_t ret = ESP_OK; + esp_lcd_i80_bus_t *bus = NULL; + ESP_GOTO_ON_FALSE(bus_config && ret_bus, ESP_ERR_INVALID_ARG, err_arg, TAG, "invalid argument"); + // although I2S bus supports up to 24 parallel data lines, we restrict users to only use 8 or 16 bit width, due to limited GPIO numbers + ESP_GOTO_ON_FALSE(bus_config->bus_width == 8 || bus_config->bus_width == 16, ESP_ERR_INVALID_ARG, err_arg, + TAG, "invalid bus width:%d", bus_config->bus_width); + size_t max_transfer_bytes = (bus_config->max_transfer_bytes + 3) & ~0x03; // align up to 4 bytes +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + // double the size of the internal DMA buffer if bus_width is 8, + // because one I2S FIFO (4 bytes) will only contain two bytes of valid data + max_transfer_bytes = max_transfer_bytes * 16 / bus_config->bus_width + 4; +#endif + size_t num_dma_nodes = max_transfer_bytes / DMA_DESCRIPTOR_BUFFER_MAX_SIZE + 1; + // DMA descriptors must be placed in internal SRAM + bus = heap_caps_calloc(1, sizeof(esp_lcd_i80_bus_t) + num_dma_nodes * sizeof(dma_descriptor_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA); + ESP_GOTO_ON_FALSE(bus, ESP_ERR_NO_MEM, no_mem_bus, TAG, "no mem for i80 bus"); + bus->num_dma_nodes = num_dma_nodes; +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + // transform format for LCD commands, parameters and color data, so we need a big buffer + bus->format_buffer = heap_caps_calloc(1, max_transfer_bytes, MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA); +#else + // only transform format for LCD parameters, buffer size depends on specific LCD, set at compile time + bus->format_buffer = heap_caps_calloc(1, CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE, MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA); +#endif + ESP_GOTO_ON_FALSE(bus->format_buffer, ESP_ERR_NO_MEM, no_mem_format, TAG, "no mem for format buffer"); + // I2S0 has the LCD mode, but the LCD mode can't work with other modes at the same time, we need to register the driver object to the I2S platform + ESP_GOTO_ON_ERROR(i2s_priv_register_object(bus, 0), no_slot, TAG, "register to I2S platform failed"); + bus->bus_id = 0; + // initialize HAL layer + i2s_hal_init(&bus->hal, bus->bus_id); + // set peripheral clock resolution + bus->resolution_hz = i2s_lcd_select_periph_clock(&bus->hal); + // reset peripheral, DMA channel and FIFO + i2s_ll_tx_reset(bus->hal.dev); + i2s_ll_tx_reset_dma(bus->hal.dev); + i2s_ll_tx_reset_fifo(bus->hal.dev); + // install interrupt service, (I2S LCD mode only uses the "TX Unit", which leaves "RX Unit" for other purpose) + // So the interrupt should also be able to share with other functionality + int isr_flags = ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED; + ret = esp_intr_alloc_intrstatus(lcd_periph_signals.buses[bus->bus_id].irq_id, isr_flags, + (uint32_t)i2s_ll_get_intr_status_reg(bus->hal.dev), + I2S_LL_EVENT_TX_EOF, lcd_default_isr_handler, bus, &bus->intr); + ESP_GOTO_ON_ERROR(ret, no_int, TAG, "install interrupt failed"); + i2s_ll_enable_intr(bus->hal.dev, I2S_LL_EVENT_TX_EOF, false); // disable interrupt temporarily + i2s_ll_clear_intr_status(bus->hal.dev, I2S_LL_EVENT_TX_EOF); // clear pending interrupt + // initialize DMA link + i2s_lcd_init_dma_link(bus); + // enable I2S LCD master mode (refer to I2S TRM) + i2s_ll_enable_lcd(bus->hal.dev, true); + i2s_ll_tx_stop_on_fifo_empty(bus->hal.dev, true); + i2s_ll_tx_bypass_pcm(bus->hal.dev, true); + i2s_ll_tx_set_slave_mod(bus->hal.dev, false); + i2s_ll_tx_set_bits_mod(bus->hal.dev, bus_config->bus_width); + i2s_ll_tx_set_chan_mod(bus->hal.dev, 1); // mono + bus->bus_width = bus_config->bus_width; + i2s_ll_tx_enable_right_first(bus->hal.dev, true); +#if SOC_I2S_SUPPORTS_DMA_EQUAL + i2s_ll_tx_enable_dma_equal(bus->hal.dev, true); +#endif + // enable trans done interrupt + i2s_ll_enable_intr(bus->hal.dev, I2S_LL_EVENT_TX_EOF, true); + // trigger a quick "trans done" event, and wait for the interrupt line goes active + // this could ensure we go into ISR handler next time we call `esp_intr_enable` + i2s_lcd_trigger_quick_trans_done_event(bus); + // configure GPIO + ret = i2s_lcd_configure_gpio(bus, bus_config); + ESP_GOTO_ON_ERROR(ret, invalid_gpio, TAG, "configure GPIO failed"); + // fill other i80 bus runtime parameters + LIST_INIT(&bus->device_list); // initialize device list head + bus->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED; + bus->dc_gpio_num = bus_config->dc_gpio_num; + bus->wr_gpio_num = bus_config->wr_gpio_num; + *ret_bus = bus; + ESP_LOGD(TAG, "new i80 bus(%d) @%p, %zu dma nodes, resolution %zuHz", bus->bus_id, bus, bus->num_dma_nodes, bus->resolution_hz); + return ESP_OK; + +invalid_gpio: + esp_intr_free(bus->intr); +no_int: + i2s_priv_deregister_object(bus->bus_id); +no_slot: + free(bus->format_buffer); +no_mem_format: + free(bus); +no_mem_bus: +err_arg: + return ret; +} + +esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus) +{ + esp_err_t ret = ESP_OK; + ESP_GOTO_ON_FALSE(bus, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); + ESP_GOTO_ON_FALSE(LIST_EMPTY(&bus->device_list), ESP_ERR_INVALID_STATE, err, TAG, "device list not empty"); + int bus_id = bus->bus_id; + esp_intr_free(bus->intr); + i2s_priv_deregister_object(bus_id); + free(bus->format_buffer); + free(bus); + ESP_LOGD(TAG, "del i80 bus(%d)", bus_id); +err: + return ret; +} + +esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_panel_io_i80_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io) +{ + esp_err_t ret = ESP_OK; + lcd_panel_io_i80_t *i80_device = NULL; + ESP_GOTO_ON_FALSE(bus && io_config && ret_io, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); + // because we set the I2S's left channel data same to right channel, so f_pclk = f_i2s/pclk_div/2 + uint32_t pclk_prescale = bus->resolution_hz / 2 / io_config->pclk_hz; + ESP_GOTO_ON_FALSE(pclk_prescale > 0 && pclk_prescale <= I2S_LL_BCK_MAX_PRESCALE, ESP_ERR_NOT_SUPPORTED, err, TAG, + "prescaler can't satisfy PCLK clock %u", io_config->pclk_hz); + i80_device = calloc(1, sizeof(lcd_panel_io_i80_t) + io_config->trans_queue_depth * sizeof(lcd_i80_trans_descriptor_t)); + ESP_GOTO_ON_FALSE(i80_device, ESP_ERR_NO_MEM, err, TAG, "no mem for i80 panel io"); + // create two queues for i80 device + i80_device->trans_queue = xQueueCreate(io_config->trans_queue_depth, sizeof(lcd_i80_trans_descriptor_t *)); + ESP_GOTO_ON_FALSE(i80_device->trans_queue, ESP_ERR_NO_MEM, err, TAG, "create trans queue failed"); + i80_device->done_queue = xQueueCreate(io_config->trans_queue_depth, sizeof(lcd_i80_trans_descriptor_t *)); + ESP_GOTO_ON_FALSE(i80_device->done_queue, ESP_ERR_NO_MEM, err, TAG, "create done queue failed"); + // adding device to list + portENTER_CRITICAL(&bus->spinlock); + LIST_INSERT_HEAD(&bus->device_list, i80_device, device_list_entry); + portEXIT_CRITICAL(&bus->spinlock); + // we don't initialize the i80 bus at the memont, but initialize the bus when start a transaction for a new device + // so save these as i80 device runtime parameters + i80_device->bus = bus; + i80_device->queue_size = io_config->trans_queue_depth; + i80_device->clock_prescale = pclk_prescale; + i80_device->lcd_cmd_bits = io_config->lcd_cmd_bits; + i80_device->lcd_param_bits = io_config->lcd_param_bits; + i80_device->pclk_hz = bus->resolution_hz / pclk_prescale / 2; + i80_device->dc_levels.dc_cmd_level = io_config->dc_levels.dc_cmd_level; + i80_device->dc_levels.dc_data_level = io_config->dc_levels.dc_data_level; + i80_device->cs_gpio_num = io_config->cs_gpio_num; + i80_device->on_color_trans_done = io_config->on_color_trans_done; + i80_device->cb_user_data = io_config->user_data; + i80_device->flags.cs_active_high = io_config->flags.cs_active_high; + i80_device->flags.swap_color_bytes = io_config->flags.swap_color_bytes; + i80_device->flags.pclk_idle_low = io_config->flags.pclk_idle_low; + // fill panel io function table + i80_device->base.del = panel_io_i80_del; + i80_device->base.tx_param = panel_io_i80_tx_param; + i80_device->base.tx_color = panel_io_i80_tx_color; + // CS signal is controlled by software + gpio_set_level(io_config->cs_gpio_num, !io_config->flags.cs_active_high); // de-assert by default + gpio_set_direction(io_config->cs_gpio_num, GPIO_MODE_OUTPUT); + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[io_config->cs_gpio_num], PIN_FUNC_GPIO); + *ret_io = &(i80_device->base); + ESP_LOGD(TAG, "new i80 lcd panel io @%p on bus(%d), pclk=%uHz", i80_device, bus->bus_id, i80_device->pclk_hz); + return ESP_OK; + +err: + if (i80_device) { + if (i80_device->trans_queue) { + vQueueDelete(i80_device->trans_queue); + } + if (i80_device->done_queue) { + vQueueDelete(i80_device->done_queue); + } + free(i80_device); + } + return ret; +} + +static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io) +{ + lcd_panel_io_i80_t *i80_device = __containerof(io, lcd_panel_io_i80_t, base); + esp_lcd_i80_bus_t *bus = i80_device->bus; + lcd_i80_trans_descriptor_t *trans_desc = NULL; + // wait all pending transaction to finish + for (size_t i = 0; i < i80_device->num_trans_inflight; i++) { + xQueueReceive(i80_device->done_queue, &trans_desc, portMAX_DELAY); + } + // remove from device list + portENTER_CRITICAL(&bus->spinlock); + LIST_REMOVE(i80_device, device_list_entry); + portEXIT_CRITICAL(&bus->spinlock); + + ESP_LOGD(TAG, "del i80 lcd panel io @%p", i80_device); + vQueueDelete(i80_device->trans_queue); + vQueueDelete(i80_device->done_queue); + free(i80_device); + return ESP_OK; +} + +static void i2s_lcd_prepare_cmd_buffer(lcd_i80_trans_descriptor_t *trans_desc, const void *cmd) +{ + lcd_panel_io_i80_t *i80_device = trans_desc->i80_device; + esp_lcd_i80_bus_t *bus = i80_device->bus; + uint8_t *from = (uint8_t *)cmd; + // LCD is big-endian, e.g. to send command 0x1234, byte 0x12 should appear on the data bus first + // However, the I2S peripheral will send 0x34 first, so we reversed the order below + if (bus->bus_width < i80_device->lcd_cmd_bits) { + int start = 0; + int end = i80_device->lcd_cmd_bits / 8 - 1; + lcd_com_reverse_buffer_bytes(from, start, end); + } +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + uint8_t *to = bus->format_buffer; + int cmd_cycle = i80_device->lcd_cmd_bits / bus->bus_width; + if (cmd_cycle * bus->bus_width < i80_device->lcd_cmd_bits) { + cmd_cycle++; + } + int bytes_to_copy = MIN(bus->bus_width, i80_device->lcd_cmd_bits) / 8; + int cnt_from = 0; + // format command buffer + for (int i = 0; i < cmd_cycle; i++) { + for (int j = 0; j < bytes_to_copy; j++) { + to[2 + j] = from[cnt_from++]; + } + to += 4; + } + trans_desc->data = bus->format_buffer; + trans_desc->data_length = cmd_cycle * 4; +#else + trans_desc->data = cmd; + trans_desc->data_length = MAX(i80_device->lcd_cmd_bits, bus->bus_width) / 8; +#endif +} + +static void i2s_lcd_prepare_param_buffer(lcd_i80_trans_descriptor_t *trans_desc, const void *param, size_t param_num) +{ + lcd_panel_io_i80_t *i80_device = trans_desc->i80_device; + esp_lcd_i80_bus_t *bus = i80_device->bus; + uint8_t *from = (uint8_t *)param; + int param_size = i80_device->lcd_param_bits / 8; + // LCD is big-endian, e.g. to send param 0x1234, byte 0x12 should appear on the data bus first + // However, the I2S peripheral will send 0x34 first, so we reversed the order below + if (bus->bus_width < i80_device->lcd_param_bits) { + for (size_t i = 0; i < param_num; i++) { + int start = i * param_size; + int end = start + param_size - 1; + lcd_com_reverse_buffer_bytes(from, start, end); + } + } +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + uint8_t *to = bus->format_buffer; + int param_cycle = i80_device->lcd_param_bits / bus->bus_width; + if (param_cycle * bus->bus_width < i80_device->lcd_param_bits) { + param_cycle++; + } + int ele_cycles = param_cycle * param_num; + int bytes_to_copy = MIN(bus->bus_width, i80_device->lcd_param_bits) / 8; + int cnt_from = 0; + // format parameter buffer + for (int i = 0; i < ele_cycles; i++) { + for (int j = 0; j < bytes_to_copy; j++) { + to[2 + j] = from[cnt_from++]; + } + to += 4; + } + trans_desc->data = bus->format_buffer; + trans_desc->data_length = ele_cycles * 4; +#else + uint8_t *to = bus->format_buffer; + uint8_t step = bus->bus_width / 8; + int param_cycle = i80_device->lcd_param_bits / bus->bus_width; + if (param_cycle * bus->bus_width < i80_device->lcd_param_bits) { + param_cycle++; + } + int ele_cycles = param_cycle * param_num; + int bytes_to_copy = MIN(bus->bus_width, i80_device->lcd_param_bits) / 8; + int cnt_from = 0; + // format parameter buffer + for (int i = 0; i < ele_cycles; i++) { + for (int j = 0; j < bytes_to_copy; j++) { + to[j] = from[cnt_from++]; + } + to += step; + } + trans_desc->data = bus->format_buffer; + trans_desc->data_length = to - bus->format_buffer; +#endif +} + +static void i2s_lcd_prepare_color_buffer(lcd_i80_trans_descriptor_t *trans_desc, const void *color, size_t color_size) +{ +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + lcd_panel_io_i80_t *i80_device = trans_desc->i80_device; + esp_lcd_i80_bus_t *bus = i80_device->bus; + uint8_t *from = (uint8_t *)color; + uint8_t *to = bus->format_buffer; + int bytes_to_copy = bus->bus_width / 8; + int cnt_from = 0; + int first_half = i80_device->flags.swap_color_bytes ? 0 : 2; + int second_half = i80_device->flags.swap_color_bytes ? 2 : 0; + // format color buffer + while (cnt_from < color_size) { + for (int i = 0; i < bytes_to_copy; i++) { + to[first_half + i] = from[cnt_from++]; + } + for (int i = 0; i < bytes_to_copy; i++) { + to[second_half + i] = from[cnt_from++]; + } + to += 4; + } + trans_desc->data = bus->format_buffer; + trans_desc->data_length = to - bus->format_buffer; +#else + trans_desc->data = color; + trans_desc->data_length = color_size; +#endif +} + +static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size) +{ + lcd_panel_io_i80_t *next_device = __containerof(io, lcd_panel_io_i80_t, base); + esp_lcd_i80_bus_t *bus = next_device->bus; + lcd_panel_io_i80_t *cur_device = bus->cur_device; + lcd_i80_trans_descriptor_t *trans_desc = NULL; + assert(param_size <= (bus->num_dma_nodes * DMA_DESCRIPTOR_BUFFER_MAX_SIZE) && "parameter bytes too long, enlarge max_transfer_bytes"); + assert(param_size <= CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE && "format buffer too small, increase CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE"); + + // before issue a polling transaction, need to wait queued transactions finished + for (size_t i = 0; i < next_device->num_trans_inflight; i++) { + xQueueReceive(next_device->done_queue, &trans_desc, portMAX_DELAY); + } + next_device->num_trans_inflight = 0; + + i2s_ll_clear_intr_status(bus->hal.dev, I2S_LL_EVENT_TX_EOF); + // switch devices if necessary + lcd_i80_switch_devices(cur_device, next_device); + trans_desc = &next_device->trans_pool[0]; + trans_desc->i80_device = next_device; + trans_desc->trans_done_cb = NULL; // no callback for command transfer + bus->cur_trans = trans_desc; +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + // switch to I2S 32bits mode, one WS cycle <=> one I2S FIFO + i2s_ll_tx_set_bits_mod(bus->hal.dev, 32); +#endif + i2s_lcd_prepare_cmd_buffer(trans_desc, &lcd_cmd); + lcd_com_mount_dma_data(bus->dma_nodes, trans_desc->data, trans_desc->data_length); + gpio_set_level(bus->dc_gpio_num, next_device->dc_levels.dc_cmd_level); + i2s_ll_tx_stop(bus->hal.dev); + i2s_ll_tx_reset(bus->hal.dev); // reset TX engine first + i2s_ll_start_out_link(bus->hal.dev); + // delay a while, wait for DMA data beeing feed to I2S FIFO + // in fact, this is only needed when LCD pixel clock is set too high + esp_rom_delay_us(1); + i2s_ll_tx_start(bus->hal.dev); + // polling the trans done event + while (!(i2s_ll_get_intr_status(bus->hal.dev) & I2S_LL_EVENT_TX_EOF)) {} + + // parameter is usually short, using polling mode + if (param && param_size) { + i2s_ll_clear_intr_status(bus->hal.dev, I2S_LL_EVENT_TX_EOF); + i2s_lcd_prepare_param_buffer(trans_desc, param, param_size * 8 / next_device->lcd_param_bits); + lcd_com_mount_dma_data(bus->dma_nodes, trans_desc->data, trans_desc->data_length); + gpio_set_level(bus->dc_gpio_num, next_device->dc_levels.dc_data_level); + i2s_ll_tx_stop(bus->hal.dev); + i2s_ll_tx_reset(bus->hal.dev); // reset TX engine first + i2s_ll_start_out_link(bus->hal.dev); + esp_rom_delay_us(1); + i2s_ll_tx_start(bus->hal.dev); + // polling the trans done event, but don't clear the event status + while (!(i2s_ll_get_intr_status(bus->hal.dev) & I2S_LL_EVENT_TX_EOF)) {} + } + bus->cur_trans = NULL; + return ESP_OK; +} + +static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size) +{ + lcd_panel_io_i80_t *next_device = __containerof(io, lcd_panel_io_i80_t, base); + esp_lcd_i80_bus_t *bus = next_device->bus; + lcd_panel_io_i80_t *cur_device = bus->cur_device; + lcd_i80_trans_descriptor_t *trans_desc = NULL; + assert(color_size <= (bus->num_dma_nodes * DMA_DESCRIPTOR_BUFFER_MAX_SIZE) && "color bytes too long, enlarge max_transfer_bytes"); + + // before issue a polling transaction, need to wait queued transactions finished + for (size_t i = 0; i < next_device->num_trans_inflight; i++) { + xQueueReceive(next_device->done_queue, &trans_desc, portMAX_DELAY); + } + next_device->num_trans_inflight = 0; + + i2s_ll_clear_intr_status(bus->hal.dev, I2S_LL_EVENT_TX_EOF); + // switch devices if necessary + lcd_i80_switch_devices(cur_device, next_device); + trans_desc = &next_device->trans_pool[0]; + trans_desc->i80_device = next_device; + trans_desc->trans_done_cb = NULL; // no callback for command transfer + bus->cur_trans = trans_desc; +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + // switch to I2S 32bits mode, one WS cycle <=> one I2S FIFO + i2s_ll_tx_set_bits_mod(bus->hal.dev, 32); +#endif + i2s_lcd_prepare_cmd_buffer(trans_desc, &lcd_cmd); + lcd_com_mount_dma_data(bus->dma_nodes, trans_desc->data, trans_desc->data_length); + gpio_set_level(bus->dc_gpio_num, next_device->dc_levels.dc_cmd_level); + i2s_ll_tx_stop(bus->hal.dev); + i2s_ll_tx_reset(bus->hal.dev); // reset TX engine first + i2s_ll_start_out_link(bus->hal.dev); + esp_rom_delay_us(1); + i2s_ll_tx_start(bus->hal.dev); + // polling the trans done event + while (!(i2s_ll_get_intr_status(bus->hal.dev) & I2S_LL_EVENT_TX_EOF)) {} + bus->cur_trans = NULL; + + // sending LCD color data to queue + trans_desc->trans_done_cb = next_device->on_color_trans_done; + trans_desc->cb_user_data = next_device->cb_user_data; + trans_desc->flags.dc_level = next_device->dc_levels.dc_data_level; // DC level for data transaction + i2s_lcd_prepare_color_buffer(trans_desc, color, color_size); + // send transaction to trans_queue + xQueueSend(next_device->trans_queue, &trans_desc, portMAX_DELAY); + next_device->num_trans_inflight++; + // enable interrupt and go into isr handler, where we fetch the transactions from trans_queue and start it + // we will go into `lcd_default_isr_handler` almost at once, because the "trans done" event is active at the moment + esp_intr_enable(bus->intr); + return ESP_OK; +} + +static unsigned long i2s_lcd_select_periph_clock(i2s_hal_context_t *hal) +{ + unsigned long resolution_hz = 0; + i2s_clock_src_t clock_source; +#if CONFIG_LCD_PERIPH_CLK_SRC_PLL160M + resolution_hz = 160000000 / LCD_PERIPH_CLOCK_PRE_SCALE; + clock_source = I2S_CLK_D2CLK; +#else +#error "invalid LCD peripheral clock source" +#endif + i2s_ll_tx_clk_set_src(hal->dev, clock_source); + i2s_ll_clk_cal_t clk_cal_config = { + .mclk_div = LCD_PERIPH_CLOCK_PRE_SCALE, + .a = 1, + .b = 0, + }; + i2s_ll_tx_set_clk(hal->dev, &clk_cal_config); + return resolution_hz; +} + +static esp_err_t i2s_lcd_init_dma_link(esp_lcd_i80_bus_handle_t bus) +{ + for (int i = 0; i < bus->num_dma_nodes; i++) { + bus->dma_nodes[i].dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_CPU; + bus->dma_nodes[i].next = &bus->dma_nodes[i + 1]; + } + bus->dma_nodes[bus->num_dma_nodes - 1].next = NULL; // one-off DMA chain + i2s_ll_dma_enable_eof_on_fifo_empty(bus->hal.dev, true); + i2s_ll_dma_enable_owner_check(bus->hal.dev, true); + i2s_ll_dma_enable_auto_write_back(bus->hal.dev, true); + i2s_ll_set_out_link_addr(bus->hal.dev, (uint32_t)bus->dma_nodes); + i2s_ll_enable_dma(bus->hal.dev, true); + return ESP_OK; +} + +static esp_err_t i2s_lcd_configure_gpio(esp_lcd_i80_bus_handle_t bus, const esp_lcd_i80_bus_config_t *bus_config) +{ + int bus_id = bus->bus_id; + // check validation of GPIO number + bool valid_gpio = (bus_config->wr_gpio_num >= 0) && (bus_config->dc_gpio_num >= 0); + for (size_t i = 0; i < bus_config->bus_width; i++) { + valid_gpio = valid_gpio && (bus_config->data_gpio_nums[i] >= 0); + } + if (!valid_gpio) { + return ESP_ERR_INVALID_ARG; + } + // connect peripheral signals via GPIO matrix + // data line + for (size_t i = 0; i < bus_config->bus_width; i++) { + gpio_set_direction(bus_config->data_gpio_nums[i], GPIO_MODE_OUTPUT); +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_signals.buses[bus_id].data_sigs[i + 8], false, false); +#else + esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_signals.buses[bus_id].data_sigs[i + SOC_LCD_I80_BUS_WIDTH - bus_config->bus_width], false, false); +#endif + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->data_gpio_nums[i]], PIN_FUNC_GPIO); + } + // WR signal (pclk) + gpio_set_direction(bus_config->wr_gpio_num, GPIO_MODE_OUTPUT); + esp_rom_gpio_connect_out_signal(bus_config->wr_gpio_num, lcd_periph_signals.buses[bus_id].wr_sig, true, false); + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->wr_gpio_num], PIN_FUNC_GPIO); + // DC signal is controlled by software, set as general purpose IO + gpio_set_direction(bus_config->dc_gpio_num, GPIO_MODE_OUTPUT); + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->dc_gpio_num], PIN_FUNC_GPIO); + return ESP_OK; +} + +static void i2s_lcd_trigger_quick_trans_done_event(esp_lcd_i80_bus_handle_t bus) +{ + // trigger a quick interrupt event by a dummy transaction, wait the LCD interrupt line goes active + // next time when esp_intr_enable is invoked, we can go into interrupt handler immediately + // where we dispatch transactions for i80 devices + static uint32_t fake_trigger = 0; + lcd_com_mount_dma_data(bus->dma_nodes, &fake_trigger, 4); + i2s_ll_start_out_link(bus->hal.dev); + i2s_ll_tx_start(bus->hal.dev); + while (!(i2s_ll_get_intr_status(bus->hal.dev) & I2S_LL_EVENT_TX_EOF)) {} +} + +static void lcd_i80_switch_devices(lcd_panel_io_i80_t *cur_device, lcd_panel_io_i80_t *next_device) +{ + // the caller should make sure the next_device and cur_device are attached to the same bus + esp_lcd_i80_bus_t *bus = next_device->bus; + if (next_device != cur_device) { + // reconfigure PCLK for the new device + i2s_ll_tx_set_bck_div_num(bus->hal.dev, next_device->clock_prescale); + if (cur_device) { // de-assert current device + gpio_set_level(cur_device->cs_gpio_num, !cur_device->flags.cs_active_high); + } + gpio_set_level(next_device->cs_gpio_num, next_device->flags.cs_active_high); // select the next device + // the WR signal (a.k.a the PCLK) generated by I2S is low level in idle stage + // but most of 8080 LCDs require the WR line to be in high level during idle stage + esp_rom_gpio_connect_out_signal(bus->wr_gpio_num, lcd_periph_signals.buses[bus->bus_id].wr_sig, !next_device->flags.pclk_idle_low, false); + } + bus->cur_device = next_device; +} + +static IRAM_ATTR void lcd_default_isr_handler(void *args) +{ + esp_lcd_i80_bus_t *bus = (esp_lcd_i80_bus_t *)args; + lcd_i80_trans_descriptor_t *trans_desc = NULL; + lcd_panel_io_i80_t *cur_device = NULL; + lcd_panel_io_i80_t *next_device = NULL; + BaseType_t high_task_woken = pdFALSE; + bool need_yield = false; + uint32_t intr_status = i2s_ll_get_intr_status(bus->hal.dev); + if (intr_status & I2S_LL_EVENT_TX_EOF) { // trans done event + // disable interrupt temporarily, only re-enable when there be remained transaction in the queue + esp_intr_disable(bus->intr); + trans_desc = bus->cur_trans; // the finished transaction + cur_device = bus->cur_device;// the working device + // process finished transaction + if (trans_desc) { + assert(trans_desc->i80_device == cur_device && "transaction device mismatch"); + // device callback + if (trans_desc->trans_done_cb) { + if (trans_desc->trans_done_cb(&cur_device->base, trans_desc->cb_user_data, NULL)) { + need_yield = true; + } + } + // move transaction to done_queue + high_task_woken = pdFALSE; + xQueueSendFromISR(cur_device->done_queue, &trans_desc, &high_task_woken); + if (high_task_woken == pdTRUE) { + need_yield = true; + } + bus->cur_trans = NULL; + } + // fetch transactions from devices' trans_queue + // Note: the first registered device will have the highest priority to be scheduled + LIST_FOREACH(next_device, &bus->device_list, device_list_entry) { + high_task_woken = pdFALSE; + if (xQueueReceiveFromISR(next_device->trans_queue, &trans_desc, &high_task_woken) == pdTRUE) { + if (high_task_woken == pdTRUE) { + need_yield = true; + } + // only clear the interrupt status when we're sure there still remains transaction to handle + i2s_ll_clear_intr_status(bus->hal.dev, I2S_LL_EVENT_TX_EOF); + // switch devices if necessary + lcd_i80_switch_devices(cur_device, next_device); + bus->cur_trans = trans_desc; + gpio_set_level(bus->dc_gpio_num, trans_desc->flags.dc_level); + // mount data to DMA links + lcd_com_mount_dma_data(bus->dma_nodes, trans_desc->data, trans_desc->data_length); +#if SOC_I2S_TRANS_SIZE_ALIGN_WORD + // switch to I2S 16bits mode, two WS cycle <=> one I2S FIFO + i2s_ll_tx_set_bits_mod(bus->hal.dev, 16); +#endif + // enable interrupt again, because the new transaction can trigger new trans done event + esp_intr_enable(bus->intr); + i2s_ll_tx_stop(bus->hal.dev); + i2s_ll_tx_reset(bus->hal.dev); // reset TX engine first + i2s_ll_start_out_link(bus->hal.dev); + esp_rom_delay_us(1); + i2s_ll_tx_start(bus->hal.dev); + break; // exit for-each loop + } + } + } + if (need_yield) { + portYIELD_FROM_ISR(); + } +} + +#endif // SOC_I2S_LCD_I80_VARIANT diff --git a/components/esp_lcd/src/esp_lcd_panel_io_i80.c b/components/esp_lcd/src/esp_lcd_panel_io_i80.c index d2a0981ccd..8cdad104f7 100644 --- a/components/esp_lcd/src/esp_lcd_panel_io_i80.c +++ b/components/esp_lcd/src/esp_lcd_panel_io_i80.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "freertos/FreeRTOS.h" #include "freertos/task.h" @@ -38,10 +39,10 @@ typedef struct esp_lcd_i80_bus_t esp_lcd_i80_bus_t; typedef struct lcd_panel_io_i80_t lcd_panel_io_i80_t; typedef struct lcd_i80_trans_descriptor_t lcd_i80_trans_descriptor_t; -static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size); -static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size); +static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size); +static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size); static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io); -static esp_err_t lcd_i80_bus_create_trans_link(esp_lcd_i80_bus_handle_t bus); +static esp_err_t lcd_i80_init_dma_link(esp_lcd_i80_bus_handle_t bus); static void lcd_periph_trigger_quick_trans_done_event(esp_lcd_i80_bus_handle_t bus); static esp_err_t lcd_i80_bus_configure_gpio(esp_lcd_i80_bus_handle_t bus, const esp_lcd_i80_bus_config_t *bus_config); static void lcd_i80_switch_devices(lcd_panel_io_i80_t *cur_device, lcd_panel_io_i80_t *next_device); @@ -52,15 +53,16 @@ struct esp_lcd_i80_bus_t { int bus_id; // Bus ID, index from 0 portMUX_TYPE spinlock; // spinlock used to protect i80 bus members(hal, device_list, cur_trans) lcd_hal_context_t hal; // Hal object - size_t data_width; // Number of data lines + size_t bus_width; // Number of data lines intr_handle_t intr; // LCD peripheral interrupt handle size_t num_dma_nodes; // Number of DMA descriptors + uint8_t *format_buffer; // The driver allocates an internal buffer for DMA to do data format transformer size_t resolution_hz; // LCD_CLK resolution, determined by selected clock source gdma_channel_handle_t dma_chan; // DMA channel handle lcd_i80_trans_descriptor_t *cur_trans; // Current transaction lcd_panel_io_i80_t *cur_device; // Current working device LIST_HEAD(i80_device_list, lcd_panel_io_i80_t) device_list; // Head of i80 device list - dma_descriptor_t dma_nodes[0]; // DMA descriptor pool, the descriptors are shared by all i80 devices + dma_descriptor_t dma_nodes[]; // DMA descriptor pool, the descriptors are shared by all i80 devices }; struct lcd_i80_trans_descriptor_t { @@ -82,24 +84,26 @@ struct lcd_panel_io_i80_t { QueueHandle_t trans_queue; // Transaction queue, transactions in this queue are pending for scheduler to dispatch QueueHandle_t done_queue; // Transaction done queue, transactions in this queue are finished but not recycled by the caller size_t queue_size; // Size of transaction queue - size_t num_trans_working; // Number of transactions that are undergoing (the descriptor not recycled yet) + size_t num_trans_inflight; // Number of transactions that are undergoing (the descriptor not recycled yet) + int lcd_cmd_bits; // Bit width of LCD command + int lcd_param_bits; // Bit width of LCD parameter void *cb_user_data; // private data used when transfer color data bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // color data trans done callback LIST_ENTRY(lcd_panel_io_i80_t) device_list_entry; // Entry of i80 device list struct { - int dc_idle_level: 1; // Level of DC line in IDLE phase - int dc_cmd_level: 1; // Level of DC line in CMD phase - int dc_dummy_level: 1; // Level of DC line in DUMMY phase - int dc_data_level: 1; // Level of DC line in DATA phase + unsigned int dc_idle_level: 1; // Level of DC line in IDLE phase + unsigned int dc_cmd_level: 1; // Level of DC line in CMD phase + unsigned int dc_dummy_level: 1; // Level of DC line in DUMMY phase + unsigned int dc_data_level: 1; // Level of DC line in DATA phase } dc_levels; struct { - int invert_cs: 1; // Whether to invert the CS line - int reverse_color_bits: 1; // Reverse the data bits, D[N:0] -> D[0:N] - int swap_color_bytes: 1; // Swap adjacent two data bytes before sending out - int pclk_active_neg: 1; // The display will write data lines when there's a falling edge on WR line - int pclk_idle_low: 1; // The WR line keeps at low level in IDLE phase + unsigned int cs_active_high: 1; // Whether the CS line is active on high level + unsigned int reverse_color_bits: 1; // Reverse the data bits, D[N:0] -> D[0:N] + unsigned int swap_color_bytes: 1; // Swap adjacent two data bytes before sending out + unsigned int pclk_active_neg: 1; // The display will write data lines when there's a falling edge on WR line + unsigned int pclk_idle_low: 1; // The WR line keeps at low level in IDLE phase } flags; - lcd_i80_trans_descriptor_t trans_pool[0]; // Transaction pool + lcd_i80_trans_descriptor_t trans_pool[]; // Transaction pool }; esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lcd_i80_bus_handle_t *ret_bus) @@ -112,6 +116,8 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc bus = heap_caps_calloc(1, sizeof(esp_lcd_i80_bus_t) + num_dma_nodes * sizeof(dma_descriptor_t), MALLOC_CAP_DMA); ESP_GOTO_ON_FALSE(bus, ESP_ERR_NO_MEM, no_mem_bus, TAG, "no mem for i80 bus"); bus->num_dma_nodes = num_dma_nodes; + bus->format_buffer = heap_caps_calloc(1, CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE, MALLOC_CAP_DMA); + ESP_GOTO_ON_FALSE(bus->format_buffer, ESP_ERR_NO_MEM, no_mem_format, TAG, "no mem for format buffer"); // register to platform int bus_id = lcd_com_register_device(LCD_COM_DEVICE_TYPE_I80, bus); ESP_GOTO_ON_FALSE(bus_id >= 0, ESP_ERR_NOT_FOUND, no_slot, TAG, "no free i80 bus slot"); @@ -126,7 +132,7 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc lcd_ll_enable_clock(bus->hal.dev, true); // install interrupt service, (LCD peripheral shares the same interrupt source with Camera peripheral with different mask) // interrupt is disabled by default - int isr_flags = ESP_INTR_FLAG_INTRDISABLED; + int isr_flags = ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED; ret = esp_intr_alloc_intrstatus(lcd_periph_signals.buses[bus_id].irq_id, isr_flags, (uint32_t)lcd_ll_get_interrupt_status_reg(bus->hal.dev), LCD_LL_EVENT_TRANS_DONE, lcd_default_isr_handler, bus, &bus->intr); @@ -134,13 +140,14 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc lcd_ll_enable_interrupt(bus->hal.dev, LCD_LL_EVENT_TRANS_DONE, false); // disable all interrupts lcd_ll_clear_interrupt_status(bus->hal.dev, UINT32_MAX); // clear pending interrupt // install DMA service - ret = lcd_i80_bus_create_trans_link(bus); + ret = lcd_i80_init_dma_link(bus); ESP_GOTO_ON_ERROR(ret, no_dma, TAG, "install DMA failed"); // set peripheral clock resolution bus->resolution_hz = lcd_com_select_periph_clock(&bus->hal); - // enable 8080 mode and set data width + // enable 8080 mode and set bus width lcd_ll_enable_rgb_mode(bus->hal.dev, false); - lcd_ll_set_data_width(bus->hal.dev, bus_config->data_width); + lcd_ll_set_data_width(bus->hal.dev, bus_config->bus_width); + bus->bus_width = lcd_ll_get_data_width(bus->hal.dev); // number of data cycles is controlled by DMA buffer size lcd_ll_enable_output_always_on(bus->hal.dev, true); // enable trans done interrupt @@ -154,7 +161,6 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc // fill other i80 bus runtime parameters LIST_INIT(&bus->device_list); // initialize device list head bus->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED; - bus->data_width = lcd_ll_get_data_width(bus->hal.dev); *ret_bus = bus; ESP_LOGD(TAG, "new i80 bus(%d) @%p, %zu dma nodes", bus_id, bus, bus->num_dma_nodes); return ESP_OK; @@ -168,6 +174,8 @@ no_int: periph_module_disable(lcd_periph_signals.buses[bus_id].module); lcd_com_remove_device(LCD_COM_DEVICE_TYPE_I80, bus->bus_id); no_slot: + free(bus->format_buffer); +no_mem_format: free(bus); no_mem_bus: err_arg: @@ -185,6 +193,7 @@ esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus) esp_intr_free(bus->intr); periph_module_disable(lcd_periph_signals.buses[bus_id].module); lcd_com_remove_device(LCD_COM_DEVICE_TYPE_I80, bus_id); + free(bus->format_buffer); free(bus); ESP_LOGD(TAG, "del i80 bus(%d)", bus_id); err: @@ -198,7 +207,7 @@ esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_p ESP_GOTO_ON_FALSE(bus && io_config && ret_io, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); // check if pixel clock setting is valid uint32_t pclk_prescale = bus->resolution_hz / io_config->pclk_hz; - ESP_GOTO_ON_FALSE(pclk_prescale <= LCD_LL_CLOCK_PRESCALE_MAX, ESP_ERR_NOT_SUPPORTED, err, TAG, + ESP_GOTO_ON_FALSE(pclk_prescale > 0 && pclk_prescale <= LCD_LL_CLOCK_PRESCALE_MAX, ESP_ERR_NOT_SUPPORTED, err, TAG, "prescaler can't satisfy PCLK clock %u", io_config->pclk_hz); i80_device = calloc(1, sizeof(lcd_panel_io_i80_t) + io_config->trans_queue_depth * sizeof(lcd_i80_trans_descriptor_t)); ESP_GOTO_ON_FALSE(i80_device, ESP_ERR_NO_MEM, err, TAG, "no mem for i80 panel io"); @@ -214,6 +223,8 @@ esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_p // we don't initialize the i80 bus at the memont, but initialize the bus when start a transaction for a new device // so save these as i80 device runtime parameters i80_device->bus = bus; + i80_device->lcd_cmd_bits = io_config->lcd_cmd_bits; + i80_device->lcd_param_bits = io_config->lcd_param_bits; i80_device->queue_size = io_config->trans_queue_depth; i80_device->clock_prescale = pclk_prescale; i80_device->pclk_hz = bus->resolution_hz / pclk_prescale; @@ -224,7 +235,7 @@ esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_p i80_device->cs_gpio_num = io_config->cs_gpio_num; i80_device->flags.reverse_color_bits = io_config->flags.reverse_color_bits; i80_device->flags.swap_color_bytes = io_config->flags.swap_color_bytes; - i80_device->flags.invert_cs = io_config->flags.invert_cs; + i80_device->flags.cs_active_high = io_config->flags.cs_active_high; i80_device->flags.pclk_idle_low = io_config->flags.pclk_idle_low; i80_device->flags.pclk_active_neg = io_config->flags.pclk_active_neg; i80_device->on_color_trans_done = io_config->on_color_trans_done; @@ -235,7 +246,7 @@ esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_p i80_device->base.tx_color = panel_io_i80_tx_color; // we only configure the CS GPIO as output, don't connect to the peripheral signal at the moment // we will connect the CS GPIO to peripheral signal when switching devices in lcd_i80_switch_devices() - gpio_set_level(io_config->cs_gpio_num, !io_config->flags.invert_cs); + gpio_set_level(io_config->cs_gpio_num, !io_config->flags.cs_active_high); gpio_set_direction(io_config->cs_gpio_num, GPIO_MODE_OUTPUT); gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[io_config->cs_gpio_num], PIN_FUNC_GPIO); *ret_io = &(i80_device->base); @@ -261,7 +272,7 @@ static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io) esp_lcd_i80_bus_t *bus = i80_device->bus; lcd_i80_trans_descriptor_t *trans_desc = NULL; // wait all pending transaction to finish - for (size_t i = 0; i < i80_device->num_trans_working; i++) { + for (size_t i = 0; i < i80_device->num_trans_inflight; i++) { xQueueReceive(i80_device->done_queue, &trans_desc, portMAX_DELAY); } // remove from device list @@ -276,31 +287,72 @@ static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io) return ESP_OK; } -static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size) +static void i80_lcd_prepare_cmd_buffer(esp_lcd_i80_bus_t *bus, lcd_panel_io_i80_t *i80_device, void *lcd_cmd) +{ + uint8_t *from = (uint8_t *)lcd_cmd; + if (bus->bus_width < i80_device->lcd_cmd_bits) { + // LCD is big-endian, e.g. to send command 0x1234, byte 0x12 should appear on the bus first + // However, the i80 peripheral will send 0x34 first, so we reversed the order below + int start = 0; + int end = i80_device->lcd_cmd_bits / 8 - 1; + lcd_com_reverse_buffer_bytes(from, start, end); + } +} + +static uint32_t i80_lcd_prepare_param_buffer(esp_lcd_i80_bus_t *bus, lcd_panel_io_i80_t *i80_device, const void *lcd_param, size_t param_size) +{ + int param_per_size = i80_device->lcd_param_bits / 8; + int param_num = param_size / param_per_size; + const uint8_t *from = (const uint8_t *)lcd_param; + uint8_t *to = bus->format_buffer; + uint8_t step = bus->bus_width / 8; + int param_cycle = i80_device->lcd_param_bits / bus->bus_width; + // in case bus_width=16 and param_bits=8, we still need 1 param_cycle + if (param_cycle * bus->bus_width < i80_device->lcd_param_bits) { + param_cycle++; + } + int ele_cycles = param_cycle * param_num; + int bytes_to_copy = MIN(bus->bus_width, i80_device->lcd_param_bits) / 8; + int cnt_from = 0; + // expand the width of parameters when necessary + for (int i = 0; i < ele_cycles; i++) { + for (int j = 0; j < bytes_to_copy; j++) { + to[j] = from[cnt_from++]; + } + to += step; + } + return to - bus->format_buffer; +} + +static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size) { lcd_panel_io_i80_t *next_device = __containerof(io, lcd_panel_io_i80_t, base); esp_lcd_i80_bus_t *bus = next_device->bus; lcd_panel_io_i80_t *cur_device = bus->cur_device; lcd_i80_trans_descriptor_t *trans_desc = NULL; assert(param_size <= (bus->num_dma_nodes * DMA_DESCRIPTOR_BUFFER_MAX_SIZE) && "parameter bytes too long, enlarge max_transfer_bytes"); - uint32_t cmd_cycles = lcd_cmd_bits / bus->data_width; - // in case data_width=16 and cmd_bits=8, we still need 1 cmd_cycle - if (cmd_cycles * bus->data_width < lcd_cmd_bits) { + assert(param_size <= CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE && "format buffer too small, increase CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE"); + uint32_t cmd_cycles = next_device->lcd_cmd_bits / bus->bus_width; + // in case bus_width=16 and cmd_bits=8, we still need 1 cmd_cycle + if (cmd_cycles * bus->bus_width < next_device->lcd_cmd_bits) { cmd_cycles++; } + i80_lcd_prepare_cmd_buffer(bus, next_device, &lcd_cmd); + uint32_t param_len = i80_lcd_prepare_param_buffer(bus, next_device, param, param_size); // wait all pending transaction in the queue to finish - for (size_t i = 0; i < next_device->num_trans_working; i++) { + for (size_t i = 0; i < next_device->num_trans_inflight; i++) { xQueueReceive(next_device->done_queue, &trans_desc, portMAX_DELAY); } - next_device->num_trans_working = 0; + next_device->num_trans_inflight = 0; uint32_t intr_status = lcd_ll_get_interrupt_status(bus->hal.dev); lcd_ll_clear_interrupt_status(bus->hal.dev, intr_status); // switch devices if necessary lcd_i80_switch_devices(cur_device, next_device); - // don't reverse bit/bytes for parameters + // set data format + lcd_ll_reverse_data_byte_order(bus->hal.dev, false); lcd_ll_reverse_data_bit_order(bus->hal.dev, false); - lcd_ll_reverse_data_byte_order(bus->hal.dev, bus->data_width, false); + lcd_ll_reverse_data_8bits_order(bus->hal.dev, next_device->lcd_param_bits > bus->bus_width); bus->cur_trans = NULL; bus->cur_device = next_device; // package a transaction @@ -308,34 +360,35 @@ static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, int trans_desc->i80_device = next_device; trans_desc->cmd_cycles = cmd_cycles; trans_desc->cmd_value = lcd_cmd; - trans_desc->data = param; - trans_desc->data_length = param_size; + trans_desc->data = param ? bus->format_buffer : NULL; + trans_desc->data_length = param ? param_len : 0; trans_desc->trans_done_cb = NULL; // no callback for parameter transaction // mount data to DMA links lcd_com_mount_dma_data(bus->dma_nodes, trans_desc->data, trans_desc->data_length); lcd_start_transaction(bus, trans_desc); // polling the trans done event, but don't clear the event status - while (!(lcd_ll_get_interrupt_status(bus->hal.dev) & LCD_LL_EVENT_TRANS_DONE)); + while (!(lcd_ll_get_interrupt_status(bus->hal.dev) & LCD_LL_EVENT_TRANS_DONE)) {} return ESP_OK; } -static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size) +static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size) { lcd_panel_io_i80_t *i80_device = __containerof(io, lcd_panel_io_i80_t, base); esp_lcd_i80_bus_t *bus = i80_device->bus; lcd_i80_trans_descriptor_t *trans_desc = NULL; assert(color_size <= (bus->num_dma_nodes * DMA_DESCRIPTOR_BUFFER_MAX_SIZE) && "color bytes too long, enlarge max_transfer_bytes"); - // in case data_width=16 and cmd_bits=8, we still need 1 cmd_cycle - uint32_t cmd_cycles = lcd_cmd_bits / bus->data_width; - if (cmd_cycles * bus->data_width < lcd_cmd_bits) { + // in case bus_width=16 and cmd_bits=8, we still need 1 cmd_cycle + uint32_t cmd_cycles = i80_device->lcd_cmd_bits / bus->bus_width; + if (cmd_cycles * bus->bus_width < i80_device->lcd_cmd_bits) { cmd_cycles++; } - if (i80_device->num_trans_working < i80_device->queue_size) { - trans_desc = &i80_device->trans_pool[i80_device->num_trans_working]; + i80_lcd_prepare_cmd_buffer(bus, i80_device, &lcd_cmd); + if (i80_device->num_trans_inflight < i80_device->queue_size) { + trans_desc = &i80_device->trans_pool[i80_device->num_trans_inflight]; } else { // transaction pool has used up, recycle one from done_queue xQueueReceive(i80_device->done_queue, &trans_desc, portMAX_DELAY); - i80_device->num_trans_working--; + i80_device->num_trans_inflight--; } trans_desc->i80_device = i80_device; trans_desc->cmd_cycles = cmd_cycles; @@ -346,14 +399,14 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int trans_desc->cb_user_data = i80_device->cb_user_data; // send transaction to trans_queue xQueueSend(i80_device->trans_queue, &trans_desc, portMAX_DELAY); - i80_device->num_trans_working++; + i80_device->num_trans_inflight++; // enable interrupt and go into isr handler, where we fetch the transactions from trans_queue and start it // we will go into `lcd_default_isr_handler` almost at once, because the "trans done" event is active at the moment esp_intr_enable(bus->intr); return ESP_OK; } -static esp_err_t lcd_i80_bus_create_trans_link(esp_lcd_i80_bus_handle_t bus) +static esp_err_t lcd_i80_init_dma_link(esp_lcd_i80_bus_handle_t bus) { esp_err_t ret = ESP_OK; // chain DMA descriptors @@ -387,24 +440,24 @@ static esp_err_t lcd_i80_bus_configure_gpio(esp_lcd_i80_bus_handle_t bus, const int bus_id = bus->bus_id; // check validation of GPIO number bool valid_gpio = (bus_config->wr_gpio_num >= 0) && (bus_config->dc_gpio_num >= 0); - for (size_t i = 0; i < bus_config->data_width; i++) { + for (size_t i = 0; i < bus_config->bus_width; i++) { valid_gpio = valid_gpio && (bus_config->data_gpio_nums[i] >= 0); } if (!valid_gpio) { return ESP_ERR_INVALID_ARG; } // connect peripheral signals via GPIO matrix - for (size_t i = 0; i < bus_config->data_width; i++) { - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->data_gpio_nums[i]], PIN_FUNC_GPIO); + for (size_t i = 0; i < bus_config->bus_width; i++) { gpio_set_direction(bus_config->data_gpio_nums[i], GPIO_MODE_OUTPUT); esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_signals.buses[bus_id].data_sigs[i], false, false); + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->data_gpio_nums[i]], PIN_FUNC_GPIO); } - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->dc_gpio_num], PIN_FUNC_GPIO); gpio_set_direction(bus_config->dc_gpio_num, GPIO_MODE_OUTPUT); esp_rom_gpio_connect_out_signal(bus_config->dc_gpio_num, lcd_periph_signals.buses[bus_id].dc_sig, false, false); - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->wr_gpio_num], PIN_FUNC_GPIO); + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->dc_gpio_num], PIN_FUNC_GPIO); gpio_set_direction(bus_config->wr_gpio_num, GPIO_MODE_OUTPUT); esp_rom_gpio_connect_out_signal(bus_config->wr_gpio_num, lcd_periph_signals.buses[bus_id].wr_sig, false, false); + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->wr_gpio_num], PIN_FUNC_GPIO); return ESP_OK; } @@ -415,7 +468,7 @@ static void lcd_periph_trigger_quick_trans_done_event(esp_lcd_i80_bus_handle_t b // where we dispatch transactions for i80 devices lcd_ll_set_phase_cycles(bus->hal.dev, 0, 1, 0); lcd_ll_start(bus->hal.dev); - while (!(lcd_ll_get_interrupt_status(bus->hal.dev) & LCD_LL_EVENT_TRANS_DONE)); + while (!(lcd_ll_get_interrupt_status(bus->hal.dev) & LCD_LL_EVENT_TRANS_DONE)) {} } static void lcd_start_transaction(esp_lcd_i80_bus_t *bus, lcd_i80_trans_descriptor_t *trans_desc) @@ -423,7 +476,7 @@ static void lcd_start_transaction(esp_lcd_i80_bus_t *bus, lcd_i80_trans_descript // by default, the dummy phase is disabled because it's not common for most LCDs // Number of data phase cycles are controlled by DMA buffer length, we only need to enable/disable the phase here lcd_ll_set_phase_cycles(bus->hal.dev, trans_desc->cmd_cycles, 0, trans_desc->data ? 1 : 0); - lcd_ll_set_command(bus->hal.dev, bus->data_width, trans_desc->cmd_value); + lcd_ll_set_command(bus->hal.dev, bus->bus_width, trans_desc->cmd_value); if (trans_desc->data) { // some specific LCD commands can have no parameters gdma_start(bus->dma_chan, (intptr_t)(bus->dma_nodes)); } @@ -448,7 +501,7 @@ static void lcd_i80_switch_devices(lcd_panel_io_i80_t *cur_device, lcd_panel_io_ } // connect CS signal to the new device esp_rom_gpio_connect_out_signal(next_device->cs_gpio_num, lcd_periph_signals.buses[bus->bus_id].cs_sig, - next_device->flags.invert_cs, false); + next_device->flags.cs_active_high, false); } } @@ -498,7 +551,8 @@ IRAM_ATTR static void lcd_default_isr_handler(void *args) lcd_i80_switch_devices(cur_device, next_device); // only reverse data bit/bytes for color data lcd_ll_reverse_data_bit_order(bus->hal.dev, next_device->flags.reverse_color_bits); - lcd_ll_reverse_data_byte_order(bus->hal.dev, bus->data_width, next_device->flags.swap_color_bytes); + lcd_ll_reverse_data_byte_order(bus->hal.dev, next_device->flags.swap_color_bytes); + lcd_ll_reverse_data_8bits_order(bus->hal.dev, false); bus->cur_trans = trans_desc; bus->cur_device = next_device; // mount data to DMA links diff --git a/components/esp_lcd/src/esp_lcd_panel_io_spi.c b/components/esp_lcd/src/esp_lcd_panel_io_spi.c index f8c2d2baf2..68a0395278 100644 --- a/components/esp_lcd/src/esp_lcd_panel_io_spi.c +++ b/components/esp_lcd/src/esp_lcd_panel_io_spi.c @@ -18,8 +18,8 @@ static const char *TAG = "lcd_panel.io.spi"; -static esp_err_t panel_io_spi_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size); -static esp_err_t panel_io_spi_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size); +static esp_err_t panel_io_spi_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size); +static esp_err_t panel_io_spi_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size); static esp_err_t panel_io_spi_del(esp_lcd_panel_io_t *io); static void lcd_spi_pre_trans_cb(spi_transaction_t *trans); static void lcd_spi_post_trans_color_cb(spi_transaction_t *trans); @@ -39,12 +39,14 @@ typedef struct { bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // User register's callback, invoked when color data trans done void *user_data; // User's private data, passed directly to callback on_color_trans_done size_t queue_size; // Size of transaction queue - size_t num_trans_working; // Number of transactions that are undergoing (the descriptor not recycled yet) + size_t num_trans_inflight; // Number of transactions that are undergoing (the descriptor not recycled yet) + int lcd_cmd_bits; // Bit width of LCD command + int lcd_param_bits; // Bit width of LCD parameter struct { - int dc_as_cmd_phase: 1; // D/C line value is encoded into SPI transaction command phase - int dc_data_level: 1; // Indicates the level of DC line when tranfering data + unsigned int dc_as_cmd_phase: 1; // D/C line value is encoded into SPI transaction command phase + unsigned int dc_data_level: 1; // Indicates the level of DC line when tranfering data } flags; - lcd_spi_trans_descriptor_t trans_pool[0]; // Transaction pool + lcd_spi_trans_descriptor_t trans_pool[]; // Transaction pool } esp_lcd_panel_io_spi_t; esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_panel_io_spi_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io) @@ -81,6 +83,8 @@ esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_p spi_panel_io->flags.dc_as_cmd_phase = io_config->flags.dc_as_cmd_phase; spi_panel_io->flags.dc_data_level = !io_config->flags.dc_low_on_data; spi_panel_io->on_color_trans_done = io_config->on_color_trans_done; + spi_panel_io->lcd_cmd_bits = io_config->lcd_cmd_bits; + spi_panel_io->lcd_param_bits = io_config->lcd_param_bits; spi_panel_io->user_data = io_config->user_data; spi_panel_io->dc_gpio_num = io_config->dc_gpio_num; spi_panel_io->queue_size = io_config->trans_queue_depth; @@ -109,7 +113,7 @@ static esp_err_t panel_io_spi_del(esp_lcd_panel_io_t *io) esp_lcd_panel_io_spi_t *spi_panel_io = __containerof(io, esp_lcd_panel_io_spi_t, base); // wait all pending transaction to finish - for (size_t i = 0; i < spi_panel_io->num_trans_working; i++) { + for (size_t i = 0; i < spi_panel_io->num_trans_inflight; i++) { ret = spi_device_get_trans_result(spi_panel_io->spi_dev, &spi_trans, portMAX_DELAY); ESP_GOTO_ON_ERROR(ret, err, TAG, "recycle spi transactions failed"); } @@ -124,7 +128,7 @@ err: return ret; } -static esp_err_t panel_io_spi_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size) +static esp_err_t panel_io_spi_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size) { esp_err_t ret = ESP_OK; spi_transaction_t *spi_trans = NULL; @@ -132,16 +136,16 @@ static esp_err_t panel_io_spi_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, int esp_lcd_panel_io_spi_t *spi_panel_io = __containerof(io, esp_lcd_panel_io_spi_t, base); // before issue a polling transaction, need to wait queued transactions finished - for (size_t i = 0; i < spi_panel_io->num_trans_working; i++) { + for (size_t i = 0; i < spi_panel_io->num_trans_inflight; i++) { ret = spi_device_get_trans_result(spi_panel_io->spi_dev, &spi_trans, portMAX_DELAY); ESP_GOTO_ON_ERROR(ret, err, TAG, "recycle spi transactions failed"); } - spi_panel_io->num_trans_working = 0; + spi_panel_io->num_trans_inflight = 0; lcd_trans = &spi_panel_io->trans_pool[0]; memset(lcd_trans, 0, sizeof(lcd_spi_trans_descriptor_t)); lcd_trans->base.user = spi_panel_io; lcd_trans->flags.dc_gpio_level = !spi_panel_io->flags.dc_data_level; // set D/C line to command mode - lcd_trans->base.length = lcd_cmd_bits; + lcd_trans->base.length = spi_panel_io->lcd_cmd_bits; lcd_trans->base.tx_buffer = &lcd_cmd; if (spi_panel_io->flags.dc_as_cmd_phase) { // encoding DC value to SPI command phase when necessary lcd_trans->base.cmd = !spi_panel_io->flags.dc_data_level; @@ -166,7 +170,7 @@ err: return ret; } -static esp_err_t panel_io_spi_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size) +static esp_err_t panel_io_spi_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size) { esp_err_t ret = ESP_OK; spi_transaction_t *spi_trans = NULL; @@ -174,16 +178,16 @@ static esp_err_t panel_io_spi_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int esp_lcd_panel_io_spi_t *spi_panel_io = __containerof(io, esp_lcd_panel_io_spi_t, base); // before issue a polling transaction, need to wait queued transactions finished - for (size_t i = 0; i < spi_panel_io->num_trans_working; i++) { + for (size_t i = 0; i < spi_panel_io->num_trans_inflight; i++) { ret = spi_device_get_trans_result(spi_panel_io->spi_dev, &spi_trans, portMAX_DELAY); ESP_GOTO_ON_ERROR(ret, err, TAG, "recycle spi transactions failed"); } - spi_panel_io->num_trans_working = 0; + spi_panel_io->num_trans_inflight = 0; lcd_trans = &spi_panel_io->trans_pool[0]; memset(lcd_trans, 0, sizeof(lcd_spi_trans_descriptor_t)); lcd_trans->base.user = spi_panel_io; lcd_trans->flags.dc_gpio_level = !spi_panel_io->flags.dc_data_level; // set D/C line to command mode - lcd_trans->base.length = lcd_cmd_bits; + lcd_trans->base.length = spi_panel_io->lcd_cmd_bits; lcd_trans->base.tx_buffer = &lcd_cmd; if (spi_panel_io->flags.dc_as_cmd_phase) { // encoding DC value to SPI command phase when necessary lcd_trans->base.cmd = !spi_panel_io->flags.dc_data_level; @@ -203,7 +207,7 @@ static esp_err_t panel_io_spi_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, int // color data is usually large, using queue+blocking mode ret = spi_device_queue_trans(spi_panel_io->spi_dev, &lcd_trans->base, portMAX_DELAY); ESP_GOTO_ON_ERROR(ret, err, TAG, "spi transmit (queue) color failed"); - spi_panel_io->num_trans_working++; + spi_panel_io->num_trans_inflight++; err: return ret; diff --git a/components/esp_lcd/src/esp_lcd_panel_nt35510.c b/components/esp_lcd/src/esp_lcd_panel_nt35510.c new file mode 100644 index 0000000000..33c2399410 --- /dev/null +++ b/components/esp_lcd/src/esp_lcd_panel_nt35510.c @@ -0,0 +1,280 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +// #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG + +#include +#include +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "esp_lcd_panel_interface.h" +#include "esp_lcd_panel_io.h" +#include "esp_lcd_panel_vendor.h" +#include "esp_lcd_panel_ops.h" +#include "esp_lcd_panel_commands.h" +#include "driver/gpio.h" +#include "esp_log.h" +#include "esp_check.h" + +static const char *TAG = "lcd_panel.nt35510"; + +static esp_err_t panel_nt35510_del(esp_lcd_panel_t *panel); +static esp_err_t panel_nt35510_reset(esp_lcd_panel_t *panel); +static esp_err_t panel_nt35510_init(esp_lcd_panel_t *panel); +static esp_err_t panel_nt35510_draw_bitmap(esp_lcd_panel_t *panel, int x_start, int y_start, int x_end, int y_end, const void *color_data); +static esp_err_t panel_nt35510_invert_color(esp_lcd_panel_t *panel, bool invert_color_data); +static esp_err_t panel_nt35510_mirror(esp_lcd_panel_t *panel, bool mirror_x, bool mirror_y); +static esp_err_t panel_nt35510_swap_xy(esp_lcd_panel_t *panel, bool swap_axes); +static esp_err_t panel_nt35510_set_gap(esp_lcd_panel_t *panel, int x_gap, int y_gap); +static esp_err_t panel_nt35510_disp_off(esp_lcd_panel_t *panel, bool off); + +typedef struct { + esp_lcd_panel_t base; + esp_lcd_panel_io_handle_t io; + int reset_gpio_num; + bool reset_level; + int x_gap; + int y_gap; + unsigned int bits_per_pixel; + uint8_t madctl_val; // save current value of LCD_CMD_MADCTL register + uint8_t colmod_cal; // save surrent value of LCD_CMD_COLMOD register +} nt35510_panel_t; + +esp_err_t esp_lcd_new_panel_nt35510(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel) +{ + esp_err_t ret = ESP_OK; + nt35510_panel_t *nt35510 = NULL; + ESP_GOTO_ON_FALSE(io && panel_dev_config && ret_panel, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); + nt35510 = calloc(1, sizeof(nt35510_panel_t)); + ESP_GOTO_ON_FALSE(nt35510, ESP_ERR_NO_MEM, err, TAG, "no mem for nt35510 panel"); + + if (panel_dev_config->reset_gpio_num >= 0) { + gpio_config_t io_conf = { + .mode = GPIO_MODE_OUTPUT, + .pin_bit_mask = 1ULL << panel_dev_config->reset_gpio_num, + }; + ESP_GOTO_ON_ERROR(gpio_config(&io_conf), err, TAG, "configure GPIO for RST line failed"); + } + + switch (panel_dev_config->color_space) { + case ESP_LCD_COLOR_SPACE_RGB: + nt35510->madctl_val = 0; + break; + case ESP_LCD_COLOR_SPACE_BGR: + nt35510->madctl_val |= LCD_CMD_BGR_BIT; + break; + default: + ESP_GOTO_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, err, TAG, "unsupported color space"); + break; + } + + switch (panel_dev_config->bits_per_pixel) { + case 16: + nt35510->colmod_cal = 0x55; + break; + case 18: + nt35510->colmod_cal = 0x66; + break; + case 24: + nt35510->colmod_cal = 0x77; + break; + default: + ESP_GOTO_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, err, TAG, "unsupported pixel width"); + break; + } + + nt35510->io = io; + nt35510->bits_per_pixel = panel_dev_config->bits_per_pixel; + nt35510->reset_gpio_num = panel_dev_config->reset_gpio_num; + nt35510->reset_level = panel_dev_config->flags.reset_active_high; + nt35510->base.del = panel_nt35510_del; + nt35510->base.reset = panel_nt35510_reset; + nt35510->base.init = panel_nt35510_init; + nt35510->base.draw_bitmap = panel_nt35510_draw_bitmap; + nt35510->base.invert_color = panel_nt35510_invert_color; + nt35510->base.set_gap = panel_nt35510_set_gap; + nt35510->base.mirror = panel_nt35510_mirror; + nt35510->base.swap_xy = panel_nt35510_swap_xy; + nt35510->base.disp_off = panel_nt35510_disp_off; + *ret_panel = &(nt35510->base); + ESP_LOGD(TAG, "new nt35510 panel @%p", nt35510); + + return ESP_OK; + +err: + if (nt35510) { + if (panel_dev_config->reset_gpio_num >= 0) { + gpio_reset_pin(panel_dev_config->reset_gpio_num); + } + free(nt35510); + } + return ret; +} + +static esp_err_t panel_nt35510_del(esp_lcd_panel_t *panel) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + + if (nt35510->reset_gpio_num >= 0) { + gpio_reset_pin(nt35510->reset_gpio_num); + } + ESP_LOGD(TAG, "del nt35510 panel @%p", nt35510); + free(nt35510); + return ESP_OK; +} + +static esp_err_t panel_nt35510_reset(esp_lcd_panel_t *panel) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + esp_lcd_panel_io_handle_t io = nt35510->io; + + // perform hardware reset + if (nt35510->reset_gpio_num >= 0) { + gpio_set_level(nt35510->reset_gpio_num, nt35510->reset_level); + vTaskDelay(pdMS_TO_TICKS(10)); + gpio_set_level(nt35510->reset_gpio_num, !nt35510->reset_level); + vTaskDelay(pdMS_TO_TICKS(10)); + } else { + // perform software reset + esp_lcd_panel_io_tx_param(io, LCD_CMD_SWRESET << 8, NULL, 0); + vTaskDelay(pdMS_TO_TICKS(20)); // spec, wait at least 5m before sending new command + } + + return ESP_OK; +} + +static esp_err_t panel_nt35510_init(esp_lcd_panel_t *panel) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + esp_lcd_panel_io_handle_t io = nt35510->io; + // LCD goes into sleep mode and display will be turned off after power on reset, exit sleep mode first + esp_lcd_panel_io_tx_param(io, LCD_CMD_SLPOUT << 8, NULL, 0); + vTaskDelay(pdMS_TO_TICKS(100)); + esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL << 8, (uint16_t[]) { + 0 + }, 2); + esp_lcd_panel_io_tx_param(io, LCD_CMD_COLMOD << 8, (uint16_t[]) { + nt35510->colmod_cal, + }, 2); + // turn on display + esp_lcd_panel_io_tx_param(io, LCD_CMD_DISPON << 8, NULL, 0); + + return ESP_OK; +} + +static esp_err_t panel_nt35510_draw_bitmap(esp_lcd_panel_t *panel, int x_start, int y_start, int x_end, int y_end, const void *color_data) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + assert((x_start < x_end) && (y_start < y_end) && "start position must be smaller than end position"); + esp_lcd_panel_io_handle_t io = nt35510->io; + + x_start += nt35510->x_gap; + x_end += nt35510->x_gap; + y_start += nt35510->y_gap; + y_end += nt35510->y_gap; + + // define an area of frame memory where MCU can access + esp_lcd_panel_io_tx_param(io, (LCD_CMD_CASET << 8) + 0, (uint16_t[]) { + (x_start >> 8) & 0xFF, + }, 2); + esp_lcd_panel_io_tx_param(io, (LCD_CMD_CASET << 8) + 1, (uint16_t[]) { + x_start & 0xFF, + }, 2); + esp_lcd_panel_io_tx_param(io, (LCD_CMD_CASET << 8) + 2, (uint16_t[]) { + ((x_end - 1) >> 8) & 0xFF, + }, 2); + esp_lcd_panel_io_tx_param(io, (LCD_CMD_CASET << 8) + 3, (uint16_t[]) { + (x_end - 1) & 0xFF, + }, 2); + esp_lcd_panel_io_tx_param(io, (LCD_CMD_RASET << 8) + 0, (uint16_t[]) { + (y_start >> 8) & 0xFF, + }, 2); + esp_lcd_panel_io_tx_param(io, (LCD_CMD_RASET << 8) + 1, (uint16_t[]) { + y_start & 0xFF, + }, 2); + esp_lcd_panel_io_tx_param(io, (LCD_CMD_RASET << 8) + 2, (uint16_t[]) { + ((y_end - 1) >> 8) & 0xFF, + }, 2); + esp_lcd_panel_io_tx_param(io, (LCD_CMD_RASET << 8) + 3, (uint16_t[]) { + (y_end - 1) & 0xFF, + }, 2); + // transfer frame buffer + size_t len = (x_end - x_start) * (y_end - y_start) * nt35510->bits_per_pixel / 8; + esp_lcd_panel_io_tx_color(io, LCD_CMD_RAMWR << 8, color_data, len); + + return ESP_OK; +} + +static esp_err_t panel_nt35510_invert_color(esp_lcd_panel_t *panel, bool invert_color_data) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + esp_lcd_panel_io_handle_t io = nt35510->io; + int command = 0; + if (invert_color_data) { + command = LCD_CMD_INVON; + } else { + command = LCD_CMD_INVOFF; + } + esp_lcd_panel_io_tx_param(io, command << 8, NULL, 0); + return ESP_OK; +} + +static esp_err_t panel_nt35510_mirror(esp_lcd_panel_t *panel, bool mirror_x, bool mirror_y) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + esp_lcd_panel_io_handle_t io = nt35510->io; + if (mirror_x) { + nt35510->madctl_val |= LCD_CMD_MX_BIT; + } else { + nt35510->madctl_val &= ~LCD_CMD_MX_BIT; + } + if (mirror_y) { + nt35510->madctl_val |= LCD_CMD_MY_BIT; + } else { + nt35510->madctl_val &= ~LCD_CMD_MY_BIT; + } + esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL << 8, (uint16_t[]) { + nt35510->madctl_val + }, 2); + return ESP_OK; +} + +static esp_err_t panel_nt35510_swap_xy(esp_lcd_panel_t *panel, bool swap_axes) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + esp_lcd_panel_io_handle_t io = nt35510->io; + if (swap_axes) { + nt35510->madctl_val |= LCD_CMD_MV_BIT; + } else { + nt35510->madctl_val &= ~LCD_CMD_MV_BIT; + } + esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL << 8, (uint16_t[]) { + nt35510->madctl_val + }, 2); + return ESP_OK; +} + +static esp_err_t panel_nt35510_set_gap(esp_lcd_panel_t *panel, int x_gap, int y_gap) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + nt35510->x_gap = x_gap; + nt35510->y_gap = y_gap; + return ESP_OK; +} + +static esp_err_t panel_nt35510_disp_off(esp_lcd_panel_t *panel, bool off) +{ + nt35510_panel_t *nt35510 = __containerof(panel, nt35510_panel_t, base); + esp_lcd_panel_io_handle_t io = nt35510->io; + int command = 0; + if (off) { + command = LCD_CMD_DISPOFF; + } else { + command = LCD_CMD_DISPON; + } + esp_lcd_panel_io_tx_param(io, command << 8, NULL, 0); + return ESP_OK; +} diff --git a/components/esp_lcd/src/esp_lcd_panel_ssd1306.c b/components/esp_lcd/src/esp_lcd_panel_ssd1306.c index 9481df82dd..9e56a1548b 100644 --- a/components/esp_lcd/src/esp_lcd_panel_ssd1306.c +++ b/components/esp_lcd/src/esp_lcd_panel_ssd1306.c @@ -130,14 +130,14 @@ static esp_err_t panel_ssd1306_init(esp_lcd_panel_t *panel) { ssd1306_panel_t *ssd1306 = __containerof(panel, ssd1306_panel_t, base); esp_lcd_panel_io_handle_t io = ssd1306->io; - esp_lcd_panel_io_tx_param(io, SSD1306_CMD_DISP_OFF, 8, NULL, 0); - esp_lcd_panel_io_tx_param(io, SSD1306_CMD_SET_MEMORY_ADDR_MODE, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, SSD1306_CMD_DISP_OFF, NULL, 0); + esp_lcd_panel_io_tx_param(io, SSD1306_CMD_SET_MEMORY_ADDR_MODE, (uint8_t[]) { 0x00 // horizontal addressing mode }, 1); - esp_lcd_panel_io_tx_param(io, SSD1306_CMD_SET_CHARGE_PUMP, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, SSD1306_CMD_SET_CHARGE_PUMP, (uint8_t[]) { 0x14 // enable charge pump }, 1); - esp_lcd_panel_io_tx_param(io, SSD1306_CMD_DISP_ON, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, SSD1306_CMD_DISP_ON, NULL, 0); // SEG/COM will be ON after 100ms after sending DISP_ON command vTaskDelay(pdMS_TO_TICKS(100)); return ESP_OK; @@ -157,17 +157,17 @@ static esp_err_t panel_ssd1306_draw_bitmap(esp_lcd_panel_t *panel, int x_start, uint8_t page_start = y_start / 8; uint8_t page_end = (y_end - 1) / 8; // define an area of frame memory where MCU can access - esp_lcd_panel_io_tx_param(io, SSD1306_CMD_SET_COLUMN_RANGE, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, SSD1306_CMD_SET_COLUMN_RANGE, (uint8_t[]) { (x_start & 0x7F), ((x_end - 1) & 0x7F), }, 2); - esp_lcd_panel_io_tx_param(io, SSD1306_CMD_SET_PAGE_RANGE, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, SSD1306_CMD_SET_PAGE_RANGE, (uint8_t[]) { (page_start & 0x07), (page_end & 0x07), }, 2); // transfer frame buffer size_t len = (y_end - y_start) * (x_end - x_start) * ssd1306->bits_per_pixel / 8; - esp_lcd_panel_io_tx_color(io, 0, 0, color_data, len); + esp_lcd_panel_io_tx_color(io, 0, color_data, len); return ESP_OK; } @@ -182,7 +182,7 @@ static esp_err_t panel_ssd1306_invert_color(esp_lcd_panel_t *panel, bool invert_ } else { command = SSD1306_CMD_INVERT_OFF; } - esp_lcd_panel_io_tx_param(io, command, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, command, NULL, 0); return ESP_OK; } @@ -197,13 +197,13 @@ static esp_err_t panel_ssd1306_mirror(esp_lcd_panel_t *panel, bool mirror_x, boo } else { command = SSD1306_CMD_MIRROR_X_OFF; } - esp_lcd_panel_io_tx_param(io, command, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, command, NULL, 0); if (mirror_y) { command = SSD1306_CMD_MIRROR_Y_ON; } else { command = SSD1306_CMD_MIRROR_X_OFF; } - esp_lcd_panel_io_tx_param(io, command, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, command, NULL, 0); return ESP_OK; } @@ -230,6 +230,6 @@ static esp_err_t panel_ssd1306_disp_off(esp_lcd_panel_t *panel, bool off) } else { command = SSD1306_CMD_DISP_ON; } - esp_lcd_panel_io_tx_param(io, command, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, command, NULL, 0); return ESP_OK; } diff --git a/components/esp_lcd/src/esp_lcd_panel_st7789.c b/components/esp_lcd/src/esp_lcd_panel_st7789.c index 1bddafebfd..834bdc894d 100644 --- a/components/esp_lcd/src/esp_lcd_panel_st7789.c +++ b/components/esp_lcd/src/esp_lcd_panel_st7789.c @@ -82,6 +82,7 @@ esp_err_t esp_lcd_new_panel_st7789(const esp_lcd_panel_io_handle_t io, const esp ESP_GOTO_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, err, TAG, "unsupported pixel width"); break; } + st7789->io = io; st7789->bits_per_pixel = panel_dev_config->bits_per_pixel; st7789->reset_gpio_num = panel_dev_config->reset_gpio_num; @@ -134,8 +135,8 @@ static esp_err_t panel_st7789_reset(esp_lcd_panel_t *panel) gpio_set_level(st7789->reset_gpio_num, !st7789->reset_level); vTaskDelay(pdMS_TO_TICKS(10)); } else { // perform software reset - esp_lcd_panel_io_tx_param(io, LCD_CMD_SWRESET, 8, NULL, 0); - vTaskDelay(pdMS_TO_TICKS(10)); // spec, wait at least 5m before sending new command + esp_lcd_panel_io_tx_param(io, LCD_CMD_SWRESET, NULL, 0); + vTaskDelay(pdMS_TO_TICKS(20)); // spec, wait at least 5m before sending new command } return ESP_OK; @@ -146,16 +147,16 @@ static esp_err_t panel_st7789_init(esp_lcd_panel_t *panel) st7789_panel_t *st7789 = __containerof(panel, st7789_panel_t, base); esp_lcd_panel_io_handle_t io = st7789->io; // LCD goes into sleep mode and display will be turned off after power on reset, exit sleep mode first - esp_lcd_panel_io_tx_param(io, LCD_CMD_SLPOUT, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, LCD_CMD_SLPOUT, NULL, 0); vTaskDelay(pdMS_TO_TICKS(100)); - esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL, (uint8_t[]) { 0 }, 1); - esp_lcd_panel_io_tx_param(io, LCD_CMD_COLMOD, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, LCD_CMD_COLMOD, (uint8_t[]) { st7789->colmod_cal, }, 1); // turn on display - esp_lcd_panel_io_tx_param(io, LCD_CMD_DISPON, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, LCD_CMD_DISPON, NULL, 0); return ESP_OK; } @@ -172,13 +173,13 @@ static esp_err_t panel_st7789_draw_bitmap(esp_lcd_panel_t *panel, int x_start, i y_end += st7789->y_gap; // define an area of frame memory where MCU can access - esp_lcd_panel_io_tx_param(io, LCD_CMD_CASET, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, LCD_CMD_CASET, (uint8_t[]) { (x_start >> 8) & 0xFF, x_start & 0xFF, ((x_end - 1) >> 8) & 0xFF, (x_end - 1) & 0xFF, }, 4); - esp_lcd_panel_io_tx_param(io, LCD_CMD_RASET, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, LCD_CMD_RASET, (uint8_t[]) { (y_start >> 8) & 0xFF, y_start & 0xFF, ((y_end - 1) >> 8) & 0xFF, @@ -186,7 +187,7 @@ static esp_err_t panel_st7789_draw_bitmap(esp_lcd_panel_t *panel, int x_start, i }, 4); // transfer frame buffer size_t len = (x_end - x_start) * (y_end - y_start) * st7789->bits_per_pixel / 8; - esp_lcd_panel_io_tx_color(io, LCD_CMD_RAMWR, 8, color_data, len); + esp_lcd_panel_io_tx_color(io, LCD_CMD_RAMWR, color_data, len); return ESP_OK; } @@ -201,7 +202,7 @@ static esp_err_t panel_st7789_invert_color(esp_lcd_panel_t *panel, bool invert_c } else { command = LCD_CMD_INVOFF; } - esp_lcd_panel_io_tx_param(io, command, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, command, NULL, 0); return ESP_OK; } @@ -219,7 +220,7 @@ static esp_err_t panel_st7789_mirror(esp_lcd_panel_t *panel, bool mirror_x, bool } else { st7789->madctl_val &= ~LCD_CMD_MY_BIT; } - esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL, (uint8_t[]) { st7789->madctl_val }, 1); return ESP_OK; @@ -234,7 +235,7 @@ static esp_err_t panel_st7789_swap_xy(esp_lcd_panel_t *panel, bool swap_axes) } else { st7789->madctl_val &= ~LCD_CMD_MV_BIT; } - esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io, LCD_CMD_MADCTL, (uint8_t[]) { st7789->madctl_val }, 1); return ESP_OK; @@ -258,6 +259,6 @@ static esp_err_t panel_st7789_disp_off(esp_lcd_panel_t *panel, bool off) } else { command = LCD_CMD_DISPON; } - esp_lcd_panel_io_tx_param(io, command, 8, NULL, 0); + esp_lcd_panel_io_tx_param(io, command, NULL, 0); return ESP_OK; } diff --git a/components/esp_lcd/src/esp_lcd_rgb_panel.c b/components/esp_lcd/src/esp_lcd_rgb_panel.c index b62daf9481..692c03f35a 100644 --- a/components/esp_lcd/src/esp_lcd_rgb_panel.c +++ b/components/esp_lcd/src/esp_lcd_rgb_panel.c @@ -117,7 +117,7 @@ esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_conf if (alloc_from_psram) { rgb_panel->fb = heap_caps_calloc(1, fb_size, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT); } else { - rgb_panel->fb = heap_caps_calloc(1, fb_size, MALLOC_CAP_INTERNAL); + rgb_panel->fb = heap_caps_calloc(1, fb_size, MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA); } ESP_GOTO_ON_FALSE(rgb_panel->fb, ESP_ERR_NO_MEM, no_mem_fb, TAG, "no mem for frame buffer"); rgb_panel->fb_size = fb_size; diff --git a/components/esp_lcd/test/test_i2c_lcd_panel.c b/components/esp_lcd/test/test_i2c_lcd_panel.c index 188d6797ac..204b7eeae4 100644 --- a/components/esp_lcd/test/test_i2c_lcd_panel.c +++ b/components/esp_lcd/test/test_i2c_lcd_panel.c @@ -46,6 +46,8 @@ TEST_CASE("lcd panel with i2c interface (ssd1306)", "[lcd]") .dev_addr = TEST_I2C_DEV_ADDR, .control_phase_bytes = 1, // According to SSD1306 datasheet .dc_bit_offset = 6, // According to SSD1306 datasheet + .lcd_cmd_bits = 8, // According to SSD1306 datasheet + .lcd_param_bits = 8, // According to SSD1306 datasheet }; TEST_ESP_OK(esp_lcd_new_panel_io_i2c((esp_lcd_i2c_bus_handle_t)TEST_I2C_HOST_ID, &io_config, &io_handle)); @@ -104,6 +106,8 @@ TEST_CASE("lvgl gui with i2c interface (ssd1306)", "[lcd][lvgl][ignore]") .dev_addr = TEST_I2C_DEV_ADDR, .control_phase_bytes = 1, // According to SSD1306 datasheet .dc_bit_offset = 6, // According to SSD1306 datasheet + .lcd_cmd_bits = 8, // According to SSD1306 datasheet + .lcd_param_bits = 8, // According to SSD1306 datasheet .on_color_trans_done = notify_lvgl_ready_to_flush, .user_data = &disp, }; diff --git a/components/esp_lcd/test/test_i80_board.h b/components/esp_lcd/test/test_i80_board.h new file mode 100644 index 0000000000..088adad2f8 --- /dev/null +++ b/components/esp_lcd/test/test_i80_board.h @@ -0,0 +1,72 @@ +#include "sdkconfig.h" + +#define TEST_LCD_H_RES (240) +#define TEST_LCD_V_RES (280) + +#if CONFIG_IDF_TARGET_ESP32S3 +#define TEST_LCD_BK_LIGHT_GPIO (1) +#define TEST_LCD_RST_GPIO (2) +#define TEST_LCD_CS_GPIO (3) +#define TEST_LCD_DC_GPIO (4) +#define TEST_LCD_PCLK_GPIO (5) +#define TEST_LCD_DATA0_GPIO (6) +#define TEST_LCD_DATA1_GPIO (7) +#define TEST_LCD_DATA2_GPIO (8) +#define TEST_LCD_DATA3_GPIO (9) +#define TEST_LCD_DATA4_GPIO (10) +#define TEST_LCD_DATA5_GPIO (11) +#define TEST_LCD_DATA6_GPIO (12) +#define TEST_LCD_DATA7_GPIO (13) +#define TEST_LCD_DATA8_GPIO (14) +#define TEST_LCD_DATA9_GPIO (15) +#define TEST_LCD_DATA10_GPIO (16) +#define TEST_LCD_DATA11_GPIO (17) +#define TEST_LCD_DATA12_GPIO (18) +#define TEST_LCD_DATA13_GPIO (19) +#define TEST_LCD_DATA14_GPIO (20) +#define TEST_LCD_DATA15_GPIO (21) +#elif CONFIG_IDF_TARGET_ESP32S2 +#define TEST_LCD_BK_LIGHT_GPIO (0) +#define TEST_LCD_RST_GPIO (18) +#define TEST_LCD_CS_GPIO (19) +#define TEST_LCD_DC_GPIO (38) +#define TEST_LCD_PCLK_GPIO (33) +#define TEST_LCD_DATA0_GPIO (1) +#define TEST_LCD_DATA1_GPIO (10) +#define TEST_LCD_DATA2_GPIO (2) +#define TEST_LCD_DATA3_GPIO (11) +#define TEST_LCD_DATA4_GPIO (3) +#define TEST_LCD_DATA5_GPIO (12) +#define TEST_LCD_DATA6_GPIO (4) +#define TEST_LCD_DATA7_GPIO (13) +#define TEST_LCD_DATA8_GPIO (5) +#define TEST_LCD_DATA9_GPIO (14) +#define TEST_LCD_DATA10_GPIO (6) +#define TEST_LCD_DATA11_GPIO (15) +#define TEST_LCD_DATA12_GPIO (7) +#define TEST_LCD_DATA13_GPIO (16) +#define TEST_LCD_DATA14_GPIO (8) +#define TEST_LCD_DATA15_GPIO (17) +#elif CONFIG_IDF_TARGET_ESP32 +#define TEST_LCD_BK_LIGHT_GPIO (2) +#define TEST_LCD_RST_GPIO (-1) +#define TEST_LCD_CS_GPIO (4) +#define TEST_LCD_DC_GPIO (5) +#define TEST_LCD_PCLK_GPIO (18) +#define TEST_LCD_DATA0_GPIO (19) +#define TEST_LCD_DATA1_GPIO (21) +#define TEST_LCD_DATA2_GPIO (0) +#define TEST_LCD_DATA3_GPIO (22) +#define TEST_LCD_DATA4_GPIO (23) +#define TEST_LCD_DATA5_GPIO (33) +#define TEST_LCD_DATA6_GPIO (32) +#define TEST_LCD_DATA7_GPIO (27) +#define TEST_LCD_DATA8_GPIO (12) +#define TEST_LCD_DATA9_GPIO (13) +#define TEST_LCD_DATA10_GPIO (14) +#define TEST_LCD_DATA11_GPIO (15) +#define TEST_LCD_DATA12_GPIO (26) +#define TEST_LCD_DATA13_GPIO (25) +#define TEST_LCD_DATA14_GPIO (16) +#define TEST_LCD_DATA15_GPIO (17) +#endif diff --git a/components/esp_lcd/test/test_i80_lcd_panel.c b/components/esp_lcd/test/test_i80_lcd_panel.c index ea7d8d531f..fc07add0c2 100644 --- a/components/esp_lcd/test/test_i80_lcd_panel.c +++ b/components/esp_lcd/test/test_i80_lcd_panel.c @@ -7,74 +7,9 @@ #include "esp_lcd_panel_ops.h" #include "soc/soc_caps.h" #include "driver/gpio.h" +#include "test_i80_board.h" -#define TEST_LCD_H_RES (240) -#define TEST_LCD_V_RES (280) -#define TEST_LCD_BK_LIGHT_GPIO (1) -#define TEST_LCD_RST_GPIO (2) -#define TEST_LCD_CS_GPIO (4) -#define TEST_LCD_DC_GPIO (5) -#define TEST_LCD_PCLK_GPIO (6) -#define TEST_LCD_DATA0_GPIO (33) -#define TEST_LCD_DATA1_GPIO (34) -#define TEST_LCD_DATA2_GPIO (35) -#define TEST_LCD_DATA3_GPIO (36) -#define TEST_LCD_DATA4_GPIO (37) -#define TEST_LCD_DATA5_GPIO (38) -#define TEST_LCD_DATA6_GPIO (39) -#define TEST_LCD_DATA7_GPIO (40) -#define TEST_LCD_DATA8_GPIO (41) -#define TEST_LCD_DATA9_GPIO (42) -#define TEST_LCD_DATA10_GPIO (15) -#define TEST_LCD_DATA11_GPIO (16) -#define TEST_LCD_DATA12_GPIO (17) -#define TEST_LCD_DATA13_GPIO (18) -#define TEST_LCD_DATA14_GPIO (19) -#define TEST_LCD_DATA15_GPIO (20) - -#if SOC_LCD_I80_SUPPORTED -TEST_CASE("lcd i80 bus and device allocation", "[lcd]") -{ - esp_lcd_i80_bus_handle_t i80_buses[SOC_LCD_I80_BUSES] = {}; - esp_lcd_i80_bus_config_t bus_config = { - .dc_gpio_num = TEST_LCD_DC_GPIO, - .wr_gpio_num = TEST_LCD_PCLK_GPIO, - .data_gpio_nums = { - TEST_LCD_DATA0_GPIO, - TEST_LCD_DATA1_GPIO, - TEST_LCD_DATA2_GPIO, - TEST_LCD_DATA3_GPIO, - TEST_LCD_DATA4_GPIO, - TEST_LCD_DATA5_GPIO, - TEST_LCD_DATA6_GPIO, - TEST_LCD_DATA7_GPIO, - }, - .data_width = 8, - .max_transfer_bytes = TEST_LCD_H_RES * 40 * sizeof(uint16_t) - }; - for (int i = 0; i < SOC_LCD_I80_BUSES; i++) { - TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_buses[i])); - } - TEST_ASSERT_EQUAL(ESP_ERR_NOT_FOUND, esp_lcd_new_i80_bus(&bus_config, &i80_buses[0])); - esp_lcd_panel_io_handle_t io_handles[10] = {}; - esp_lcd_panel_io_i80_config_t io_config = { - .cs_gpio_num = TEST_LCD_CS_GPIO, - .pclk_hz = 5000000, - .trans_queue_depth = 4, - }; - for (int i = 0; i < 10; i++) { - TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_buses[0], &io_config, &io_handles[i])); - } - // can't delete bus handle before we delete all devices - TEST_ASSERT_EQUAL(ESP_ERR_INVALID_STATE, esp_lcd_del_i80_bus(i80_buses[0])); - for (int i = 0; i < 10; i++) { - TEST_ESP_OK(esp_lcd_panel_io_del(io_handles[i])); - } - for (int i = 0; i < SOC_LCD_I80_BUSES; i++) { - TEST_ESP_OK(esp_lcd_del_i80_bus(i80_buses[i])); - } -} - +#if SOC_LCDCAM_SUPPORTED TEST_CASE("lcd i80 device swap color bytes", "[lcd]") { esp_lcd_i80_bus_handle_t i80_bus = NULL; @@ -91,7 +26,7 @@ TEST_CASE("lcd i80 device swap color bytes", "[lcd]") TEST_LCD_DATA6_GPIO, TEST_LCD_DATA7_GPIO, }, - .data_width = 8, + .bus_width = 8, .max_transfer_bytes = 20, }; TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); @@ -107,6 +42,8 @@ TEST_CASE("lcd i80 device swap color bytes", "[lcd]") .dc_dummy_level = 0, .dc_data_level = 1, }, + .lcd_cmd_bits = 8, + .lcd_param_bits = 8, }; io_config.flags.reverse_color_bits = 0; @@ -123,10 +60,10 @@ TEST_CASE("lcd i80 device swap color bytes", "[lcd]") TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handles[3])); for (int i = 0; i < 4; i++) { - esp_lcd_panel_io_tx_param(io_handles[i], 0xA5, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io_handles[i], 0xA5, (uint8_t[]) { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06 }, 6); - esp_lcd_panel_io_tx_color(io_handles[i], 0x5A, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_color(io_handles[i], 0x5A, (uint8_t[]) { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06 }, 6); TEST_ESP_OK(esp_lcd_panel_io_del(io_handles[i])); @@ -151,7 +88,7 @@ TEST_CASE("lcd i80 device clock mode", "[lcd]") TEST_LCD_DATA6_GPIO, TEST_LCD_DATA7_GPIO, }, - .data_width = 8, + .bus_width = 8, .max_transfer_bytes = 20, }; TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); @@ -167,6 +104,8 @@ TEST_CASE("lcd i80 device clock mode", "[lcd]") .dc_dummy_level = 0, .dc_data_level = 1, }, + .lcd_cmd_bits = 8, + .lcd_param_bits = 8, }; io_config.flags.pclk_idle_low = 0; @@ -183,15 +122,177 @@ TEST_CASE("lcd i80 device clock mode", "[lcd]") TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handles[3])); for (int i = 0; i < 4; i++) { - esp_lcd_panel_io_tx_param(io_handles[i], 0xA5, 8, (uint8_t[]) { + esp_lcd_panel_io_tx_param(io_handles[i], 0xA5, (uint8_t[]) { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06 }, 6); TEST_ESP_OK(esp_lcd_panel_io_del(io_handles[i])); } TEST_ESP_OK(esp_lcd_del_i80_bus(i80_bus)); } +#endif // SOC_LCDCAM_SUPPORTED -TEST_CASE("lcd panel with i80 interface (st7789)", "[lcd]") +#if SOC_LCD_I80_SUPPORTED +TEST_CASE("lcd i80 bus and device allocation", "[lcd]") +{ + esp_lcd_i80_bus_handle_t i80_buses[SOC_LCD_I80_BUSES] = {}; + esp_lcd_i80_bus_config_t bus_config = { + .dc_gpio_num = TEST_LCD_DC_GPIO, + .wr_gpio_num = TEST_LCD_PCLK_GPIO, + .data_gpio_nums = { + TEST_LCD_DATA0_GPIO, + TEST_LCD_DATA1_GPIO, + TEST_LCD_DATA2_GPIO, + TEST_LCD_DATA3_GPIO, + TEST_LCD_DATA4_GPIO, + TEST_LCD_DATA5_GPIO, + TEST_LCD_DATA6_GPIO, + TEST_LCD_DATA7_GPIO, + }, + .bus_width = 8, + .max_transfer_bytes = TEST_LCD_H_RES * 40 * sizeof(uint16_t) + }; + for (int i = 0; i < SOC_LCD_I80_BUSES; i++) { + TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_buses[i])); + } + TEST_ASSERT_EQUAL(ESP_ERR_NOT_FOUND, esp_lcd_new_i80_bus(&bus_config, &i80_buses[0])); + esp_lcd_panel_io_handle_t io_handles[10] = {}; + esp_lcd_panel_io_i80_config_t io_config = { + .cs_gpio_num = TEST_LCD_CS_GPIO, + .pclk_hz = 5000000, + .trans_queue_depth = 4, + .lcd_cmd_bits = 8, + .lcd_param_bits = 8, + }; + for (int i = 0; i < 10; i++) { + TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_buses[0], &io_config, &io_handles[i])); + } + // can't delete bus handle before we delete all devices + TEST_ASSERT_EQUAL(ESP_ERR_INVALID_STATE, esp_lcd_del_i80_bus(i80_buses[0])); + for (int i = 0; i < 10; i++) { + TEST_ESP_OK(esp_lcd_panel_io_del(io_handles[i])); + } + for (int i = 0; i < SOC_LCD_I80_BUSES; i++) { + TEST_ESP_OK(esp_lcd_del_i80_bus(i80_buses[i])); + } +} + +TEST_CASE("lcd panel i80 io test", "[lcd]") +{ + esp_lcd_i80_bus_handle_t i80_bus = NULL; + esp_lcd_i80_bus_config_t bus_config = { + .dc_gpio_num = TEST_LCD_DC_GPIO, + .wr_gpio_num = TEST_LCD_PCLK_GPIO, + .data_gpio_nums = { + TEST_LCD_DATA0_GPIO, + TEST_LCD_DATA1_GPIO, + TEST_LCD_DATA2_GPIO, + TEST_LCD_DATA3_GPIO, + TEST_LCD_DATA4_GPIO, + TEST_LCD_DATA5_GPIO, + TEST_LCD_DATA6_GPIO, + TEST_LCD_DATA7_GPIO, + TEST_LCD_DATA8_GPIO, + TEST_LCD_DATA9_GPIO, + TEST_LCD_DATA10_GPIO, + TEST_LCD_DATA11_GPIO, + TEST_LCD_DATA12_GPIO, + TEST_LCD_DATA13_GPIO, + TEST_LCD_DATA14_GPIO, + TEST_LCD_DATA15_GPIO, + }, + .bus_width = 16, + .max_transfer_bytes = 100, + }; + esp_lcd_panel_io_handle_t io_handle = NULL; + esp_lcd_panel_io_i80_config_t io_config = { + .cs_gpio_num = TEST_LCD_CS_GPIO, + .pclk_hz = 8000000, // 8MHz + .trans_queue_depth = 10, + .dc_levels = { + .dc_idle_level = 0, + .dc_cmd_level = 0, + .dc_dummy_level = 0, + .dc_data_level = 1, + }, + }; + esp_lcd_panel_handle_t panel_handle = NULL; + esp_lcd_panel_dev_config_t panel_config = { + .reset_gpio_num = TEST_LCD_RST_GPIO, + .color_space = ESP_LCD_COLOR_SPACE_RGB, + .bits_per_pixel = 16, + }; + +// On esp32, GPIO16 and GPIO17 are connected to PSRAM, and we don't have other spare GPIOs can be used in the test +// so we skip the 16bit test on esp32 when PSRAM is enabled +#if !CONFIG_ESP32_SPIRAM_SUPPORT + printf("testing bus-width=16bit, cmd/param bit-width=8bit\r\n"); + bus_config.bus_width = 16; + TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); + io_config.lcd_cmd_bits = 8; + io_config.lcd_param_bits = 8; + TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle)); + TEST_ESP_OK(esp_lcd_new_panel_st7789(io_handle, &panel_config, &panel_handle)); + + esp_lcd_panel_io_tx_param(io_handle, 0x1A, NULL, 0); + esp_lcd_panel_io_tx_param(io_handle, 0x1B, (uint8_t[]) { + 0x11, 0x22, 0x33 + }, 3); + esp_lcd_panel_io_tx_param(io_handle, 0x1C, NULL, 0); + TEST_ESP_OK(esp_lcd_panel_del(panel_handle)); + TEST_ESP_OK(esp_lcd_panel_io_del(io_handle)); + TEST_ESP_OK(esp_lcd_del_i80_bus(i80_bus)); + + printf("testing bus-width=16bit, cmd/param bit-width=16bit\r\n"); + bus_config.bus_width = 16; + TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); + io_config.lcd_cmd_bits = 16; + io_config.lcd_param_bits = 16; + TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle)); + TEST_ESP_OK(esp_lcd_new_panel_nt35510(io_handle, &panel_config, &panel_handle)); + esp_lcd_panel_io_tx_param(io_handle, 0x1A01, NULL, 0); + esp_lcd_panel_io_tx_param(io_handle, 0x1B02, (uint16_t[]) { + 0x11, 0x22, 0x33 + }, 6); + esp_lcd_panel_io_tx_param(io_handle, 0x1C03, NULL, 0); + TEST_ESP_OK(esp_lcd_panel_del(panel_handle)); + TEST_ESP_OK(esp_lcd_panel_io_del(io_handle)); + TEST_ESP_OK(esp_lcd_del_i80_bus(i80_bus)); +#endif + + printf("testing bus-width=8bit, cmd/param bit-width=8bit\r\n"); + bus_config.bus_width = 8; + TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); + io_config.lcd_cmd_bits = 8; + io_config.lcd_param_bits = 8; + TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle)); + TEST_ESP_OK(esp_lcd_new_panel_st7789(io_handle, &panel_config, &panel_handle)); + esp_lcd_panel_io_tx_param(io_handle, 0x1A, NULL, 0); + esp_lcd_panel_io_tx_param(io_handle, 0x1B, (uint8_t[]) { + 0x11, 0x22, 0x33 + }, 3); + esp_lcd_panel_io_tx_param(io_handle, 0x1C, NULL, 0); + TEST_ESP_OK(esp_lcd_panel_del(panel_handle)); + TEST_ESP_OK(esp_lcd_panel_io_del(io_handle)); + TEST_ESP_OK(esp_lcd_del_i80_bus(i80_bus)); + + printf("testing bus-width=8bit, cmd/param bit-width=16bit\r\n"); + bus_config.bus_width = 8; + TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); + io_config.lcd_cmd_bits = 16; + io_config.lcd_param_bits = 16; + TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle)); + TEST_ESP_OK(esp_lcd_new_panel_nt35510(io_handle, &panel_config, &panel_handle)); + esp_lcd_panel_io_tx_param(io_handle, 0x1A01, NULL, 0); + esp_lcd_panel_io_tx_param(io_handle, 0x1B02, (uint16_t[]) { + 0x11, 0x22, 0x33 + }, 6); + esp_lcd_panel_io_tx_param(io_handle, 0x1C03, NULL, 0); + TEST_ESP_OK(esp_lcd_panel_del(panel_handle)); + TEST_ESP_OK(esp_lcd_panel_io_del(io_handle)); + TEST_ESP_OK(esp_lcd_del_i80_bus(i80_bus)); +} + +TEST_CASE("lcd panel with i80 interface (st7789, 8bits)", "[lcd]") { #define TEST_IMG_SIZE (100 * 100 * sizeof(uint16_t)) uint8_t *img = heap_caps_malloc(TEST_IMG_SIZE, MALLOC_CAP_DMA); @@ -217,14 +318,14 @@ TEST_CASE("lcd panel with i80 interface (st7789)", "[lcd]") TEST_LCD_DATA6_GPIO, TEST_LCD_DATA7_GPIO, }, - .data_width = 8, + .bus_width = 8, .max_transfer_bytes = TEST_IMG_SIZE + 10, }; TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); esp_lcd_panel_io_handle_t io_handle = NULL; esp_lcd_panel_io_i80_config_t io_config = { .cs_gpio_num = TEST_LCD_CS_GPIO, - .pclk_hz = 5000000, + .pclk_hz = 8000000, // 8MHz .trans_queue_depth = 10, .dc_levels = { .dc_idle_level = 0, @@ -232,6 +333,8 @@ TEST_CASE("lcd panel with i80 interface (st7789)", "[lcd]") .dc_dummy_level = 0, .dc_data_level = 1, }, + .lcd_cmd_bits = 8, + .lcd_param_bits = 8, }; TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle)); @@ -282,7 +385,7 @@ static bool notify_lvgl_ready_to_flush(esp_lcd_panel_io_handle_t panel_io, void return false; } -TEST_CASE("lvgl gui with i80 interface (st7789)", "[lcd][lvgl][ignore]") +TEST_CASE("lvgl gui with i80 interface (st7789, 8bits)", "[lcd][lvgl][ignore]") { // initialize LVGL graphics library lv_disp_t *disp = NULL; @@ -308,14 +411,14 @@ TEST_CASE("lvgl gui with i80 interface (st7789)", "[lcd][lvgl][ignore]") TEST_LCD_DATA6_GPIO, TEST_LCD_DATA7_GPIO, }, - .data_width = 8, + .bus_width = 8, .max_transfer_bytes = TEST_LCD_H_RES * 40 * sizeof(uint16_t) }; TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); esp_lcd_panel_io_handle_t io_handle = NULL; esp_lcd_panel_io_i80_config_t io_config = { .cs_gpio_num = TEST_LCD_CS_GPIO, - .pclk_hz = 8000000, + .pclk_hz = 10000000, // 10MHz .trans_queue_depth = 10, .dc_levels = { .dc_idle_level = 0, @@ -327,7 +430,9 @@ TEST_CASE("lvgl gui with i80 interface (st7789)", "[lcd][lvgl][ignore]") .swap_color_bytes = 1, }, .on_color_trans_done = notify_lvgl_ready_to_flush, - .user_data = &disp + .user_data = &disp, + .lcd_cmd_bits = 8, + .lcd_param_bits = 8, }; TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle)); @@ -351,5 +456,111 @@ TEST_CASE("lvgl gui with i80 interface (st7789)", "[lcd][lvgl][ignore]") test_lvgl_task_loop(panel_handle, TEST_LCD_H_RES, TEST_LCD_V_RES, &disp); } + +#define TEST_NT35510_DATA_WIDTH (8) // change this to 16 when NT35510 is configured to 16bit in length +TEST_CASE("lvgl gui with i80 interface (nt35510, 8/16bits)", "[lcd][lvgl][ignore]") +{ + // initialize LVGL graphics library + lv_disp_t *disp = NULL; + lv_init(); + + esp_lcd_i80_bus_handle_t i80_bus = NULL; + esp_lcd_i80_bus_config_t bus_config = { + .dc_gpio_num = TEST_LCD_DC_GPIO, + .wr_gpio_num = TEST_LCD_PCLK_GPIO, + .data_gpio_nums = { + TEST_LCD_DATA0_GPIO, + TEST_LCD_DATA1_GPIO, + TEST_LCD_DATA2_GPIO, + TEST_LCD_DATA3_GPIO, + TEST_LCD_DATA4_GPIO, + TEST_LCD_DATA5_GPIO, + TEST_LCD_DATA6_GPIO, + TEST_LCD_DATA7_GPIO, + TEST_LCD_DATA8_GPIO, + TEST_LCD_DATA9_GPIO, + TEST_LCD_DATA10_GPIO, + TEST_LCD_DATA11_GPIO, + TEST_LCD_DATA12_GPIO, + TEST_LCD_DATA13_GPIO, + TEST_LCD_DATA14_GPIO, + TEST_LCD_DATA15_GPIO, + }, + .bus_width = TEST_NT35510_DATA_WIDTH, + .max_transfer_bytes = TEST_LCD_H_RES * 40 * sizeof(uint16_t) + }; + TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); + esp_lcd_panel_io_handle_t io_handle = NULL; + esp_lcd_panel_io_i80_config_t io_config = { + .cs_gpio_num = TEST_LCD_CS_GPIO, + .pclk_hz = 10000000, // 10MHz + .trans_queue_depth = 4, + .dc_levels = { + .dc_idle_level = 0, + .dc_cmd_level = 0, + .dc_dummy_level = 0, + .dc_data_level = 1, + }, + .on_color_trans_done = notify_lvgl_ready_to_flush, + .user_data = &disp, + .lcd_cmd_bits = 16, + .lcd_param_bits = 16, + }; + TEST_ESP_OK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle)); + + esp_lcd_panel_handle_t panel_handle = NULL; + esp_lcd_panel_dev_config_t panel_config = { + .reset_gpio_num = -1, + .color_space = ESP_LCD_COLOR_SPACE_RGB, + .bits_per_pixel = 16, + }; + TEST_ESP_OK(esp_lcd_new_panel_nt35510(io_handle, &panel_config, &panel_handle)); + + esp_lcd_panel_reset(panel_handle); + esp_lcd_panel_init(panel_handle); + esp_lcd_panel_swap_xy(panel_handle, true); + esp_lcd_panel_mirror(panel_handle, true, false); + + test_lvgl_task_loop(panel_handle, TEST_LCD_H_RES, TEST_LCD_V_RES, &disp); +} #endif // CONFIG_LV_USE_USER_DATA #endif // SOC_LCD_I80_SUPPORTED + +#if SOC_I2S_LCD_I80_VARIANT +#include "driver/i2s.h" + +TEST_CASE("i80 and i2s driver coexistance", "[lcd][i2s]") +{ + esp_lcd_i80_bus_handle_t i80_bus = NULL; + esp_lcd_i80_bus_config_t bus_config = { + .dc_gpio_num = TEST_LCD_DC_GPIO, + .wr_gpio_num = TEST_LCD_PCLK_GPIO, + .data_gpio_nums = { + TEST_LCD_DATA0_GPIO, + TEST_LCD_DATA1_GPIO, + TEST_LCD_DATA2_GPIO, + TEST_LCD_DATA3_GPIO, + TEST_LCD_DATA4_GPIO, + TEST_LCD_DATA5_GPIO, + TEST_LCD_DATA6_GPIO, + TEST_LCD_DATA7_GPIO, + }, + .bus_width = 8, + .max_transfer_bytes = 20, + }; + TEST_ESP_OK(esp_lcd_new_i80_bus(&bus_config, &i80_bus)); + + i2s_config_t i2s_config = { + .mode = I2S_MODE_MASTER | I2S_MODE_TX, + .sample_rate = 36000, + .bits_per_sample = 16, + .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, + .communication_format = I2S_COMM_FORMAT_STAND_I2S, + .dma_buf_count = 6, + .dma_buf_len = 60, + }; + // I2S driver won't be installed as the same I2S port has been used by LCD + TEST_ASSERT_EQUAL(ESP_ERR_NOT_FOUND, i2s_driver_install(0, &i2s_config, 0, NULL)); + TEST_ESP_OK(esp_lcd_del_i80_bus(i80_bus)); +} +#endif // SOC_I2S_LCD_I80_VARIANT diff --git a/components/esp_lcd/test/test_lvgl_port.c b/components/esp_lcd/test/test_lvgl_port_v7.c similarity index 100% rename from components/esp_lcd/test/test_lvgl_port.c rename to components/esp_lcd/test/test_lvgl_port_v7.c diff --git a/components/esp_lcd/test/test_spi_lcd_panel.c b/components/esp_lcd/test/test_spi_lcd_panel.c index 1eaa67a63f..469027148f 100644 --- a/components/esp_lcd/test/test_spi_lcd_panel.c +++ b/components/esp_lcd/test/test_spi_lcd_panel.c @@ -50,6 +50,8 @@ TEST_CASE("lcd panel with spi interface (st7789)", "[lcd]") .pclk_hz = TEST_LCD_PIXEL_CLOCK_HZ, .spi_mode = 0, .trans_queue_depth = 10, + .lcd_cmd_bits = 8, + .lcd_param_bits = 8, }; TEST_ESP_OK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)TEST_SPI_HOST_ID, &io_config, &io_handle)); @@ -119,7 +121,7 @@ TEST_CASE("lvgl gui with spi interface (st7789)", "[lcd][lvgl][ignore]") .quadhd_io_num = -1, .max_transfer_sz = TEST_LCD_H_RES * TEST_LCD_V_RES * 2 }; - TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST_ID, &buscfg, 1)); + TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST_ID, &buscfg, SPI_DMA_CH_AUTO)); esp_lcd_panel_io_handle_t io_handle = NULL; esp_lcd_panel_io_spi_config_t io_config = { @@ -129,7 +131,9 @@ TEST_CASE("lvgl gui with spi interface (st7789)", "[lcd][lvgl][ignore]") .spi_mode = 0, .trans_queue_depth = 10, .on_color_trans_done = notify_lvgl_ready_to_flush, - .user_data = &disp // we must use "address of disp" here, since the disp object has not been allocated + .user_data = &disp, // we must use "address of disp" here, since the disp object has not been allocated + .lcd_cmd_bits = 8, + .lcd_param_bits = 8, }; TEST_ESP_OK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)TEST_SPI_HOST_ID, &io_config, &io_handle)); diff --git a/components/hal/esp32s3/include/hal/lcd_ll.h b/components/hal/esp32s3/include/hal/lcd_ll.h index 271b4f3b6b..d93abb3672 100644 --- a/components/hal/esp32s3/include/hal/lcd_ll.h +++ b/components/hal/esp32s3/include/hal/lcd_ll.h @@ -131,15 +131,14 @@ static inline void lcd_ll_reverse_data_bit_order(lcd_cam_dev_t *dev, bool en) dev->lcd_user.lcd_bit_order = en; } -static inline void lcd_ll_reverse_data_byte_order(lcd_cam_dev_t *dev, uint32_t data_width, bool en) +static inline void lcd_ll_reverse_data_byte_order(lcd_cam_dev_t *dev, bool en) { - if (data_width == 8) { - dev->lcd_user.lcd_8bits_order = en; // valid in 8bit mode - dev->lcd_user.lcd_byte_order = 0; - } else if (data_width == 16) { - dev->lcd_user.lcd_byte_order = en; // valid in 16bit mode - dev->lcd_user.lcd_8bits_order = 0; - } + dev->lcd_user.lcd_byte_order = en; +} + +static inline void lcd_ll_reverse_data_8bits_order(lcd_cam_dev_t *dev, bool en) +{ + dev->lcd_user.lcd_8bits_order = en; } static inline void lcd_ll_fifo_reset(lcd_cam_dev_t *dev) diff --git a/components/soc/esp32/CMakeLists.txt b/components/soc/esp32/CMakeLists.txt index 344c8157c4..1d3cb61c9e 100644 --- a/components/soc/esp32/CMakeLists.txt +++ b/components/soc/esp32/CMakeLists.txt @@ -5,6 +5,7 @@ set(srcs "i2c_periph.c" "i2s_periph.c" "interrupts.c" + "lcd_periph.c" "ledc_periph.c" "mcpwm_periph.c" "pcnt_periph.c" diff --git a/components/soc/esp32/lcd_periph.c b/components/soc/esp32/lcd_periph.c new file mode 100644 index 0000000000..4ed419f404 --- /dev/null +++ b/components/soc/esp32/lcd_periph.c @@ -0,0 +1,53 @@ +// Copyright 2021 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include "soc/soc.h" +#include "soc/lcd_periph.h" +#include "soc/gpio_sig_map.h" + +const lcd_signal_conn_t lcd_periph_signals = { + .buses = { + [0] = { + .module = PERIPH_I2S0_MODULE, + .irq_id = ETS_I2S0_INTR_SOURCE, + .data_sigs = { + I2S0O_DATA_OUT0_IDX, + I2S0O_DATA_OUT1_IDX, + I2S0O_DATA_OUT2_IDX, + I2S0O_DATA_OUT3_IDX, + I2S0O_DATA_OUT4_IDX, + I2S0O_DATA_OUT5_IDX, + I2S0O_DATA_OUT6_IDX, + I2S0O_DATA_OUT7_IDX, + I2S0O_DATA_OUT8_IDX, + I2S0O_DATA_OUT9_IDX, + I2S0O_DATA_OUT10_IDX, + I2S0O_DATA_OUT11_IDX, + I2S0O_DATA_OUT12_IDX, + I2S0O_DATA_OUT13_IDX, + I2S0O_DATA_OUT14_IDX, + I2S0O_DATA_OUT15_IDX, + I2S0O_DATA_OUT16_IDX, + I2S0O_DATA_OUT17_IDX, + I2S0O_DATA_OUT18_IDX, + I2S0O_DATA_OUT19_IDX, + I2S0O_DATA_OUT20_IDX, + I2S0O_DATA_OUT21_IDX, + I2S0O_DATA_OUT22_IDX, + I2S0O_DATA_OUT23_IDX, + }, + .wr_sig = I2S0O_WS_OUT_IDX, + } + } +}; diff --git a/components/soc/esp32s2/CMakeLists.txt b/components/soc/esp32s2/CMakeLists.txt index d25d0ce0eb..47c9135a1a 100644 --- a/components/soc/esp32s2/CMakeLists.txt +++ b/components/soc/esp32s2/CMakeLists.txt @@ -6,6 +6,7 @@ set(srcs "i2c_periph.c" "i2s_periph.c" "interrupts.c" + "lcd_periph.c" "ledc_periph.c" "pcnt_periph.c" "rmt_periph.c" diff --git a/components/soc/esp32s2/lcd_periph.c b/components/soc/esp32s2/lcd_periph.c new file mode 100644 index 0000000000..7ca1157e29 --- /dev/null +++ b/components/soc/esp32s2/lcd_periph.c @@ -0,0 +1,52 @@ +// Copyright 2021 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include "soc/lcd_periph.h" +#include "soc/gpio_sig_map.h" + +const lcd_signal_conn_t lcd_periph_signals = { + .buses = { + [0] = { + .module = PERIPH_I2S0_MODULE, + .irq_id = ETS_I2S0_INTR_SOURCE, + .data_sigs = { + I2S0O_DATA_OUT0_IDX, + I2S0O_DATA_OUT1_IDX, + I2S0O_DATA_OUT2_IDX, + I2S0O_DATA_OUT3_IDX, + I2S0O_DATA_OUT4_IDX, + I2S0O_DATA_OUT5_IDX, + I2S0O_DATA_OUT6_IDX, + I2S0O_DATA_OUT7_IDX, + I2S0O_DATA_OUT8_IDX, + I2S0O_DATA_OUT9_IDX, + I2S0O_DATA_OUT10_IDX, + I2S0O_DATA_OUT11_IDX, + I2S0O_DATA_OUT12_IDX, + I2S0O_DATA_OUT13_IDX, + I2S0O_DATA_OUT14_IDX, + I2S0O_DATA_OUT15_IDX, + I2S0O_DATA_OUT16_IDX, + I2S0O_DATA_OUT17_IDX, + I2S0O_DATA_OUT18_IDX, + I2S0O_DATA_OUT19_IDX, + I2S0O_DATA_OUT20_IDX, + I2S0O_DATA_OUT21_IDX, + I2S0O_DATA_OUT22_IDX, + I2S0O_DATA_OUT23_IDX, + }, + .wr_sig = I2S0O_WS_OUT_IDX, + } + } +}; diff --git a/components/soc/include/soc/lcd_periph.h b/components/soc/include/soc/lcd_periph.h index 6b1071b316..d7d3ebc68b 100644 --- a/components/soc/include/soc/lcd_periph.h +++ b/components/soc/include/soc/lcd_periph.h @@ -21,6 +21,7 @@ extern "C" { #endif +#if SOC_LCDCAM_SUPPORTED typedef struct { struct { const periph_module_t module; @@ -41,6 +42,19 @@ typedef struct { } panels[SOC_LCD_RGB_PANELS]; } lcd_signal_conn_t; +#endif // SOC_LCDCAM_SUPPORTED + +#if SOC_I2S_LCD_I80_VARIANT +typedef struct { + struct { + const periph_module_t module; + const int irq_id; + const int data_sigs[SOC_LCD_I80_BUS_WIDTH]; + const int wr_sig; + } buses[SOC_LCD_I80_BUSES]; +} lcd_signal_conn_t; +#endif // SOC_I2S_LCD_I80_VARIANT + extern const lcd_signal_conn_t lcd_periph_signals; #ifdef __cplusplus