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fix(sdmmc): fix invalid data when reading/writing PSRAM buffers

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Previous commit has enabled buffers in PSRAM for ESP32-P4. But this
also caused a regression for ESP32-S3, where PSRAM is not DMA capable.
This commit re-introduces the check for esp_ptr_external_ram in case
SOC_SDMMC_PSRAM_DMA_CAPABLE is not set.
This commit is contained in:
Ivan Grokhotkov 2024-06-05 13:12:03 +02:00
parent 78c40fd19a
commit 6ed7e93676
No known key found for this signature in database
GPG Key ID: 1E050E141B280628
3 changed files with 17 additions and 4 deletions
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2
components/esp_driver_sdmmc/test_apps/sd_test_utils/components/common_test_flows/sdmmc_test_rw_common.c
View File

@ -149,7 +149,7 @@ void sdmmc_test_rw_performance(sdmmc_card_t *card, FILE *perf_log)
do_single_rw_perf_test(card, offset, 1, 1, perf_log, 0); do_single_rw_perf_test(card, offset, 1, 1, perf_log, 0);
do_single_rw_perf_test(card, offset, 8, 1, perf_log, 0); do_single_rw_perf_test(card, offset, 8, 1, perf_log, 0);
do_single_rw_perf_test(card, offset, 128, 1, perf_log, 0); do_single_rw_perf_test(card, offset, 128, 1, perf_log, 0);
#if CONFIG_SPIRAM && SOC_SDMMC_PSRAM_DMA_CAPABLE #if CONFIG_SPIRAM
/* spiram */ /* spiram */
do_single_rw_perf_test(card, offset, 1, 4, perf_log, MALLOC_CAP_SPIRAM); do_single_rw_perf_test(card, offset, 1, 4, perf_log, MALLOC_CAP_SPIRAM);
do_single_rw_perf_test(card, offset, 4, 4, perf_log, MALLOC_CAP_SPIRAM); do_single_rw_perf_test(card, offset, 4, 4, perf_log, MALLOC_CAP_SPIRAM);

7
components/esp_driver_sdmmc/test_apps/sdmmc/components/sdmmc_tests/sdmmc_test_rw_sd.c
View File

@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -37,6 +37,11 @@ TEST_CASE("sdmmc read/write performance, slot 0, 8-bit", "[sdmmc]")
do_one_sdmmc_perf_test(SLOT_0, 8, SDMMC_FREQ_HIGHSPEED, NO_DDR, NULL); do_one_sdmmc_perf_test(SLOT_0, 8, SDMMC_FREQ_HIGHSPEED, NO_DDR, NULL);
} }
TEST_CASE("sdmmc read/write performance, slot 1, 1-bit", "[sdmmc]")
{
do_one_sdmmc_perf_test(SLOT_1, 1, SDMMC_FREQ_HIGHSPEED, NO_DDR, NULL);
}
TEST_CASE("sdmmc read/write performance, slot 1, 4-bit", "[sdmmc]") TEST_CASE("sdmmc read/write performance, slot 1, 4-bit", "[sdmmc]")
{ {
/* Set up in-memory file for collecting performance logs */ /* Set up in-memory file for collecting performance logs */

12
components/sdmmc/sdmmc_cmd.c
View File

@ -408,7 +408,11 @@ esp_err_t sdmmc_write_sectors(sdmmc_card_t* card, const void* src,
#ifdef SOC_SDMMC_PSRAM_DMA_CAPABLE #ifdef SOC_SDMMC_PSRAM_DMA_CAPABLE
dma_mem_info.extra_heap_caps |= MALLOC_CAP_SPIRAM; dma_mem_info.extra_heap_caps |= MALLOC_CAP_SPIRAM;
#endif #endif
if (esp_dma_is_buffer_alignment_satisfied(src, block_size * block_count, dma_mem_info)) { if (esp_dma_is_buffer_alignment_satisfied(src, block_size * block_count, dma_mem_info)
#if !SOC_SDMMC_PSRAM_DMA_CAPABLE
&& !esp_ptr_external_ram(src)
#endif
) {
err = sdmmc_write_sectors_dma(card, src, start_block, block_count, block_size * block_count); err = sdmmc_write_sectors_dma(card, src, start_block, block_count, block_size * block_count);
} else { } else {
// SDMMC peripheral needs DMA-capable buffers. Split the write into // SDMMC peripheral needs DMA-capable buffers. Split the write into
@ -531,7 +535,11 @@ esp_err_t sdmmc_read_sectors(sdmmc_card_t* card, void* dst,
size_t block_size = card->csd.sector_size; size_t block_size = card->csd.sector_size;
esp_dma_mem_info_t dma_mem_info; esp_dma_mem_info_t dma_mem_info;
card->host.get_dma_info(card->host.slot, &dma_mem_info); card->host.get_dma_info(card->host.slot, &dma_mem_info);
if (esp_dma_is_buffer_alignment_satisfied(dst, block_size * block_count, dma_mem_info)) { if (esp_dma_is_buffer_alignment_satisfied(dst, block_size * block_count, dma_mem_info)
#if !SOC_SDMMC_PSRAM_DMA_CAPABLE
&& !esp_ptr_external_ram(dst)
#endif
) {
err = sdmmc_read_sectors_dma(card, dst, start_block, block_count, block_size * block_count); err = sdmmc_read_sectors_dma(card, dst, start_block, block_count, block_size * block_count);
} else { } else {
// SDMMC peripheral needs DMA-capable buffers. Split the read into // SDMMC peripheral needs DMA-capable buffers. Split the read into