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synced 2024-10-05 20:47:46 -04:00
fix(sdmmc): fix invalid data when reading/writing PSRAM buffers
Previous commit has enabled buffers in PSRAM for ESP32-P4. But this also caused a regression for ESP32-S3, where PSRAM is not DMA capable. This commit re-introduces the check for esp_ptr_external_ram in case SOC_SDMMC_PSRAM_DMA_CAPABLE is not set.
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@ -149,7 +149,7 @@ void sdmmc_test_rw_performance(sdmmc_card_t *card, FILE *perf_log)
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do_single_rw_perf_test(card, offset, 1, 1, perf_log, 0);
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do_single_rw_perf_test(card, offset, 8, 1, perf_log, 0);
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do_single_rw_perf_test(card, offset, 128, 1, perf_log, 0);
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#if CONFIG_SPIRAM && SOC_SDMMC_PSRAM_DMA_CAPABLE
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#if CONFIG_SPIRAM
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/* spiram */
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do_single_rw_perf_test(card, offset, 1, 4, perf_log, MALLOC_CAP_SPIRAM);
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do_single_rw_perf_test(card, offset, 4, 4, perf_log, MALLOC_CAP_SPIRAM);
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -37,6 +37,11 @@ TEST_CASE("sdmmc read/write performance, slot 0, 8-bit", "[sdmmc]")
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do_one_sdmmc_perf_test(SLOT_0, 8, SDMMC_FREQ_HIGHSPEED, NO_DDR, NULL);
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}
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TEST_CASE("sdmmc read/write performance, slot 1, 1-bit", "[sdmmc]")
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{
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do_one_sdmmc_perf_test(SLOT_1, 1, SDMMC_FREQ_HIGHSPEED, NO_DDR, NULL);
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}
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TEST_CASE("sdmmc read/write performance, slot 1, 4-bit", "[sdmmc]")
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{
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/* Set up in-memory file for collecting performance logs */
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@ -408,7 +408,11 @@ esp_err_t sdmmc_write_sectors(sdmmc_card_t* card, const void* src,
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#ifdef SOC_SDMMC_PSRAM_DMA_CAPABLE
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dma_mem_info.extra_heap_caps |= MALLOC_CAP_SPIRAM;
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#endif
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if (esp_dma_is_buffer_alignment_satisfied(src, block_size * block_count, dma_mem_info)) {
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if (esp_dma_is_buffer_alignment_satisfied(src, block_size * block_count, dma_mem_info)
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#if !SOC_SDMMC_PSRAM_DMA_CAPABLE
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&& !esp_ptr_external_ram(src)
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#endif
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) {
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err = sdmmc_write_sectors_dma(card, src, start_block, block_count, block_size * block_count);
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} else {
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// SDMMC peripheral needs DMA-capable buffers. Split the write into
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@ -531,7 +535,11 @@ esp_err_t sdmmc_read_sectors(sdmmc_card_t* card, void* dst,
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size_t block_size = card->csd.sector_size;
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esp_dma_mem_info_t dma_mem_info;
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card->host.get_dma_info(card->host.slot, &dma_mem_info);
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if (esp_dma_is_buffer_alignment_satisfied(dst, block_size * block_count, dma_mem_info)) {
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if (esp_dma_is_buffer_alignment_satisfied(dst, block_size * block_count, dma_mem_info)
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#if !SOC_SDMMC_PSRAM_DMA_CAPABLE
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&& !esp_ptr_external_ram(dst)
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#endif
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) {
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err = sdmmc_read_sectors_dma(card, dst, start_block, block_count, block_size * block_count);
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} else {
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// SDMMC peripheral needs DMA-capable buffers. Split the read into
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