From 6ccba01bb3e5cf7d71b835cb73657fef96381476 Mon Sep 17 00:00:00 2001 From: "Michael (XIAO Xufeng)" Date: Tue, 23 Jun 2020 11:12:08 +0800 Subject: [PATCH] spiram: fix the read id failure The issue is caused by: 1. The disable_qio_mode inside read_id may have side effects. 2. read_id twice may have side effects. Fix this issue by moving disable_qio_mode out of read_id and only do it once before read_id. And retry read_id only when the first one is failed. Issue introduced in 3ecbb59c15e0fd8209bd8921725d52cff3f0fb12. --- components/esp32/spiram_psram.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/components/esp32/spiram_psram.c b/components/esp32/spiram_psram.c index d0fc1983af..e77ff7a116 100644 --- a/components/esp32/spiram_psram.c +++ b/components/esp32/spiram_psram.c @@ -398,11 +398,9 @@ static void psram_disable_qio_mode(psram_spi_num_t spi_num) psram_cmd_end(spi_num); } -//read psram id -static void psram_read_id(uint64_t* dev_id) +//read psram id, should issue `psram_disable_qio_mode` before calling this +static void psram_read_id(psram_spi_num_t spi_num, uint64_t* dev_id) { - psram_spi_num_t spi_num = PSRAM_SPI_1; - psram_disable_qio_mode(spi_num); uint32_t dummy_bits = 0 + extra_dummy; uint32_t psram_id[2] = {0}; psram_cmd_t ps_cmd; @@ -896,14 +894,19 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad // GPIO related settings psram_gpio_config(&psram_io, mode); - /* 16Mbit psram ID read error - * workaround: Issue a pre-condition of dummy read id, then Read ID command - */ - psram_read_id(&s_psram_id); - psram_read_id(&s_psram_id); + psram_spi_num_t spi_num = PSRAM_SPI_1; + psram_disable_qio_mode(spi_num); + psram_read_id(spi_num, &s_psram_id); if (!PSRAM_IS_VALID(s_psram_id)) { - ESP_EARLY_LOGE(TAG, "PSRAM ID read error: 0x%08x", (uint32_t)s_psram_id); - return ESP_FAIL; + /* 16Mbit psram ID read error workaround: + * treat the first read id as a dummy one as the pre-condition, + * Send Read ID command again + */ + psram_read_id(spi_num, &s_psram_id); + if (!PSRAM_IS_VALID(s_psram_id)) { + ESP_EARLY_LOGE(TAG, "PSRAM ID read error: 0x%08x", (uint32_t)s_psram_id); + return ESP_FAIL; + } } if (PSRAM_IS_32MBIT_VER0(s_psram_id)) {