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remove esp32h2 unsupported efuse field

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This commit is contained in:
wuzhenghui 2022-02-28 17:33:12 +08:00
parent c6aa1cf732
commit 6c2f5a16bb
3 changed files with 4 additions and 70 deletions
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58
components/efuse/esp32h2/esp_efuse_table.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,7 +9,7 @@
#include <assert.h>
#include "esp_efuse_table.h"
// md5_digest_table 6aaac59bd3f6d31bea4aef43b1f0d78a
// md5_digest_table d3317916050c9ac3f0b2056ee72173af
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -175,10 +175,6 @@ static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
{EFUSE_BLK0, 44, 1}, // Disable force chip go to download mode function,
};
static const esp_efuse_desc_t DIS_USB[] = {
{EFUSE_BLK0, 45, 1}, // Disable USB function,
};
static const esp_efuse_desc_t DIS_CAN[] = {
{EFUSE_BLK0, 46, 1}, // Disable CAN function,
};
@ -295,10 +291,6 @@ static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = {
{EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1,
};
static const esp_efuse_desc_t FLASH_ECC_MODE[] = {
{EFUSE_BLK0, 131, 1}, // Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode,
};
static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 132, 1}, // Disable download through USB,
};
@ -311,22 +303,6 @@ static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
{EFUSE_BLK0, 134, 2}, // b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.,
};
static const esp_efuse_desc_t PIN_POWER_SELECTION[] = {
{EFUSE_BLK0, 136, 1}, // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.,
};
static const esp_efuse_desc_t FLASH_TYPE[] = {
{EFUSE_BLK0, 137, 1}, // Connected Flash interface type. 0: 4 data line. 1: 8 data line,
};
static const esp_efuse_desc_t FLASH_PAGE_SIZE[] = {
{EFUSE_BLK0, 138, 2}, // Flash page size,
};
static const esp_efuse_desc_t FLASH_ECC_EN[] = {
{EFUSE_BLK0, 140, 1}, // Enable ECC for flash boot,
};
static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
{EFUSE_BLK0, 141, 1}, // Force ROM code to send a resume command during SPI boot,
};
@ -697,11 +673,6 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[] = {
&DIS_USB[0], // Disable USB function
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[] = {
&DIS_CAN[0], // Disable CAN function
NULL
@ -847,11 +818,6 @@ const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[] = {
&FLASH_ECC_MODE[0], // Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
&DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB
NULL
@ -867,26 +833,6 @@ const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[] = {
&PIN_POWER_SELECTION[0], // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[] = {
&FLASH_TYPE[0], // Connected Flash interface type. 0: 4 data line. 1: 8 data line
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[] = {
&FLASH_PAGE_SIZE[0], // Flash page size
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[] = {
&FLASH_ECC_EN[0], // Enable ECC for flash boot
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
&FORCE_SEND_RESUME[0], // Force ROM code to send a resume command during SPI boot
NULL

6
components/efuse/esp32h2/esp_efuse_table.csv
View File

@ -56,7 +56,6 @@
DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 42, 1, Disable Icache in download mode
DIS_USB_DEVICE, EFUSE_BLK0, 43, 1, Disable USB_DEVICE
DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, Disable force chip go to download mode function
DIS_USB, EFUSE_BLK0, 45, 1, Disable USB function
DIS_CAN, EFUSE_BLK0, 46, 1, Disable CAN function
JTAG_SEL_ENABLE, EFUSE_BLK0, 47, 1, Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.
SOFT_DIS_JTAG, EFUSE_BLK0, 48, 3, Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.
@ -92,14 +91,9 @@
DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 129, 1, Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
UART_PRINT_CHANNEL, EFUSE_BLK0, 130, 1, 0: UART0. 1: UART1
FLASH_ECC_MODE, EFUSE_BLK0, 131, 1, Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode
DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, Disable download through USB
ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, Enable security download mode
UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.
PIN_POWER_SELECTION, EFUSE_BLK0, 136, 1, GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
FLASH_TYPE, EFUSE_BLK0, 137, 1, Connected Flash interface type. 0: 4 data line. 1: 8 data line
FLASH_PAGE_SIZE, EFUSE_BLK0, 138, 2, Flash page size
FLASH_ECC_EN, EFUSE_BLK0, 140, 1, Enable ECC for flash boot
FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, Force ROM code to send a resume command during SPI boot
SECURE_VERSION, EFUSE_BLK0, 142, 16, Secure version for anti-rollback
BOOT_DISABLE_FAST_WAKE, EFUSE_BLK0, 158, 1, Fast verify on wake option in ROM for Secure Boot

Can't render this file because it contains an unexpected character in line 7 and column 87.

10
components/efuse/esp32h2/include/esp_efuse_table.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,7 +9,7 @@ extern "C" {
#endif
// md5_digest_table 6aaac59bd3f6d31bea4aef43b1f0d78a
// md5_digest_table d3317916050c9ac3f0b2056ee72173af
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -56,7 +56,6 @@ extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[];
extern const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[];
extern const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[];
@ -86,14 +85,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[];
extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_BOOT_DISABLE_FAST_WAKE[];