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https://github.com/espressif/esp-idf.git
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driver: fixes context switch while sending cause rts reset before send (backport v4.4)
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c41208550a
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@ -4,6 +4,7 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include <sys/param.h>
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#include "esp_types.h"
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#include "esp_attr.h"
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#include "esp_intr_alloc.h"
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@ -64,6 +65,9 @@ static const char *UART_TAG = "uart";
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| (UART_INTR_BRK_DET) \
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| (UART_INTR_PARITY_ERR))
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#define UART_ENTER_CRITICAL_SAFE(mux) portENTER_CRITICAL_SAFE(mux)
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#define UART_EXIT_CRITICAL_SAFE(mux) portEXIT_CRITICAL_SAFE(mux)
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#define UART_ENTER_CRITICAL_ISR(mux) portENTER_CRITICAL_ISR(mux)
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#define UART_EXIT_CRITICAL_ISR(mux) portEXIT_CRITICAL_ISR(mux)
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#define UART_ENTER_CRITICAL(mux) portENTER_CRITICAL(mux)
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@ -803,6 +807,19 @@ static int UART_ISR_ATTR uart_find_pattern_from_last(uint8_t *buf, int length, u
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return len;
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}
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static uint32_t UART_ISR_ATTR uart_enable_tx_write_fifo(uart_port_t uart_num, const uint8_t *pbuf, uint32_t len)
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{
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uint32_t sent_len = 0;
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UART_ENTER_CRITICAL_SAFE(&(uart_context[uart_num].spinlock));
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if (UART_IS_MODE_SET(uart_num, UART_MODE_RS485_HALF_DUPLEX)) {
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uart_hal_set_rts(&(uart_context[uart_num].hal), 0);
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uart_hal_ena_intr_mask(&(uart_context[uart_num].hal), UART_INTR_TX_DONE);
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}
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uart_hal_write_txfifo(&(uart_context[uart_num].hal), pbuf, len, &sent_len);
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UART_EXIT_CRITICAL_SAFE(&(uart_context[uart_num].spinlock));
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return sent_len;
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}
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//internal isr handler for default driver code.
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static void UART_ISR_ATTR uart_rx_intr_handler_default(void *param)
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{
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@ -872,19 +889,9 @@ static void UART_ISR_ATTR uart_rx_intr_handler_default(void *param)
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}
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}
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if (p_uart->tx_len_tot > 0 && p_uart->tx_ptr && p_uart->tx_len_cur > 0) {
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//To fill the TX FIFO.
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uint32_t send_len = 0;
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// Set RS485 RTS pin before transmission if the half duplex mode is enabled
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if (UART_IS_MODE_SET(uart_num, UART_MODE_RS485_HALF_DUPLEX)) {
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UART_ENTER_CRITICAL_ISR(&(uart_context[uart_num].spinlock));
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uart_hal_set_rts(&(uart_context[uart_num].hal), 0);
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uart_hal_ena_intr_mask(&(uart_context[uart_num].hal), UART_INTR_TX_DONE);
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UART_EXIT_CRITICAL_ISR(&(uart_context[uart_num].spinlock));
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}
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uart_hal_write_txfifo(&(uart_context[uart_num].hal),
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(const uint8_t *)p_uart->tx_ptr,
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(p_uart->tx_len_cur > tx_fifo_rem) ? tx_fifo_rem : p_uart->tx_len_cur,
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&send_len);
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// To fill the TX FIFO.
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uint32_t send_len = uart_enable_tx_write_fifo(uart_num, (const uint8_t *) p_uart->tx_ptr,
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MIN(p_uart->tx_len_cur, tx_fifo_rem));
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p_uart->tx_ptr += send_len;
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p_uart->tx_len_tot -= send_len;
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p_uart->tx_len_cur -= send_len;
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@ -1088,6 +1095,7 @@ static void UART_ISR_ATTR uart_rx_intr_handler_default(void *param)
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// Workaround for RS485: If the RS485 half duplex mode is active
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// and transmitter is in idle state then reset received buffer and reset RTS pin
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// skip this behavior for other UART modes
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uart_hal_clr_intsts_mask(&(uart_context[uart_num].hal), UART_INTR_TX_DONE);
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UART_ENTER_CRITICAL_ISR(&(uart_context[uart_num].spinlock));
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uart_hal_disable_intr_mask(&(uart_context[uart_num].hal), UART_INTR_TX_DONE);
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if (UART_IS_MODE_SET(uart_num, UART_MODE_RS485_HALF_DUPLEX)) {
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@ -1095,7 +1103,6 @@ static void UART_ISR_ATTR uart_rx_intr_handler_default(void *param)
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uart_hal_set_rts(&(uart_context[uart_num].hal), 1);
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}
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UART_EXIT_CRITICAL_ISR(&(uart_context[uart_num].spinlock));
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uart_hal_clr_intsts_mask(&(uart_context[uart_num].hal), UART_INTR_TX_DONE);
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xSemaphoreGiveFromISR(p_uart_obj[uart_num]->tx_done_sem, &HPTaskAwoken);
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}
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} else {
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@ -1164,13 +1171,7 @@ int uart_tx_chars(uart_port_t uart_num, const char *buffer, uint32_t len)
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}
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int tx_len = 0;
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xSemaphoreTake(p_uart_obj[uart_num]->tx_mux, (portTickType)portMAX_DELAY);
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if (UART_IS_MODE_SET(uart_num, UART_MODE_RS485_HALF_DUPLEX)) {
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UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
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uart_hal_set_rts(&(uart_context[uart_num].hal), 0);
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uart_hal_ena_intr_mask(&(uart_context[uart_num].hal), UART_INTR_TX_DONE);
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UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
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}
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uart_hal_write_txfifo(&(uart_context[uart_num].hal), (const uint8_t *) buffer, len, (uint32_t *)&tx_len);
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tx_len = (int)uart_enable_tx_write_fifo(uart_num, (const uint8_t *) buffer, len);
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xSemaphoreGive(p_uart_obj[uart_num]->tx_mux);
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return tx_len;
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}
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@ -1208,14 +1209,7 @@ static int uart_tx_all(uart_port_t uart_num, const char *src, size_t size, bool
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while (size) {
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//semaphore for tx_fifo available
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if (pdTRUE == xSemaphoreTake(p_uart_obj[uart_num]->tx_fifo_sem, (portTickType)portMAX_DELAY)) {
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uint32_t sent = 0;
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if (UART_IS_MODE_SET(uart_num, UART_MODE_RS485_HALF_DUPLEX)) {
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UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
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uart_hal_set_rts(&(uart_context[uart_num].hal), 0);
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uart_hal_ena_intr_mask(&(uart_context[uart_num].hal), UART_INTR_TX_DONE);
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UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
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}
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uart_hal_write_txfifo(&(uart_context[uart_num].hal), (const uint8_t *)src, size, &sent);
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uint32_t sent = uart_enable_tx_write_fifo(uart_num, (const uint8_t *) src, size);
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if (sent < size) {
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p_uart_obj[uart_num]->tx_waiting_fifo = true;
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uart_enable_tx_intr(uart_num, 1, UART_EMPTY_THRESH_DEFAULT);
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