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Merge branch 'bugfix/fatfs_v4.1' into 'release/v4.1'

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spi_flash: fix the issue of ext_flash_fatfs_example(backport v4.1)

See merge request espressif/esp-idf!12666
This commit is contained in:
Michael (XIAO Xufeng) 2021-03-22 07:44:12 +00:00
commit 6bd7cadc7b
2 changed files with 5 additions and 5 deletions
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6
examples/storage/ext_flash_fatfs/README.md
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@ -8,7 +8,7 @@ The flow of the example is as follows:
1. Initialize the SPI bus and configure the pins. In this example, VSPI peripheral is used. The pins chosen in this example correspond to IOMUX pins for the VSPI peripheral. If the pin assignment is changed, SPI driver will instead connect the peripheral to the pins using the GPIO Matrix.
2. Initialize the SPI flash chip. This involves creating a run-time object which describes the flash chip (`esp_flash_t`), probing the flash chip, and configuring it for the selected read mode. By default this example uses DIO mode, which only requires 4 pins (MOSI, MISO, SCLK, CS). For modes such as QIO and QOUT, additional pins must be connected.
2. Initialize the SPI flash chip. This involves creating a run-time object which describes the flash chip (`esp_flash_t`), probing the flash chip, and configuring it for the selected read mode. By default this example uses DIO mode, which only requires 4 pins (MOSI, MISO, SCLK, CS) but we strongly recommand to connect (or pull-up) the WP and HD pins. For modes such as QIO and QOUT, additional pins (WP/DQ2, HD/DQ3) must be connected.
3. Register the entire area of the Flash chip as a *partition* (`esp_partition_t`). This allows other components (FATFS, SPIFFS, NVS, etc) to use the storage provided by the external flash chip.
@ -28,8 +28,8 @@ GPIO23 | MOSI | DI
GPIO19 | MISO | DO
GPIO18 | SCLK | CLK
GPIO5 | CS | CMD
unconnected | | WP
unconnected | | HOLD
GPIO22 | WP | WP
GPIO21 | HD | HOLD
GND | | GND
VCC | | VCC

4
examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c
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@ -94,8 +94,8 @@ static esp_flash_t* example_init_ext_flash(void)
.mosi_io_num = VSPI_IOMUX_PIN_NUM_MOSI,
.miso_io_num = VSPI_IOMUX_PIN_NUM_MISO,
.sclk_io_num = VSPI_IOMUX_PIN_NUM_CLK,
.quadwp_io_num = -1,
.quadhd_io_num = -1,
.quadhd_io_num = VSPI_IOMUX_PIN_NUM_HD,
.quadwp_io_num = VSPI_IOMUX_PIN_NUM_WP,
};
const esp_flash_spi_device_config_t device_config = {