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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
ci: misc fixes for newlib test app
Enabled additional tests for C2, added config for testing with newlib nano as well as cleaned up old configs
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@ -123,43 +123,51 @@ TEST_CASE("test asctime", "[newlib]")
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TEST_ASSERT_EQUAL_STRING(buf, time_str);
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TEST_ASSERT_EQUAL_STRING(buf, time_str);
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}
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}
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32H2)
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static bool fn_in_rom(void *fn)
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static bool fn_in_rom(void *fn)
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{
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{
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const int fnaddr = (int)fn;
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const int fnaddr = (int)fn;
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return (fnaddr >= SOC_IROM_MASK_LOW && fnaddr < SOC_IROM_MASK_HIGH);
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return (fnaddr >= SOC_IROM_MASK_LOW && fnaddr < SOC_IROM_MASK_HIGH);
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}
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}
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/* Older chips have newlib nano in rom as well, but this is not linked in due to us now using 64 bit time_t
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and the ROM code was compiled for 32 bit.
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*/
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#define PRINTF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2))
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#define SSCANF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGET_ESP32C2)
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TEST_CASE("check if ROM or Flash is used for functions", "[newlib]")
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TEST_CASE("check if ROM or Flash is used for functions", "[newlib]")
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{
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{
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#if CONFIG_NEWLIB_NANO_FORMAT || ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT
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#if PRINTF_NANO_IN_ROM || (ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT && !CONFIG_NEWLIB_NANO_FORMAT)
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TEST_ASSERT(fn_in_rom(vfprintf));
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TEST_ASSERT(fn_in_rom(vfprintf));
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#else
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#else
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TEST_ASSERT_FALSE(fn_in_rom(vfprintf));
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TEST_ASSERT_FALSE(fn_in_rom(vfprintf));
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#endif // CONFIG_NEWLIB_NANO_FORMAT || ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT
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#endif // PRINTF_NANO_IN_ROM || (ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT && !CONFIG_NEWLIB_NANO_FORMAT)
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#if (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2)) || ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT
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#if SSCANF_NANO_IN_ROM || (ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT && !CONFIG_NEWLIB_NANO_FORMAT)
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TEST_ASSERT(fn_in_rom(sscanf));
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TEST_ASSERT(fn_in_rom(sscanf));
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#else
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#else
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TEST_ASSERT_FALSE(fn_in_rom(sscanf));
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TEST_ASSERT_FALSE(fn_in_rom(sscanf));
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#endif // (CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGET_x) || ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT
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#endif // SSCANF_NANO_IN_ROM || (ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT && !CONFIG_NEWLIB_NANO_FORMAT)
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#if defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_SPIRAM)
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#if defined(CONFIG_IDF_TARGET_ESP32)
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TEST_ASSERT(fn_in_rom(atoi));
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TEST_ASSERT(fn_in_rom(strtol));
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#if defined(CONFIG_SPIRAM_CACHE_WORKAROUND)
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#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3) \
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TEST_ASSERT_FALSE(fn_in_rom(atoi));
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|| defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6)
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TEST_ASSERT_FALSE(fn_in_rom(strtol));
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/* S3 and C3 always use these from ROM */
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TEST_ASSERT(fn_in_rom(atoi));
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TEST_ASSERT(fn_in_rom(strtol));
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#else
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#else
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TEST_ASSERT(fn_in_rom(atoi));
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TEST_ASSERT(fn_in_rom(strtol));
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#endif //CONFIG_SPIRAM_CACHE_WORKAROUND
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#elif CONFIG_IDF_TARGET_ESP32S2
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/* S2 do not have these in ROM */
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/* S2 do not have these in ROM */
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TEST_ASSERT_FALSE(fn_in_rom(atoi));
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TEST_ASSERT_FALSE(fn_in_rom(atoi));
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TEST_ASSERT_FALSE(fn_in_rom(strtol));
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TEST_ASSERT_FALSE(fn_in_rom(strtol));
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#endif // defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_SPIRAM)
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#else
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TEST_ASSERT(fn_in_rom(atoi));
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TEST_ASSERT(fn_in_rom(strtol));
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#endif // defined(CONFIG_IDF_TARGET_ESP32)
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}
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}
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32H2)
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#ifndef CONFIG_NEWLIB_NANO_FORMAT
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#ifndef CONFIG_NEWLIB_NANO_FORMAT
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TEST_CASE("test 64bit int formats", "[newlib]")
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TEST_CASE("test 64bit int formats", "[newlib]")
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@ -549,16 +549,14 @@ TEST_CASE("test time functions wide 64 bits", "[newlib]")
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#endif // !_USE_LONG_TIME_T
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#endif // !_USE_LONG_TIME_T
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// IDF-6962 following test cases don't pass on C2
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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#if defined( CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER ) && defined( CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER )
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#if defined( CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER ) && defined( CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER )
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extern int64_t s_microseconds_offset;
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extern int64_t s_microseconds_offset;
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static const uint64_t s_start_timestamp = 1606838354;
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static const uint64_t s_start_timestamp = 1606838354;
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static RTC_NOINIT_ATTR uint64_t s_saved_time;
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static __NOINIT_ATTR uint64_t s_saved_time;
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static RTC_NOINIT_ATTR uint64_t s_time_in_reboot;
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static __NOINIT_ATTR uint64_t s_time_in_reboot;
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typedef enum {
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typedef enum {
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TYPE_REBOOT_ABORT = 0,
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TYPE_REBOOT_ABORT = 0,
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@ -579,6 +577,9 @@ static void print_counters(void)
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static void set_initial_condition(type_reboot_t type_reboot, int error_time)
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static void set_initial_condition(type_reboot_t type_reboot, int error_time)
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{
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{
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s_saved_time = 0;
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s_time_in_reboot = 0;
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print_counters();
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print_counters();
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struct timeval tv = { .tv_sec = s_start_timestamp, .tv_usec = 0, };
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struct timeval tv = { .tv_sec = s_start_timestamp, .tv_usec = 0, };
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@ -651,4 +652,3 @@ TEST_CASE_MULTIPLE_STAGES("Timestamp after abort is correct in case RTC & High-r
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TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have + big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp2, check_time);
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TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have + big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp2, check_time);
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TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have - big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp3, check_time);
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TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have - big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp3, check_time);
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#endif // CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER && CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER
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#endif // CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER && CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER
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#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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@ -10,8 +10,8 @@ from pytest_embedded import Dut
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'config',
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'config',
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[
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[
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pytest.param('default', marks=[pytest.mark.supported_targets]),
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pytest.param('default', marks=[pytest.mark.supported_targets]),
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pytest.param('options', marks=[pytest.mark.supported_targets]),
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pytest.param('single_core_esp32', marks=[pytest.mark.esp32]),
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pytest.param('single_core_esp32', marks=[pytest.mark.esp32]),
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pytest.param('single_core_esp32s2', marks=[pytest.mark.esp32s2]),
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pytest.param('psram_esp32', marks=[pytest.mark.esp32]),
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pytest.param('psram_esp32', marks=[pytest.mark.esp32]),
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pytest.param('release_esp32', marks=[pytest.mark.esp32]),
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pytest.param('release_esp32', marks=[pytest.mark.esp32]),
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pytest.param('release_esp32c2', marks=[pytest.mark.esp32c2]),
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pytest.param('release_esp32c2', marks=[pytest.mark.esp32c2]),
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@ -0,0 +1,2 @@
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# Test all chips with nano off, nano on is tested in options config
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CONFIG_NEWLIB_NANO_FORMAT=n
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2
components/newlib/test_apps/newlib/sdkconfig.ci.options
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2
components/newlib/test_apps/newlib/sdkconfig.ci.options
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@ -0,0 +1,2 @@
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# Test with misc newlib config options turned on
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CONFIG_NEWLIB_NANO_FORMAT=y
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@ -1,12 +1,2 @@
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CONFIG_IDF_TARGET="esp32"
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CONFIG_IDF_TARGET="esp32"
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM=y
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# moved from old psram config
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CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
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CONFIG_SPIRAM_OCCUPY_NO_HOST=y
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CONFIG_ESP_WIFI_RX_IRAM_OPT=n
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CONFIG_ESP_WIFI_IRAM_OPT=n
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# Disable encrypted flash reads/writes to save IRAM in this build configuration
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CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=n
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CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY=y
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CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y
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@ -1,4 +0,0 @@
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CONFIG_IDF_TARGET="esp32s2"
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CONFIG_FREERTOS_UNICORE=y
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# IDF-6964 test nano format in this configuration (current tests are not passing, so keep disabled for now)
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CONFIG_NEWLIB_NANO_FORMAT=n
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