docs(spi_master): fixed timing comments that only apply for ESP32

This commit is contained in:
Michael (XIAO Xufeng) 2024-02-29 16:51:31 +08:00 committed by Xiao Xufeng
parent 293f529cd7
commit 69d4893e85
2 changed files with 9 additions and 3 deletions

View File

@ -89,7 +89,8 @@ typedef spi_common_dma_t spi_dma_chan_t;
*
* You can use this structure to specify the GPIO pins of the bus. Normally, the driver will use the
* GPIO matrix to route the signals. An exception is made when all signals either can be routed through
* the IO_MUX or are -1. In that case, the IO_MUX is used, allowing for >40MHz speeds.
* the IO_MUX or are -1. In that case, the IO_MUX is used. On ESP32, using GPIO matrix will bring about 25ns of input
* delay, which may cause incorrect read for >40MHz speeds.
*
* @note Be advised that the slave driver does not use the quadwp/quadhd lines and fields in spi_bus_config_t refering to these lines will be ignored and can thus safely be left uninitialized.
*/

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@ -165,8 +165,13 @@ typedef struct spi_device_t *spi_device_handle_t; ///< Handle for a device on a
* peripheral and routes it to the indicated GPIO. All SPI master devices have three CS pins and can thus control
* up to three devices.
*
* @note While in general, speeds up to 80MHz on the dedicated SPI pins and 40MHz on GPIO-matrix-routed pins are
* supported, full-duplex transfers routed over the GPIO matrix only support speeds up to 26MHz.
* @note On ESP32, due to the delay of GPIO matrix, the maximum frequency SPI Master can correctly samples the slave's
* output is lower than the case using IOMUX. Typical maximum frequency communicating with an ideal slave
* without data output delay: 80MHz (IOMUX pins) and 26MHz (GPIO matrix pins). With the help of extra dummy
* cycles in half-duplex mode, the delay can be compensated by setting `input_delay_ns` in `dev_config` structure
* correctly.
*
* There's no notable delay on chips other than ESP32.
*
* @param host_id SPI peripheral to allocate device on
* @param dev_config SPI interface protocol config for the device