change(lp_uart): Enable SOC_ULP_LP_UART_SUPPORTED on ESP32C5

This commit is contained in:
Xiaoyu Liu 2024-06-25 11:57:07 +08:00
parent f978dd0af9
commit 66f7731bd8
6 changed files with 14 additions and 8 deletions

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@ -143,6 +143,10 @@ config SOC_LP_PERIPHERALS_SUPPORTED
bool
default y
config SOC_ULP_LP_UART_SUPPORTED
bool
default y
config SOC_CLK_TREE_SUPPORTED
bool
default y

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@ -64,7 +64,7 @@
// #define SOC_LP_AON_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638
#define SOC_LP_PERIPHERALS_SUPPORTED 1
// #define SOC_LP_I2C_SUPPORTED 1 // TODO: [ESP32C5] IDF-8634
// #define SOC_ULP_LP_UART_SUPPORTED 1 // TODO: [ESP32C5] IDF-8633
#define SOC_ULP_LP_UART_SUPPORTED 1
#define SOC_CLK_TREE_SUPPORTED 1
// #define SOC_ASSIST_DEBUG_SUPPORTED 1 // TODO: [ESP32C5] IDF-8663
#define SOC_WDT_SUPPORTED 1

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@ -23,7 +23,7 @@ extern "C" {
#define LP_UART_DEFAULT_RX_GPIO_NUM GPIO_NUM_15
#define LP_UART_DEFAULT_RTS_GPIO_NUM (-1)
#define LP_UART_DEFAULT_CTS_GPIO_NUM (-1)
#elif CONFIG_IDF_TARGET_ESP32C6
#elif (CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C5)
#define LP_UART_DEFAULT_TX_GPIO_NUM GPIO_NUM_5
#define LP_UART_DEFAULT_RX_GPIO_NUM GPIO_NUM_4
#define LP_UART_DEFAULT_RTS_GPIO_NUM GPIO_NUM_2
@ -83,7 +83,7 @@ typedef struct {
#define LP_UART_DEFAULT_CLOCK_CONFIG() \
.lp_uart_source_clk = LP_UART_SCLK_DEFAULT, \
/* Default LP UART GPIO settings and protocol parametes */
/* Default LP UART GPIO settings and protocol parameters */
#define LP_CORE_UART_DEFAULT_CONFIG() \
{ \
LP_UART_DEFAULT_GPIO_CONFIG() \

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@ -281,7 +281,7 @@ examples/system/ulp/lp_core/gpio:
examples/system/ulp/lp_core/gpio_intr_pulse_counter:
enable:
- if: (SOC_LP_CORE_SUPPORTED == 1) and (SOC_ULP_LP_UART_SUPPORTED == 1)
- if: (SOC_LP_CORE_SUPPORTED == 1) and (SOC_ULP_LP_UART_SUPPORTED == 1 and SOC_DEEP_SLEEP_SUPPORTED == 1)
depends_components:
- ulp
@ -303,13 +303,13 @@ examples/system/ulp/lp_core/lp_i2c:
examples/system/ulp/lp_core/lp_uart/lp_uart_echo:
disable:
- if: SOC_ULP_LP_UART_SUPPORTED != 1
- if: (SOC_ULP_LP_UART_SUPPORTED != 1) or (SOC_DEEP_SLEEP_SUPPORTED != 1)
depends_components:
- ulp
examples/system/ulp/lp_core/lp_uart/lp_uart_print:
disable:
- if: SOC_ULP_LP_UART_SUPPORTED != 1
- if: (SOC_ULP_LP_UART_SUPPORTED != 1) or (SOC_DEEP_SLEEP_SUPPORTED != 1)
depends_components:
- ulp

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@ -13,7 +13,7 @@ This example demonstrates the usage of the LP UART driver from the LP core by re
### Hardware Required
To run this example, you should have an ESP32-C6 based development board and a host machine with a serial input connection.
To run this example, you should have an ESP based development board that supports the LP UART peripheral on the LP Core and a host machine with a serial input connection.
#### Pin Assignment:
@ -22,6 +22,7 @@ To run this example, you should have an ESP32-C6 based development board and a h
| | Rx | Tx |
| ----------------------- | -------| -------|
| ESP32-C6 | GPIO4 | GPIO5 |
| ESP32-C5 | GPIO4 | GPIO5 |
| ESP32-P4 | GPIO15 | GPIO14 |
| Host machine | Tx | Rx |

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@ -13,7 +13,7 @@ This example demonstrates how to use print statements from a program running on
### Hardware Required
To run this example, you should have an ESP32-C6 based development board and a host machine with a serial input connection.
To run this example, you should have an ESP based development board that supports the LP UART peripheral on the LP Core and a host machine with a serial input connection.
#### Pin Assignment:
@ -23,6 +23,7 @@ To run this example, you should have an ESP32-C6 based development board and a h
| | Tx |
| ----------------------- | -------|
| ESP32-C6 | GPIO5 |
| ESP32-C5 | GPIO5 |
| ESP32-P4 | GPIO14 |
| Host machine | Rx |