From 65e8cb55eb8fa124ac1b698edf1323edc8f26b42 Mon Sep 17 00:00:00 2001
From: wuzhenghui <wuzhenghui@espressif.com>
Date: Tue, 6 Jun 2023 10:46:06 +0800
Subject: [PATCH] bugfix: fix esp32s3 psram access failed when dfs is enabled

---
 components/esp_hw_support/sleep_modes.c       |  4 +++-
 components/esp_pm/CMakeLists.txt              |  2 +-
 components/esp_pm/pm_impl.c                   | 19 ++++++++++++++++++-
 .../spi_flash/spi_flash_timing_tuning.c       |  4 ++--
 4 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
index dd8fa22092..df30e7ac79 100644
--- a/components/esp_hw_support/sleep_modes.c
+++ b/components/esp_hw_support/sleep_modes.c
@@ -574,7 +574,9 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
 
 #if SOC_SPI_MEM_SUPPORT_TIME_TUNING
     // Restore mspi clock freq
-    spi_timing_change_speed_mode_cache_safe(false);
+   if (cpu_freq_config.source == SOC_CPU_CLK_SRC_PLL) {
+        spi_timing_change_speed_mode_cache_safe(false);
+    }
 #endif
 
     if (!deep_sleep) {
diff --git a/components/esp_pm/CMakeLists.txt b/components/esp_pm/CMakeLists.txt
index 7220337077..603649a146 100644
--- a/components/esp_pm/CMakeLists.txt
+++ b/components/esp_pm/CMakeLists.txt
@@ -1,4 +1,4 @@
 idf_component_register(SRCS "pm_locks.c" "pm_trace.c" "pm_impl.c"
                        INCLUDE_DIRS include
-                       PRIV_REQUIRES esp_system driver esp_timer
+                       PRIV_REQUIRES esp_system driver esp_timer spi_flash
                        LDFRAGMENTS linker.lf)
diff --git a/components/esp_pm/pm_impl.c b/components/esp_pm/pm_impl.c
index 248cef45ee..5fb337558d 100644
--- a/components/esp_pm/pm_impl.c
+++ b/components/esp_pm/pm_impl.c
@@ -19,6 +19,7 @@
 #include "esp_private/crosscore_int.h"
 
 #include "soc/rtc.h"
+#include "soc/soc_caps.h"
 #include "hal/uart_ll.h"
 #include "hal/uart_types.h"
 #include "driver/uart.h"
@@ -35,6 +36,10 @@
 #include "esp_private/esp_timer_private.h"
 #include "esp_private/esp_clk.h"
 
+#if SOC_SPI_MEM_SUPPORT_TIME_TUNING
+#include "esp_private/spi_flash_os.h"
+#endif
+
 #include "esp_sleep.h"
 
 #include "sdkconfig.h"
@@ -503,7 +508,19 @@ static void IRAM_ATTR do_switch(pm_mode_t new_mode)
         if (switch_down) {
             on_freq_update(old_ticks_per_us, new_ticks_per_us);
         }
-        rtc_clk_cpu_freq_set_config_fast(&new_config);
+
+       if (new_config.source == SOC_CPU_CLK_SRC_PLL) {
+            rtc_clk_cpu_freq_set_config_fast(&new_config);
+#if SOC_SPI_MEM_SUPPORT_TIME_TUNING
+            spi_timing_change_speed_mode_cache_safe(false);
+#endif
+        } else {
+#if SOC_SPI_MEM_SUPPORT_TIME_TUNING
+            spi_timing_change_speed_mode_cache_safe(true);
+#endif
+            rtc_clk_cpu_freq_set_config_fast(&new_config);
+        }
+
         if (!switch_down) {
             on_freq_update(old_ticks_per_us, new_ticks_per_us);
         }
diff --git a/components/spi_flash/spi_flash_timing_tuning.c b/components/spi_flash/spi_flash_timing_tuning.c
index aa192433ae..6140043ffb 100644
--- a/components/spi_flash/spi_flash_timing_tuning.c
+++ b/components/spi_flash/spi_flash_timing_tuning.c
@@ -470,8 +470,8 @@ void spi_timing_enter_mspi_high_speed_mode(bool control_spi1)
 
 void spi_timing_change_speed_mode_cache_safe(bool switch_down)
 {
-    Cache_Freeze_ICache_Enable(1);
-    Cache_Freeze_DCache_Enable(1);
+    Cache_Freeze_ICache_Enable(CACHE_FREEZE_ACK_BUSY);
+    Cache_Freeze_DCache_Enable(CACHE_FREEZE_ACK_BUSY);
     if (switch_down) {
         //enter MSPI low speed mode, extra delays should be removed
         spi_timing_enter_mspi_low_speed_mode(false);