diff --git a/components/bootloader_support/src/esp32p4/bootloader_esp32p4.c b/components/bootloader_support/src/esp32p4/bootloader_esp32p4.c
index 651299b4a8..544fcd1ad4 100644
--- a/components/bootloader_support/src/esp32p4/bootloader_esp32p4.c
+++ b/components/bootloader_support/src/esp32p4/bootloader_esp32p4.c
@@ -44,6 +44,7 @@
 #include "hal/efuse_hal.h"
 #include "soc/regi2c_syspll.h"
 #include "soc/regi2c_cpll.h"
+#include "soc/regi2c_bias.h"
 
 static const char *TAG = "boot.esp32p4";
 
@@ -97,6 +98,8 @@ static inline void bootloader_hardware_init(void)
     REGI2C_WRITE_MASK(I2C_CPLL, I2C_CPLL_OC_DIV_7_0, 6); // lower default cpu_pll freq to 400M
     REGI2C_WRITE_MASK(I2C_SYSPLL, I2C_SYSPLL_OC_DIV_7_0, 8); // lower default sys_pll freq to 480M
     esp_rom_delay_us(100);
+    REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1, 10);
+    REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 10);
 }
 
 static inline void bootloader_ana_reset_config(void)
diff --git a/components/esp_hw_support/port/esp32p4/Kconfig.ldo b/components/esp_hw_support/port/esp32p4/Kconfig.ldo
index 43b3ad372c..8e076587e3 100644
--- a/components/esp_hw_support/port/esp32p4/Kconfig.ldo
+++ b/components/esp_hw_support/port/esp32p4/Kconfig.ldo
@@ -11,14 +11,14 @@ config ESP_VDD_PSRAM_LDO_ID
 choice ESP_VDD_PSRAM_LDO_VOLTAGE_MV
     prompt "PSRAM VDD connected LDO voltage"
     depends on ESP_VDD_PSRAM_LDO_ID != -1
-    default ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1800
+    default ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1900
     help
         Select the LDO (ESP_VDD_PSRAM_LDO_ID) voltage output
 
-    config ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1800
-        bool "1.8V"
+    config ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1900
+        bool "1.9V"
 endchoice
 
 config ESP_VDD_PSRAM_LDO_VOLTAGE_MV
     int
-    default 1800 if ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1800
+    default 1900 if ESP_VDD_PSRAM_LDO_VOLTAGE_MV_1900
diff --git a/components/hal/esp32p4/include/hal/clk_tree_ll.h b/components/hal/esp32p4/include/hal/clk_tree_ll.h
index 6ea0ba452c..cc8675e3df 100644
--- a/components/hal/esp32p4/include/hal/clk_tree_ll.h
+++ b/components/hal/esp32p4/include/hal/clk_tree_ll.h
@@ -16,6 +16,7 @@
 #include "hal/regi2c_ctrl.h"
 #include "soc/regi2c_cpll.h"
 #include "soc/regi2c_mpll.h"
+#include "soc/regi2c_bias.h"
 #include "hal/assert.h"
 #include "hal/log.h"
 #include "esp32p4/rom/rtc.h"
@@ -382,6 +383,12 @@ static inline __attribute__((always_inline)) void clk_ll_mpll_set_config(uint32_
 {
     HAL_ASSERT(xtal_freq_mhz == SOC_XTAL_FREQ_40M);
 
+    uint8_t mpll_dhref_val = REGI2C_READ(I2C_MPLL, I2C_MPLL_DHREF);
+    REGI2C_WRITE(I2C_MPLL, I2C_MPLL_DHREF,  mpll_dhref_val | (3 << I2C_MPLL_DHREF_LSB));
+    uint8_t mpll_rstb_val = REGI2C_READ(I2C_MPLL, I2C_MPLL_IR_CAL_RSTB);
+    REGI2C_WRITE(I2C_MPLL, I2C_MPLL_IR_CAL_RSTB, mpll_rstb_val & 0xdf);
+    REGI2C_WRITE(I2C_MPLL, I2C_MPLL_IR_CAL_RSTB, mpll_rstb_val | (1 << I2C_MPLL_IR_CAL_RSTB_lSB));
+
     // MPLL_Freq = XTAL_Freq * (div + 1) / (ref_div + 1)
     uint8_t ref_div = 1;
     uint8_t div = mpll_freq_mhz / 20 - 1;
diff --git a/components/soc/esp32p4/include/soc/regi2c_bias.h b/components/soc/esp32p4/include/soc/regi2c_bias.h
index cf98359074..38bb6a9921 100644
--- a/components/soc/esp32p4/include/soc/regi2c_bias.h
+++ b/components/soc/esp32p4/include/soc/regi2c_bias.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,6 +17,22 @@
 #define I2C_BIAS        0x6A
 #define I2C_BIAS_HOSTID 0
 
+#define I2C_BIAS_DREG_1P6       0
+#define I2C_BIAS_DREG_1P6_MSB   3
+#define I2C_BIAS_DREG_1P6_LSB   0
+
+#define I2C_BIAS_DREG_1P1       0
+#define I2C_BIAS_DREG_1P1_MSB   7
+#define I2C_BIAS_DREG_1P1_LSB   4
+
+#define I2C_BIAS_DREG_1P1_PVT       1
+#define I2C_BIAS_DREG_1P1_PVT_MSB   3
+#define I2C_BIAS_DREG_1P1_PVT_LSB   0
+
+#define I2C_BIAS_DREG_2P2_PVT       1
+#define I2C_BIAS_DREG_2P2_PVT_MSB   7
+#define I2C_BIAS_DREG_2P2_PVT_LSB   4
+
 #define I2C_BIAS_OR_FORCE_XPD_CK        4
 #define I2C_BIAS_OR_FORCE_XPD_CK_MSB    0
 #define I2C_BIAS_OR_FORCE_XPD_CK_LSB    0
diff --git a/components/soc/esp32p4/include/soc/regi2c_mpll.h b/components/soc/esp32p4/include/soc/regi2c_mpll.h
index 58caa6bf22..d3e3b19b61 100644
--- a/components/soc/esp32p4/include/soc/regi2c_mpll.h
+++ b/components/soc/esp32p4/include/soc/regi2c_mpll.h
@@ -17,6 +17,10 @@
 #define I2C_MPLL                     0x63
 #define I2C_MPLL_HOSTID              0
 
+#define I2C_MPLL_IR_CAL_RSTB         1
+#define I2C_MPLL_IR_CAL_RSTB_MSB     5
+#define I2C_MPLL_IR_CAL_RSTB_lSB     5
+
 #define I2C_MPLL_DIV_REG_ADDR        2
 #define I2C_MPLL_REF_DIV_ADDR        I2C_MPLL_DIV_REG_ADDR
 #define I2C_MPLL_REF_DIV_ADDR_MSB    2
@@ -25,3 +29,7 @@
 #define I2C_MPLL_DIV_ADDR            I2C_MPLL_DIV_REG_ADDR
 #define I2C_MPLL_DIV_ADDR_MSB        7
 #define I2C_MPLL_DIV_ADDR_LSB        3
+
+#define I2C_MPLL_DHREF               3
+#define I2C_MPLL_DHREF_MSB           5
+#define I2C_MPLL_DHREF_LSB           4