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fix(intr): fixed intr threshhold min level on C5

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This commit is contained in:
Marius Vikhammer 2024-06-03 11:54:48 +08:00
parent 7ac98d33e3
commit 61f1975882
2 changed files with 3 additions and 3 deletions
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2
components/soc/esp32c5/mp/include/soc/clic_reg.h
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@ -10,7 +10,7 @@
extern "C" {
#endif
#define NLBITS 3
#define NLBITS 4
#define CLIC_EXT_INTR_NUM_OFFSET 16
#define DUALCORE_CLIC_CTRL_OFF 0x10000

4
components/soc/esp32c61/include/soc/clic_reg.h
View File

@ -10,7 +10,7 @@
extern "C" {
#endif
#define NLBITS 3
#define NLBITS 4
#define CLIC_EXT_INTR_NUM_OFFSET 16
#define DR_REG_CLIC_BASE (0x20800000)
@ -144,7 +144,7 @@ extern "C" {
#define BYTE_CLIC_INT_CTL_REG(i) (DR_REG_CLIC_CTRL_BASE + 3 + (i)*4)
/* BYTE_CLIC_INT_ATTR_MODE: R/W ; bitpos:[7:5] ;default: 3'd0 ; */
/*description: interrupt pririty */
/*description: interrupt priority */
#define BYTE_CLIC_INT_CTL 0x00000007
#define BYTE_CLIC_INT_CTL_M ((BYTE_CLIC_INT_CTL_V) << (BYTE_CLIC_INT_CTL_S))
#define BYTE_CLIC_INT_CTL_V 0x7