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https://github.com/espressif/esp-idf.git
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fix(esp_eth): Fix DM9051 abnormal operation when SPI clock is too high
Simplified buffer allocation for DM9051
This commit is contained in:
Tian Sen Wen
Ondrej Kosta
parent
f477682938
commit
61e05bddc9
@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -149,6 +149,16 @@ extern "C" {
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#define IMR_PRI (1 << 0) // Enable Packet Received Interrupt
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#define IMR_ALL (IMR_PAR | IMR_LNKCHGI | IMR_ROOI | IMR_ROI | IMR_PTI | IMR_PRI)
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#define MLEDCR_MOD3 (1 << 7) // New LED mode
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#define MLEDCR_POL (1 << 2) // Reverse Polarity of LED Type
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// | LED Type | LNKLED (pin 25) | SPDLED (pin 26) | FDXLED (pin 16) |
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// |-----------------------------------|------------------|-----------------|-----------------|
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#define MLEDCR_LED_TYPE_00 (0x00 << 0) // | Link | Traffic | Full-Duplex |
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#define MLEDCR_LED_TYPE_01 (0x01 << 0) // | Link & Traffic | Speed100M | Full-Duplex |
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#define MLEDCR_LED_TYPE_10 (0x02 << 0) // | Traffic | Speeed100M | Speed10M |
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#define MLEDCR_LED_TYPE_11 (0x03 << 0) // | Link | Traffic100M | Traffic10M |
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#ifdef __cplusplus
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}
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#endif
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@ -36,18 +36,13 @@ static const char *TAG = "dm9051.mac";
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#define DM9051_RX_MEM_START_ADDR (3072)
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#define DM9051_RX_MEM_MAX_SIZE (16384)
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#define DM9051_RX_HDR_SIZE (4)
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#define DM9051_ETH_MAC_RX_BUF_SIZE_AUTO (0)
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typedef struct {
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uint32_t copy_len;
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uint32_t byte_cnt;
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} __attribute__((packed)) dm9051_auto_buf_info_t;
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typedef struct {
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uint8_t flag;
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uint8_t status;
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uint8_t length_low;
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uint8_t length_high;
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uint8_t flag; // 0 = no frame, 1 = frame received, others = possible memory pointer error or tcpip_checksum_offload status flag if enabled
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uint8_t status; // Events occurred between this and previous frame (the same format as RSR)
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uint8_t length_low; // Low byte of received frame length
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uint8_t length_high; // High byte of received frame length
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} dm9051_rx_header_t;
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typedef struct {
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@ -230,14 +225,6 @@ static esp_err_t dm9051_memory_read(emac_dm9051_t *emac, uint8_t *buffer, uint32
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return emac->spi.read(emac->spi.ctx, DM9051_SPI_RD, DM9051_MRCMD, buffer, len);
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}
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/**
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* @brief peek buffer from dm9051 internal memory (without internal cursor moved)
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*/
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static esp_err_t dm9051_memory_peek(emac_dm9051_t *emac, uint8_t *buffer, uint32_t len)
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{
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return emac->spi.read(emac->spi.ctx, DM9051_SPI_RD, DM9051_MRCMDX1, buffer, len);
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}
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/**
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* @brief read mac address from internal registers
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*/
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@ -272,13 +259,10 @@ err:
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static esp_err_t dm9051_clear_multicast_table(emac_dm9051_t *emac)
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{
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esp_err_t ret = ESP_OK;
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/* rx broadcast packet control by bit7 of MAC register 1DH */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_BCASTCR, 0x00), err, TAG, "write BCASTCR failed");
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for (int i = 0; i < 7; i++) {
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/* Keep multicast hash table empty and use DM9051_BCASTCR to accept broadcast for in better performance */
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for (int i = 0; i < 8; i++) {
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MAR + i, 0x00), err, TAG, "write MAR failed");
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}
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/* enable receive broadcast paclets */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MAR + 7, 0x80), err, TAG, "write MAR failed");
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return ESP_OK;
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err:
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return ret;
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@ -292,7 +276,7 @@ static esp_err_t dm9051_reset(emac_dm9051_t *emac)
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esp_err_t ret = ESP_OK;
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/* power on phy */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_GPR, 0x00), err, TAG, "write GPR failed");
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/* mac and phy register won't be accesable within at least 1ms */
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/* mac and phy register won't be accessible within at least 1ms */
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vTaskDelay(pdMS_TO_TICKS(10));
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/* software reset */
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uint8_t ncr = NCR_RST;
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@ -340,6 +324,8 @@ static esp_err_t dm9051_setup_default(emac_dm9051_t *emac)
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_WCR, 0x00), err, TAG, "write WCR failed");
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/* stop transmitting, enable appending pad, crc for packets */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_TCR, 0x00), err, TAG, "write TCR failed");
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/* Before enabling the RCR feature, make sure to set IMR_PAR in IMR */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_IMR, IMR_PAR), err, TAG, "write DM9051_IMR failed");
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/* stop receiving, no promiscuous mode, no runt packet(size < 64bytes), receive all multicast packets */
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/* discard long packet(size > 1522bytes) and crc error packet, enable watchdog */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_ALL_MCAST), err, TAG, "write RCR failed");
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@ -347,19 +333,25 @@ static esp_err_t dm9051_setup_default(emac_dm9051_t *emac)
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_TCR2, TCR2_RLCP), err, TAG, "write TCR2 failed");
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/* enable auto transmit */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_ATCR, ATCR_AUTO_TX), err, TAG, "write ATCR failed");
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/* generate checksum for UDP, TCP and IPv4 packets */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_TCSCR, TCSCR_IPCSE | TCSCR_TCPCSE | TCSCR_UDPCSE), err, TAG, "write TCSCR failed");
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/* do not generate checksum for UDP, TCP and IPv4 packets */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_TCSCR, 0x00), err, TAG, "write TCSCR failed");
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/* disable check sum for receive packets */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_RCSCSR, 0x00), err, TAG, "write RCSCSR failed");
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/* interrupt pin config: push-pull output, active high */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_INTCR, 0x00), err, TAG, "write INTCR failed");
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_INTCKCR, 0x00), err, TAG, "write INTCKCR failed");
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/* Utilize DM9051_INTCKCR to enable edge-triggered interrupts and address level-triggered interrupt loss */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_INTCKCR, 0x83), err, TAG, "write INTCKCR failed");
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/* no length limitation for rx packets */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_RLENCR, 0x00), err, TAG, "write RLENCR failed");
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/* 3K-byte for TX and 13K-byte for RX */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MEMSCR, 0x00), err, TAG, "write MEMSCR failed");
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/* clear network status: wakeup event, tx complete */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END), err, TAG, "write NSR failed");
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/* Optimize transmission process using TX2END and TX1END */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_NSR, NSR_WAKEST), err, TAG, "write NSR failed");
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/* Set Link & Traffic LED mode */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MLEDCR, MLEDCR_MOD3 | MLEDCR_LED_TYPE_01), err, TAG, "write DM9051_MLEDCR failed");
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/* Enable packet length filter of broadcast packet */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_BCASTCR, 0xc0), err, TAG, "write DM9051_BCASTCR failed");
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return ESP_OK;
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err:
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return ret;
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@ -414,8 +406,8 @@ static esp_err_t emac_dm9051_stop(esp_eth_mac_t *mac)
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{
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esp_err_t ret = ESP_OK;
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emac_dm9051_t *emac = __containerof(mac, emac_dm9051_t, parent);
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/* disable interrupt */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_IMR, 0x00), err, TAG, "write IMR failed");
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/* IMR_PAR should not be cleared unless Wake-on-LAN (WOL) functionality is required */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_IMR, IMR_PAR), err, TAG, "write IMR failed");
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/* disable rx */
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uint8_t rcr = 0;
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_RCR, &rcr), err, TAG, "read RCR failed");
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@ -647,29 +639,31 @@ static esp_err_t emac_dm9051_transmit(esp_eth_mac_t *mac, uint8_t *buf, uint32_t
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{
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esp_err_t ret = ESP_OK;
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emac_dm9051_t *emac = __containerof(mac, emac_dm9051_t, parent);
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/* Check if last transmit complete */
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uint8_t tcr = 0;
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ESP_GOTO_ON_FALSE(length <= ETH_MAX_PACKET_SIZE, ESP_ERR_INVALID_ARG, err,
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TAG, "frame size is too big (actual %" PRIu32 ", maximum %d)", length, ETH_MAX_PACKET_SIZE);
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uint8_t reg_nsr = 0;
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int64_t wait_time = esp_timer_get_time();
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do {
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_TCR, &tcr), err, TAG, "read TCR failed");
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} while ((tcr & TCR_TXREQ) && ((esp_timer_get_time() - wait_time) < 100));
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_NSR, ®_nsr), err, TAG, "read NSR failed");
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reg_nsr &= (NSR_TX2END | NSR_TX1END);
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} while((!reg_nsr) && ((esp_timer_get_time() - wait_time) < 100));
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if (tcr & TCR_TXREQ) {
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if (!reg_nsr) {
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ESP_LOGE(TAG, "last transmit still in progress, cannot send.");
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return ESP_ERR_INVALID_STATE;
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}
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if(reg_nsr == (NSR_TX2END | NSR_TX1END)) {
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MPTRCR, MPTRCR_RST_TX), err, TAG, "write MPTRCR failed");
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}
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/* set tx length */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_TXPLL, length & 0xFF), err, TAG, "write TXPLL failed");
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_TXPLH, (length >> 8) & 0xFF), err, TAG, "write TXPLH failed");
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/* copy data to tx memory */
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ESP_GOTO_ON_ERROR(dm9051_memory_write(emac, buf, length), err, TAG, "write memory failed");
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/* issue tx polling command */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_TCR, TCR_TXREQ), err, TAG, "write TCR failed");
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return ESP_OK;
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err:
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return ret;
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@ -682,127 +676,102 @@ static esp_err_t dm9051_skip_recv_frame(emac_dm9051_t *emac, uint16_t rx_length)
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_MRRH, &mrrh), err, TAG, "read MDRAH failed");
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_MRRL, &mrrl), err, TAG, "read MDRAL failed");
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uint16_t addr = mrrh << 8 | mrrl;
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/* include 4B for header */
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addr += rx_length + DM9051_RX_HDR_SIZE;
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addr += rx_length;
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if (addr > DM9051_RX_MEM_MAX_SIZE) {
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addr = addr - DM9051_RX_MEM_MAX_SIZE + DM9051_RX_MEM_START_ADDR;
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}
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MRRH, addr >> 8), err, TAG, "write MDRAH failed");
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MRRL, addr & 0xFF), err, TAG, "write MDRAL failed");
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MRRH, addr >> 8), err, TAG, "write MDRAH failed");
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err:
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return ret;
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}
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static esp_err_t dm9051_get_recv_byte_count(emac_dm9051_t *emac, uint16_t *size)
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static esp_err_t dm9051_flush_recv_queue(emac_dm9051_t *emac)
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{
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esp_err_t ret = ESP_OK;
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uint8_t rxbyte = 0;
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__attribute__((aligned(4))) dm9051_rx_header_t header; // SPI driver needs the rx buffer 4 byte align
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*size = 0;
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/* dummy read, get the most updated data */
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_MRCMDX, &rxbyte), err, TAG, "read MRCMDX failed");
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_MRCMDX, &rxbyte), err, TAG, "read MRCMDX failed");
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/* rxbyte must be 0xFF, 0 or 1 */
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if (rxbyte > 1) {
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ESP_GOTO_ON_ERROR(emac->parent.stop(&emac->parent), err, TAG, "stop dm9051 failed");
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/* reset rx fifo pointer */
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ESP_GOTO_ON_ERROR(dm9051_register_write(emac, DM9051_MPTRCR, MPTRCR_RST_RX), err, TAG, "write MPTRCR failed");
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esp_rom_delay_us(10);
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ESP_GOTO_ON_ERROR(emac->parent.start(&emac->parent), err, TAG, "start dm9051 failed");
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ESP_GOTO_ON_FALSE(false, ESP_FAIL, err, TAG, "reset rx fifo pointer");
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} else if (rxbyte) {
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ESP_GOTO_ON_ERROR(dm9051_memory_peek(emac, (uint8_t *)&header, sizeof(header)), err, TAG, "peek rx header failed");
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err:
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return ret;
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}
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static esp_err_t dm9051_frame_to_rx_buffer(emac_dm9051_t *emac, uint16_t *size)
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{
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esp_err_t ret = ESP_OK;
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uint8_t rxbyte = 0;
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__attribute__((aligned(4))) dm9051_rx_header_t header; // SPI driver needs the rx buffer 4 byte align
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bool try_again = false;
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do {
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*size = 0;
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uint8_t reg_nsr = 0;
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_NSR, ®_nsr), err, TAG, "read NSR failed");
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if (reg_nsr & NSR_RXRDY) {
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/* dummy read, get the most updated data */
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_MRCMDX, &rxbyte), err, TAG, "read MRCMDX failed");
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ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_MRCMDX1, &rxbyte), err, TAG, "read MRCMDX failed");
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if (0x01 != rxbyte) {
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ESP_GOTO_ON_ERROR(dm9051_flush_recv_queue(emac), err, TAG, "flush rx queue failed");
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ESP_GOTO_ON_FALSE(false, ESP_FAIL, err, TAG, "unexpected rx flag (0x%" PRIx8 "), reset rx fifo pointer", rxbyte);
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}
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ESP_GOTO_ON_ERROR(dm9051_memory_read(emac, (uint8_t *)&header, sizeof(header)), err, TAG, "read rx header failed");
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uint16_t rx_len = header.length_low + (header.length_high << 8);
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if (header.status & 0xBF) {
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/* store the whole frame to preallocated memory */
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if (rx_len <= ETH_MAX_PACKET_SIZE) {
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ESP_GOTO_ON_ERROR(dm9051_memory_read(emac, emac->rx_buffer, rx_len), err, TAG, "read rx data failed");
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} else {
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/* we are out of sync or data is corrupted, there is no way how to fix position in rx fifo => flush all */
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ESP_GOTO_ON_ERROR(dm9051_flush_recv_queue(emac), err, TAG, "flush rx queue failed");
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ESP_GOTO_ON_FALSE(false, ESP_FAIL, err, TAG, "invalid frame length, reset rx fifo pointer");
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}
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if (header.status & (RSR_RF | RSR_RWTO | RSR_CE | RSR_FOE)) {
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/* erroneous frames should not be forwarded by DM9051, however, if it happens, just skip it */
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dm9051_skip_recv_frame(emac, rx_len);
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ESP_GOTO_ON_FALSE(false, ESP_FAIL, err, TAG, "receive status error: %" PRIx8 "H", header.status);
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}
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ESP_LOGE(TAG, "receive status error: %" PRIx8 "H", header.status);
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/* try again to check if other frame is waiting */
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try_again = true;
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} else {
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*size = rx_len;
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}
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}
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} while (try_again);
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err:
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return ret;
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}
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static esp_err_t dm9051_flush_recv_frame(emac_dm9051_t *emac)
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{
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esp_err_t ret = ESP_OK;
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uint16_t rx_len;
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ESP_GOTO_ON_ERROR(dm9051_get_recv_byte_count(emac, &rx_len), err, TAG, "get rx frame length failed");
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ESP_GOTO_ON_ERROR(dm9051_skip_recv_frame(emac, rx_len), err, TAG, "skipping frame in RX memory failed");
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err:
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return ret;
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}
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static esp_err_t dm9051_alloc_recv_buf(emac_dm9051_t *emac, uint8_t **buf, uint32_t *length)
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{
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esp_err_t ret = ESP_OK;
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uint16_t rx_len = 0;
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uint16_t byte_count;
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*buf = NULL;
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ESP_GOTO_ON_ERROR(dm9051_get_recv_byte_count(emac, &byte_count), err, TAG, "get rx frame length failed");
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// silently return when no frame is waiting
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if (!byte_count) {
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goto err;
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}
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// do not include 4 bytes CRC at the end
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rx_len = byte_count - ETH_CRC_LEN;
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// frames larger than expected will be truncated
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uint16_t copy_len = rx_len > *length ? *length : rx_len;
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// runt frames are not forwarded, but check the length anyway since it could be corrupted at SPI bus
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ESP_GOTO_ON_FALSE(copy_len >= ETH_MIN_PACKET_SIZE - ETH_CRC_LEN, ESP_ERR_INVALID_SIZE, err, TAG, "invalid frame length %" PRIu16, copy_len);
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*buf = malloc(copy_len);
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if (*buf != NULL) {
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dm9051_auto_buf_info_t *buff_info = (dm9051_auto_buf_info_t *)*buf;
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buff_info->copy_len = copy_len;
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buff_info->byte_cnt = byte_count;
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} else {
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ret = ESP_ERR_NO_MEM;
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goto err;
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}
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err:
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*length = rx_len;
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return ret;
|
||||
}
|
||||
|
||||
static esp_err_t emac_dm9051_receive(esp_eth_mac_t *mac, uint8_t *buf, uint32_t *length)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
emac_dm9051_t *emac = __containerof(mac, emac_dm9051_t, parent);
|
||||
uint16_t rx_len = 0;
|
||||
uint8_t rxbyte;
|
||||
uint16_t copy_len = 0;
|
||||
uint16_t byte_count = 0;
|
||||
emac->packets_remain = false;
|
||||
|
||||
if (*length != DM9051_ETH_MAC_RX_BUF_SIZE_AUTO) {
|
||||
ESP_GOTO_ON_ERROR(dm9051_get_recv_byte_count(emac, &byte_count), err, TAG, "get rx frame length failed");
|
||||
/* always read the full frame to preallocated memory to simplify subsequent rx fifo pointer operations */
|
||||
ESP_GOTO_ON_ERROR(dm9051_frame_to_rx_buffer(emac, &byte_count), err, TAG, "moving data to internal rx_buffer failed");
|
||||
/* silently return when no frame is waiting */
|
||||
if (!byte_count) {
|
||||
goto err;
|
||||
}
|
||||
/* do not include 4 bytes CRC at the end */
|
||||
rx_len = byte_count - ETH_CRC_LEN;
|
||||
/* frames larger than expected will be truncated */
|
||||
copy_len = rx_len > *length ? *length : rx_len;
|
||||
uint16_t rx_len = byte_count - ETH_CRC_LEN;
|
||||
if (buf == emac->rx_buffer) {
|
||||
/* if we use internal buffer, we are done */
|
||||
*length = rx_len;
|
||||
} else {
|
||||
dm9051_auto_buf_info_t *buff_info = (dm9051_auto_buf_info_t *)buf;
|
||||
copy_len = buff_info->copy_len;
|
||||
byte_count = buff_info->byte_cnt;
|
||||
/* if frame to be copied to external buffer allocated by user */
|
||||
ESP_GOTO_ON_FALSE(buf, ESP_ERR_INVALID_ARG, err, TAG, "buffer can't be NULL");
|
||||
/* frames larger than expected will be truncated */
|
||||
uint16_t copy_len = rx_len > *length ? *length : rx_len;
|
||||
memcpy(buf, emac->rx_buffer, copy_len);
|
||||
*length = copy_len;
|
||||
}
|
||||
|
||||
byte_count += DM9051_RX_HDR_SIZE;
|
||||
ESP_GOTO_ON_ERROR(dm9051_memory_read(emac, emac->rx_buffer, byte_count), err, TAG, "read rx data failed");
|
||||
memcpy(buf, emac->rx_buffer + DM9051_RX_HDR_SIZE, copy_len);
|
||||
*length = copy_len;
|
||||
|
||||
/* dummy read, get the most updated data */
|
||||
ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_MRCMDX, &rxbyte), err, TAG, "read MRCMDX failed");
|
||||
/* check for remaining packets */
|
||||
ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_MRCMDX, &rxbyte), err, TAG, "read MRCMDX failed");
|
||||
emac->packets_remain = rxbyte > 0;
|
||||
uint8_t reg_nsr = 0;
|
||||
ESP_GOTO_ON_ERROR(dm9051_register_read(emac, DM9051_NSR, ®_nsr), err, TAG, "read NSR failed");
|
||||
emac->packets_remain = (reg_nsr & NSR_RXRDY);
|
||||
return ESP_OK;
|
||||
err:
|
||||
*length = 0;
|
||||
@ -863,7 +832,6 @@ static void emac_dm9051_task(void *arg)
|
||||
{
|
||||
emac_dm9051_t *emac = (emac_dm9051_t *)arg;
|
||||
uint8_t status = 0;
|
||||
esp_err_t ret;
|
||||
while (1) {
|
||||
// check if the task receives any notification
|
||||
if (emac->int_gpio_num >= 0) { // if in interrupt mode
|
||||
@ -880,38 +848,22 @@ static void emac_dm9051_task(void *arg)
|
||||
/* packet received */
|
||||
if (status & ISR_PR) {
|
||||
do {
|
||||
/* define max expected frame len */
|
||||
uint32_t frame_len = ETH_MAX_PACKET_SIZE;
|
||||
uint8_t *buffer;
|
||||
if ((ret = dm9051_alloc_recv_buf(emac, &buffer, &frame_len)) == ESP_OK) {
|
||||
if (buffer != NULL) {
|
||||
/* we have memory to receive the frame of maximal size previously defined */
|
||||
uint32_t buf_len = DM9051_ETH_MAC_RX_BUF_SIZE_AUTO;
|
||||
if (emac->parent.receive(&emac->parent, buffer, &buf_len) == ESP_OK) {
|
||||
if (buf_len == 0) {
|
||||
dm9051_flush_recv_frame(emac);
|
||||
free(buffer);
|
||||
} else if (frame_len > buf_len) {
|
||||
ESP_LOGE(TAG, "received frame was truncated");
|
||||
free(buffer);
|
||||
uint32_t buf_len;
|
||||
if (emac->parent.receive(&emac->parent, emac->rx_buffer, &buf_len) == ESP_OK) {
|
||||
/* if there is waiting frame */
|
||||
if (buf_len > 0) {
|
||||
uint8_t *buffer = malloc(buf_len);
|
||||
if (buffer == NULL) {
|
||||
ESP_LOGE(TAG, "no mem for receive buffer");
|
||||
} else {
|
||||
memcpy(buffer, emac->rx_buffer, buf_len);
|
||||
ESP_LOGD(TAG, "receive len=%" PRIu32, buf_len);
|
||||
/* pass the buffer to stack (e.g. TCP/IP layer) */
|
||||
emac->eth->stack_input(emac->eth, buffer, buf_len);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
ESP_LOGE(TAG, "frame read from module failed");
|
||||
dm9051_flush_recv_frame(emac);
|
||||
free(buffer);
|
||||
}
|
||||
} else if (frame_len) {
|
||||
ESP_LOGE(TAG, "invalid combination of frame_len(%" PRIu32 ") and buffer pointer(%p)", frame_len, buffer);
|
||||
}
|
||||
} else if (ret == ESP_ERR_NO_MEM) {
|
||||
ESP_LOGE(TAG, "no mem for receive buffer");
|
||||
dm9051_flush_recv_frame(emac);
|
||||
} else {
|
||||
ESP_LOGE(TAG, "unexpected error 0x%x", ret);
|
||||
}
|
||||
} while (emac->packets_remain);
|
||||
}
|
||||
@ -997,7 +949,7 @@ esp_eth_mac_t *esp_eth_mac_new_dm9051(const eth_dm9051_config_t *dm9051_config,
|
||||
mac_config->rx_task_prio, &emac->rx_task_hdl, core_num);
|
||||
ESP_GOTO_ON_FALSE(xReturned == pdPASS, NULL, err, TAG, "create dm9051 task failed");
|
||||
|
||||
emac->rx_buffer = heap_caps_malloc(ETH_MAX_PACKET_SIZE + DM9051_RX_HDR_SIZE, MALLOC_CAP_DMA);
|
||||
emac->rx_buffer = heap_caps_malloc(ETH_MAX_PACKET_SIZE, MALLOC_CAP_DMA);
|
||||
ESP_GOTO_ON_FALSE(emac->rx_buffer, NULL, err, TAG, "RX buffer allocation failed");
|
||||
|
||||
if (emac->int_gpio_num < 0) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user