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esp_eth: Fix dm9051 Rx interrupt processing
* Disable Tx interrupts to fix race condition of missing Rx interrupt * Check if GPIO interrupt is asserted periodically if the ISR event missed Closes https://github.com/espressif/esp-idf/issues/6414
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@ -358,8 +358,8 @@ static esp_err_t emac_dm9051_start(esp_eth_mac_t *mac)
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{
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esp_err_t ret = ESP_OK;
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emac_dm9051_t *emac = __containerof(mac, emac_dm9051_t, parent);
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/* enable interrupt */
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MAC_CHECK(dm9051_register_write(emac, DM9051_IMR, IMR_ALL) == ESP_OK, "write IMR failed", err, ESP_FAIL);
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/* enable only Rx related interrupts as others are processed synchronously */
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MAC_CHECK(dm9051_register_write(emac, DM9051_IMR, IMR_PAR | IMR_PRI) == ESP_OK, "write IMR failed", err, ESP_FAIL);
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/* enable rx */
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uint8_t rcr = 0;
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MAC_CHECK(dm9051_register_read(emac, DM9051_RCR, &rcr) == ESP_OK, "read RCR failed", err, ESP_FAIL);
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@ -407,8 +407,11 @@ static void emac_dm9051_task(void *arg)
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uint8_t *buffer = NULL;
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uint32_t length = 0;
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while (1) {
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// block indefinitely until some task notifies me
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ulTaskNotifyTake(pdTRUE, portMAX_DELAY);
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// check if the task receives any notification
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if (ulTaskNotifyTake(pdTRUE, pdMS_TO_TICKS(1000)) == 0 && // if no notification ...
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gpio_get_level(emac->int_gpio_num) == 0) { // ...and no interrupt asserted
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continue; // -> just continue to check again
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}
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/* clear interrupt status */
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dm9051_register_read(emac, DM9051_ISR, &status);
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dm9051_register_write(emac, DM9051_ISR, status);
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