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Merge branch 'feat/c61_mmu' into 'master'
mmu: c61 mmu support Closes IDF-9265 See merge request espressif/esp-idf!32363
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commit
5f3abba932
@ -79,11 +79,7 @@ __attribute__((always_inline))
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static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id)
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{
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(void)mmu_id;
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uint32_t page_size_code = REG_GET_FIELD(SPI_MEM_MMU_POWER_CTRL_REG(0), SPI_MMU_PAGE_SIZE);
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return (page_size_code == 0) ? MMU_PAGE_64KB :
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(page_size_code == 1) ? MMU_PAGE_32KB :
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(page_size_code == 2) ? MMU_PAGE_16KB :
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MMU_PAGE_8KB;
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return MMU_PAGE_64KB;
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}
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/**
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@ -94,11 +90,7 @@ static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id)
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__attribute__((always_inline))
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static inline void mmu_ll_set_page_size(uint32_t mmu_id, uint32_t size)
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{
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uint8_t reg_val = (size == MMU_PAGE_64KB) ? 0 :
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(size == MMU_PAGE_32KB) ? 1 :
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(size == MMU_PAGE_16KB) ? 2 :
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(size == MMU_PAGE_8KB) ? 3 : 0;
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REG_SET_FIELD(SPI_MEM_MMU_POWER_CTRL_REG(0), SPI_MMU_PAGE_SIZE, reg_val);
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HAL_ASSERT(size == MMU_PAGE_64KB);
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}
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/**
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@ -302,7 +302,8 @@ static inline bool mmu_ll_check_entry_valid(uint32_t mmu_id, uint32_t entry_id)
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static inline mmu_target_t mmu_ll_get_entry_target(uint32_t mmu_id, uint32_t entry_id)
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{
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(void)mmu_id;
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return MMU_TARGET_FLASH0;
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mmu_target_t target = ((REG_READ(SPI_MEM_MMU_ITEM_CONTENT_REG(0)) & SOC_MMU_ACCESS_SPIRAM) == 0) ? MMU_TARGET_FLASH0 : MMU_TARGET_PSRAM0;
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return target;
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}
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/**
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@ -7,6 +7,11 @@ menu "SoC Settings"
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# Be configured based on flash size selection.
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# Invisible to users.
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config MMU_PAGE_SIZE_8KB
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bool
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depends on SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
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default n
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config MMU_PAGE_SIZE_16KB
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bool
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default y if SOC_MMU_PAGE_SIZE_CONFIGURABLE && ESPTOOLPY_FLASHSIZE_1MB
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@ -707,6 +707,10 @@ config SOC_MMU_PAGE_SIZE_CONFIGURABLE
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bool
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default y
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config SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
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bool
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default y
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config SOC_MMU_PERIPH_NUM
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int
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default 1
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@ -285,6 +285,7 @@
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/*-------------------------- MMU CAPS ----------------------------------------*/
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#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (1)
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#define SOC_MMU_PAGE_SIZE_8KB_SUPPORTED (1)
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#define SOC_MMU_PERIPH_NUM (1U)
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#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM (1U)
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#define SOC_MMU_DI_VADDR_SHARED (1) /*!< D/I vaddr are shared */
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@ -243,6 +243,10 @@ config SOC_MMU_PAGE_SIZE_CONFIGURABLE
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bool
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default y
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config SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
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bool
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default y
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config SOC_MMU_PERIPH_NUM
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int
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default 1
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@ -278,6 +278,7 @@
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/*-------------------------- MMU CAPS ----------------------------------------*/
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#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (1)
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#define SOC_MMU_PAGE_SIZE_8KB_SUPPORTED (1)
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#define SOC_MMU_PERIPH_NUM (1U)
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#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM (1U)
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#define SOC_MMU_DI_VADDR_SHARED (1) /*!< D/I vaddr are shared */
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@ -411,6 +411,10 @@ config SOC_MMU_PAGE_SIZE_CONFIGURABLE
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bool
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default y
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config SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
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bool
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default y
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config SOC_MMU_PERIPH_NUM
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int
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default 1
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@ -155,6 +155,7 @@
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/*-------------------------- MMU CAPS ----------------------------------------*/
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#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (1)
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#define SOC_MMU_PAGE_SIZE_8KB_SUPPORTED (1)
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#define SOC_MMU_PERIPH_NUM (1U)
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#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM (1U)
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#define SOC_MMU_DI_VADDR_SHARED (1) /*!< D/I vaddr are shared */
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@ -895,10 +895,6 @@ config SOC_LEDC_FADE_PARAMS_BIT_WIDTH
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int
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default 10
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config SOC_MMU_PAGE_SIZE_CONFIGURABLE
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bool
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default n
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config SOC_MMU_PERIPH_NUM
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int
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default 2
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@ -351,7 +351,6 @@
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#define SOC_LEDC_FADE_PARAMS_BIT_WIDTH (10)
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/*-------------------------- MMU CAPS ----------------------------------------*/
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#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (0)
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#define SOC_MMU_PERIPH_NUM (2U)
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#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM (2U)
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#define SOC_MMU_DI_VADDR_SHARED (1) /*!< D/I vaddr are shared */
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