Merge branch 'feat/c61_mmu' into 'master'

mmu: c61 mmu support

Closes IDF-9265

See merge request espressif/esp-idf!32363
This commit is contained in:
Armando (Dou Yiwen) 2024-07-30 16:18:44 +08:00
commit 5f3abba932
11 changed files with 24 additions and 16 deletions

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@ -79,11 +79,7 @@ __attribute__((always_inline))
static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id)
{
(void)mmu_id;
uint32_t page_size_code = REG_GET_FIELD(SPI_MEM_MMU_POWER_CTRL_REG(0), SPI_MMU_PAGE_SIZE);
return (page_size_code == 0) ? MMU_PAGE_64KB :
(page_size_code == 1) ? MMU_PAGE_32KB :
(page_size_code == 2) ? MMU_PAGE_16KB :
MMU_PAGE_8KB;
return MMU_PAGE_64KB;
}
/**
@ -94,11 +90,7 @@ static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id)
__attribute__((always_inline))
static inline void mmu_ll_set_page_size(uint32_t mmu_id, uint32_t size)
{
uint8_t reg_val = (size == MMU_PAGE_64KB) ? 0 :
(size == MMU_PAGE_32KB) ? 1 :
(size == MMU_PAGE_16KB) ? 2 :
(size == MMU_PAGE_8KB) ? 3 : 0;
REG_SET_FIELD(SPI_MEM_MMU_POWER_CTRL_REG(0), SPI_MMU_PAGE_SIZE, reg_val);
HAL_ASSERT(size == MMU_PAGE_64KB);
}
/**

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@ -302,7 +302,8 @@ static inline bool mmu_ll_check_entry_valid(uint32_t mmu_id, uint32_t entry_id)
static inline mmu_target_t mmu_ll_get_entry_target(uint32_t mmu_id, uint32_t entry_id)
{
(void)mmu_id;
return MMU_TARGET_FLASH0;
mmu_target_t target = ((REG_READ(SPI_MEM_MMU_ITEM_CONTENT_REG(0)) & SOC_MMU_ACCESS_SPIRAM) == 0) ? MMU_TARGET_FLASH0 : MMU_TARGET_PSRAM0;
return target;
}
/**

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@ -7,6 +7,11 @@ menu "SoC Settings"
# Be configured based on flash size selection.
# Invisible to users.
config MMU_PAGE_SIZE_8KB
bool
depends on SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
default n
config MMU_PAGE_SIZE_16KB
bool
default y if SOC_MMU_PAGE_SIZE_CONFIGURABLE && ESPTOOLPY_FLASHSIZE_1MB

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@ -707,6 +707,10 @@ config SOC_MMU_PAGE_SIZE_CONFIGURABLE
bool
default y
config SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
bool
default y
config SOC_MMU_PERIPH_NUM
int
default 1

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@ -285,6 +285,7 @@
/*-------------------------- MMU CAPS ----------------------------------------*/
#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (1)
#define SOC_MMU_PAGE_SIZE_8KB_SUPPORTED (1)
#define SOC_MMU_PERIPH_NUM (1U)
#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM (1U)
#define SOC_MMU_DI_VADDR_SHARED (1) /*!< D/I vaddr are shared */

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@ -243,6 +243,10 @@ config SOC_MMU_PAGE_SIZE_CONFIGURABLE
bool
default y
config SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
bool
default y
config SOC_MMU_PERIPH_NUM
int
default 1

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@ -278,6 +278,7 @@
/*-------------------------- MMU CAPS ----------------------------------------*/
#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (1)
#define SOC_MMU_PAGE_SIZE_8KB_SUPPORTED (1)
#define SOC_MMU_PERIPH_NUM (1U)
#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM (1U)
#define SOC_MMU_DI_VADDR_SHARED (1) /*!< D/I vaddr are shared */

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@ -411,6 +411,10 @@ config SOC_MMU_PAGE_SIZE_CONFIGURABLE
bool
default y
config SOC_MMU_PAGE_SIZE_8KB_SUPPORTED
bool
default y
config SOC_MMU_PERIPH_NUM
int
default 1

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@ -155,6 +155,7 @@
/*-------------------------- MMU CAPS ----------------------------------------*/
#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (1)
#define SOC_MMU_PAGE_SIZE_8KB_SUPPORTED (1)
#define SOC_MMU_PERIPH_NUM (1U)
#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM (1U)
#define SOC_MMU_DI_VADDR_SHARED (1) /*!< D/I vaddr are shared */

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@ -895,10 +895,6 @@ config SOC_LEDC_FADE_PARAMS_BIT_WIDTH
int
default 10
config SOC_MMU_PAGE_SIZE_CONFIGURABLE
bool
default n
config SOC_MMU_PERIPH_NUM
int
default 2

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@ -351,7 +351,6 @@
#define SOC_LEDC_FADE_PARAMS_BIT_WIDTH (10)
/*-------------------------- MMU CAPS ----------------------------------------*/
#define SOC_MMU_PAGE_SIZE_CONFIGURABLE (0)
#define SOC_MMU_PERIPH_NUM (2U)
#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM (2U)
#define SOC_MMU_DI_VADDR_SHARED (1) /*!< D/I vaddr are shared */