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Merge branch 'bugfix/mcpwm-deadtime-preset-config' into 'master'

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bugfix/mcpwm: fix deadtime module preset config (AHC, ALC, AH, AL)

Closes IDFGH-5600

See merge request espressif/esp-idf!14594
This commit is contained in:
morris 2021-08-03 04:22:20 +00:00
commit 5f318e902d
2 changed files with 56 additions and 56 deletions
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16
components/driver/include/driver/mcpwm.h
View File

@ -179,14 +179,14 @@ typedef enum {
*/
typedef enum {
MCPWM_DEADTIME_BYPASS = 0, /*!<Bypass the deadtime*/
MCPWM_BYPASS_RED, /*!<MCPWMXA = no change, MCPWMXB = falling edge delay*/
MCPWM_BYPASS_FED, /*!<MCPWMXA = rising edge delay, MCPWMXB = no change*/
MCPWM_ACTIVE_HIGH_MODE, /*!<MCPWMXA = rising edge delay, MCPWMXB = falling edge delay*/
MCPWM_ACTIVE_LOW_MODE, /*!<MCPWMXA = compliment of rising edge delay, MCPWMXB = compliment of falling edge delay*/
MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE, /*!<MCPWMXA = rising edge delay, MCPWMXB = compliment of falling edge delay*/
MCPWM_ACTIVE_LOW_COMPLIMENT_MODE, /*!<MCPWMXA = compliment of rising edge delay, MCPWMXB = falling edge delay*/
MCPWM_ACTIVE_RED_FED_FROM_PWMXA, /*!<MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXA*/
MCPWM_ACTIVE_RED_FED_FROM_PWMXB, /*!<MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXB*/
MCPWM_BYPASS_RED, /*!<MCPWMXA Out = MCPWMXA In with no delay, MCPWMXB Out = MCPWMXA In with falling edge delay*/
MCPWM_BYPASS_FED, /*!<MCPWMXA Out = MCPWMXA In with rising edge delay, MCPWMXB Out = MCPWMXB In with no delay*/
MCPWM_ACTIVE_HIGH_MODE, /*!<MCPWMXA Out = MCPWMXA In with rising edge delay, MCPWMXB Out = MCPWMXA In with falling edge delay*/
MCPWM_ACTIVE_LOW_MODE, /*!<MCPWMXA Out = MCPWMXA In with compliment of rising edge delay, MCPWMXB Out = MCPWMXA In with compliment of falling edge delay*/
MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE, /*!<MCPWMXA Out = MCPWMXA In with rising edge delay, MCPWMXB = MCPWMXA In with compliment of falling edge delay*/
MCPWM_ACTIVE_LOW_COMPLIMENT_MODE, /*!<MCPWMXA Out = MCPWMXA In with compliment of rising edge delay, MCPWMXB Out = MCPWMXA In with falling edge delay*/
MCPWM_ACTIVE_RED_FED_FROM_PWMXA, /*!<MCPWMXA Out = MCPWMXB Out = MCPWMXA In with rising edge delay as well as falling edge delay*/
MCPWM_ACTIVE_RED_FED_FROM_PWMXB, /*!<MCPWMXA Out = MCPWMXB Out = MCPWMXB In with rising edge delay as well as falling edge delay*/
MCPWM_DEADTIME_TYPE_MAX, /*!<Maximum number of supported dead time modes*/
} mcpwm_deadtime_type_t;

96
components/driver/mcpwm.c
View File

@ -548,68 +548,68 @@ esp_err_t mcpwm_deadtime_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num,
mcpwm_ll_deadtime_set_falling_delay(hal->dev, op, fed + 1);
switch (dt_mode) {
case MCPWM_BYPASS_RED:
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, true); // S1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 1); // S5
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0=0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, true); // S1=1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4=0
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5=0
break;
case MCPWM_BYPASS_FED:
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, true); // S0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, true); // S0=1
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4=0
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5=0
break;
case MCPWM_ACTIVE_HIGH_MODE:
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 1); // S5
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0=0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4=0
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5=0
break;
case MCPWM_ACTIVE_LOW_MODE:
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, true); // S2
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, true); // S3
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 1); // S5
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0=0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, true); // S2=1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, true); // S3=1
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4=0
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5=0
break;
case MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE:
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, true); // S3
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 1); // S5
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0=0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, false); // S2=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, true); // S3=1
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4=0
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5=0
break;
case MCPWM_ACTIVE_LOW_COMPLIMENT_MODE:
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, true); // S2
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 1); // S4
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0=0
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 0, false); // S1=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 0, true); // S2=1
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4=0
mcpwm_ll_deadtime_fed_select_generator(hal->dev, op, 0); // S5=0
break;
case MCPWM_ACTIVE_RED_FED_FROM_PWMXA:
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 1); // S4
mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 0, true); // S6
mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 1, false); // S7
mcpwm_ll_deadtime_enable_deb(hal->dev, op, true); // S8
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4=0
mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 0, true); // S6=1
mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 1, false); // S7=0
mcpwm_ll_deadtime_enable_deb(hal->dev, op, true); // S8=1
break;
case MCPWM_ACTIVE_RED_FED_FROM_PWMXB:
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 0); // S4
mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 0, true); // S6
mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 1, false); // S7
mcpwm_ll_deadtime_enable_deb(hal->dev, op, true); // S8
mcpwm_ll_deadtime_bypass_path(hal->dev, op, 1, false); // S0=0
mcpwm_ll_deadtime_invert_outpath(hal->dev, op, 1, false); // S3=0
mcpwm_ll_deadtime_red_select_generator(hal->dev, op, 1); // S4=1
mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 0, true); // S6=1
mcpwm_ll_deadtime_swap_out_path(hal->dev, op, 1, false); // S7=0
mcpwm_ll_deadtime_enable_deb(hal->dev, op, true); // S8=1
break;
default :
break;