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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
bugfix: treat too short sleep duration as sleep reject by software
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756b5f628d
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@ -234,6 +234,12 @@ void pmu_sleep_init(const pmu_sleep_config_t *config, bool dslp);
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*/
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uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu, bool dslp);
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/**
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* @brief Finish sleep process settings and get sleep reject status
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* @return return sleep reject status
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*/
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bool pmu_sleep_finish(void);
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/**
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* @brief Initialize PMU related power/clock/digital parameters and functions
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*/
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@ -278,10 +278,16 @@ uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp
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/* Start entry into sleep mode */
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pmu_ll_hp_set_sleep_enable(PMU_instance()->hal->dev);
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/* In pd_cpu lightsleep and deepsleep mode, we never get here */
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while (!pmu_ll_hp_is_sleep_wakeup(PMU_instance()->hal->dev) &&
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!pmu_ll_hp_is_sleep_reject(PMU_instance()->hal->dev)) {
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;
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}
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return ESP_OK;
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return pmu_sleep_finish();
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}
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bool pmu_sleep_finish(void)
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{
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return pmu_ll_hp_is_sleep_reject(PMU_instance()->hal->dev);
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}
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@ -22,7 +22,9 @@
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#include "esp_private/sleep_cpu.h"
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#include "sdkconfig.h"
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#if !SOC_PMU_SUPPORTED
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#if SOC_PMU_SUPPORTED
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#include "esp_private/esp_pmu.h"
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#else
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#include "hal/rtc_hal.h"
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#endif
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@ -683,7 +685,7 @@ static IRAM_ATTR esp_err_t do_cpu_retention(sleep_cpu_entry_cb_t goto_sleep,
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}
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#endif
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return ESP_OK;
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return pmu_sleep_finish();
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}
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esp_err_t IRAM_ATTR esp_sleep_cpu_retention(uint32_t (*goto_sleep)(uint32_t, uint32_t, uint32_t, bool),
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@ -124,6 +124,9 @@
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#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (9)
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#endif
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// Actually costs 80us, using the fastest slow clock 150K calculation takes about 16 ticks
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#define SLEEP_TIMER_ALARM_TO_SLEEP_TICKS (16)
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#define LIGHT_SLEEP_TIME_OVERHEAD_US DEFAULT_HARDWARE_OUT_OVERHEAD_US
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#ifdef CONFIG_ESP_SYSTEM_RTC_EXT_XTAL
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#define DEEP_SLEEP_TIME_OVERHEAD_US (650 + 100 * 240 / CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
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@ -224,7 +227,7 @@ static void ext0_wakeup_prepare(void);
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#if SOC_PM_SUPPORT_EXT1_WAKEUP
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static void ext1_wakeup_prepare(void);
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#endif
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static void timer_wakeup_prepare(void);
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static esp_err_t timer_wakeup_prepare(void);
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#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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static void touch_wakeup_prepare(void);
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#endif
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@ -476,6 +479,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mo
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// For light sleep, suspend UART output — it will resume after wakeup.
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// For deep sleep, wait for the contents of UART FIFO to be sent.
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bool deep_sleep = (mode == ESP_SLEEP_MODE_DEEP_SLEEP);
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bool should_skip_sleep = false;
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if (deep_sleep) {
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flush_uarts();
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@ -585,6 +589,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mo
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}
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// Enter sleep
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esp_err_t result;
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#if SOC_PMU_SUPPORTED
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pmu_sleep_config_t config;
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pmu_sleep_init(pmu_sleep_config_default(&config, pd_flags, s_config.sleep_time_adjustment,
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@ -603,7 +608,10 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mo
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// Configure timer wakeup
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if (s_config.wakeup_triggers & RTC_TIMER_TRIG_EN) {
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timer_wakeup_prepare();
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if (timer_wakeup_prepare() != ESP_OK) {
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result = ESP_ERR_SLEEP_REJECT;
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should_skip_sleep = true;
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}
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}
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#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
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@ -612,66 +620,67 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mo
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}
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#endif
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uint32_t result;
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if (deep_sleep) {
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if (!should_skip_sleep) {
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if (deep_sleep) {
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#if !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
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esp_sleep_isolate_digital_gpio();
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esp_sleep_isolate_digital_gpio();
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#endif
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#if SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
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esp_set_deep_sleep_wake_stub_default_entry();
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// Enter Deep Sleep
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esp_set_deep_sleep_wake_stub_default_entry();
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// Enter Deep Sleep
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#if SOC_PMU_SUPPORTED
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result = call_rtc_sleep_start(reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
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result = call_rtc_sleep_start(reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
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#else
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result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
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result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
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#endif
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#else
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#if !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
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/* If not possible stack is in RTC FAST memory, use the ROM function to calculate the CRC and save ~140 bytes IRAM */
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/* If not possible stack is in RTC FAST memory, use the ROM function to calculate the CRC and save ~140 bytes IRAM */
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#if SOC_RTC_FAST_MEM_SUPPORTED
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set_rtc_memory_crc();
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set_rtc_memory_crc();
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#endif
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result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
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result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
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#else
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/* Otherwise, need to call the dedicated soc function for this */
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result = rtc_deep_sleep_start(s_config.wakeup_triggers, reject_triggers);
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/* Otherwise, need to call the dedicated soc function for this */
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result = rtc_deep_sleep_start(s_config.wakeup_triggers, reject_triggers);
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#endif
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#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
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} else {
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} else {
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/* On esp32c6, only the lp_aon pad hold function can only hold the GPIO state in the active mode.
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In order to avoid the leakage of the SPI cs pin, hold it here */
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/* On esp32c6, only the lp_aon pad hold function can only hold the GPIO state in the active mode.
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In order to avoid the leakage of the SPI cs pin, hold it here */
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#if (CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND)
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if(!(pd_flags & PMU_SLEEP_PD_VDDSDIO)) {
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rtcio_ll_force_hold_enable(SPI_CS0_GPIO_NUM);
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}
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if(!(pd_flags & PMU_SLEEP_PD_VDDSDIO)) {
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rtcio_ll_force_hold_enable(SPI_CS0_GPIO_NUM);
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}
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#endif
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#if SOC_PM_CPU_RETENTION_BY_SW
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if (pd_flags & PMU_SLEEP_PD_CPU) {
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result = esp_sleep_cpu_retention(pmu_sleep_start, s_config.wakeup_triggers, reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
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} else {
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result = call_rtc_sleep_start(reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
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}
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if (pd_flags & PMU_SLEEP_PD_CPU) {
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result = esp_sleep_cpu_retention(pmu_sleep_start, s_config.wakeup_triggers, reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
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} else {
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result = call_rtc_sleep_start(reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
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}
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#else
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result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
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result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
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#endif
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/* Unhold the SPI CS pin */
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/* Unhold the SPI CS pin */
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#if (CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND)
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if(!(pd_flags & PMU_SLEEP_PD_VDDSDIO)) {
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rtcio_ll_force_hold_disable(SPI_CS0_GPIO_NUM);
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}
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if(!(pd_flags & PMU_SLEEP_PD_VDDSDIO)) {
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rtcio_ll_force_hold_disable(SPI_CS0_GPIO_NUM);
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}
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#endif
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}
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}
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#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
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if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
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rtc_sleep_systimer_enable(true);
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}
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if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
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rtc_sleep_systimer_enable(true);
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}
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#endif
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}
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// Restore CPU frequency
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#if SOC_PM_SUPPORT_PMU_MODEM_STATE
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@ -1122,7 +1131,7 @@ esp_err_t esp_sleep_enable_timer_wakeup(uint64_t time_in_us)
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return ESP_OK;
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}
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static void timer_wakeup_prepare(void)
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static esp_err_t timer_wakeup_prepare(void)
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{
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int64_t sleep_duration = (int64_t) s_config.sleep_duration - (int64_t) s_config.sleep_time_adjustment;
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if (sleep_duration < 0) {
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@ -1130,12 +1139,23 @@ static void timer_wakeup_prepare(void)
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}
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int64_t ticks = rtc_time_us_to_slowclk(sleep_duration, s_config.rtc_clk_cal_period);
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int64_t target_wakeup_tick = s_config.rtc_ticks_at_sleep_start + ticks;
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#if SOC_LP_TIMER_SUPPORTED
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lp_timer_hal_set_alarm_target(0, s_config.rtc_ticks_at_sleep_start + ticks);
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#else
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rtc_hal_set_wakeup_timer(s_config.rtc_ticks_at_sleep_start + ticks);
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
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// When pd_top is supported, light_sleep will flush uart, and the sleep overhead time will become an unpredictable value,
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// here is the last timer wake-up validity check
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if ((sleep_duration == 0) || \
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(target_wakeup_tick < lp_timer_hal_get_cycle_count() + SLEEP_TIMER_ALARM_TO_SLEEP_TICKS)) {
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// Treat too short sleep duration setting as timer reject
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return ESP_ERR_SLEEP_REJECT;
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}
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#endif
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lp_timer_hal_set_alarm_target(0, target_wakeup_tick);
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#else
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rtc_hal_set_wakeup_timer(target_wakeup_tick);
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#endif
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return ESP_OK;
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}
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#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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@ -156,6 +156,7 @@ static const char* s_mode_names[] = {
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"APB_MAX",
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"CPU_MAX"
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};
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static uint32_t s_light_sleep_counts, s_light_sleep_reject_counts;
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#endif // WITH_PROFILING
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#ifdef CONFIG_FREERTOS_SYSTICK_USES_CCOUNT
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@ -612,7 +613,13 @@ void IRAM_ATTR vApplicationSleep( TickType_t xExpectedIdleTime )
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/* Enter sleep */
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ESP_PM_TRACE_ENTER(SLEEP, core_id);
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int64_t sleep_start = esp_timer_get_time();
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esp_light_sleep_start();
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if (esp_light_sleep_start() != ESP_OK){
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#ifdef WITH_PROFILING
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s_light_sleep_reject_counts++;
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} else {
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s_light_sleep_counts++;
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#endif
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}
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int64_t slept_us = esp_timer_get_time() - sleep_start;
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ESP_PM_TRACE_EXIT(SLEEP, core_id);
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@ -652,6 +659,9 @@ void esp_pm_impl_dump_stats(FILE* out)
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pm_time_t last_mode_change_time = s_last_mode_change_time;
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pm_mode_t cur_mode = s_mode;
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pm_time_t now = pm_get_time();
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bool light_sleep_en = s_light_sleep_en;
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uint32_t light_sleep_counts = s_light_sleep_counts;
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uint32_t light_sleep_reject_counts = s_light_sleep_reject_counts;
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portEXIT_CRITICAL_ISR(&s_switch_lock);
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time_in_mode[cur_mode] += now - last_mode_change_time;
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@ -659,7 +669,7 @@ void esp_pm_impl_dump_stats(FILE* out)
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fprintf(out, "\nMode stats:\n");
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fprintf(out, "%-8s %-10s %-10s %-10s\n", "Mode", "CPU_freq", "Time(us)", "Time(%)");
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for (int i = 0; i < PM_MODE_COUNT; ++i) {
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if (i == PM_MODE_LIGHT_SLEEP && !s_light_sleep_en) {
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if (i == PM_MODE_LIGHT_SLEEP && !light_sleep_en) {
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/* don't display light sleep mode if it's not enabled */
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continue;
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}
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@ -670,6 +680,10 @@ void esp_pm_impl_dump_stats(FILE* out)
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time_in_mode[i],
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(int) (time_in_mode[i] * 100 / now));
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}
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if (light_sleep_en){
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fprintf(out, "\nSleep stats:\n");
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fprintf(out, "light_sleep_counts:%ld light_sleep_reject_counts:%ld\n", light_sleep_counts, light_sleep_reject_counts);
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}
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}
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#endif // WITH_PROFILING
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