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test: re-enable some test cases of spi for esp32c2

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This commit is contained in:
wanlei 2022-11-22 14:39:26 +08:00
parent 7b1bbd59eb
commit 5c099a2a49
8 changed files with 14 additions and 10 deletions
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6
components/driver/test_apps/spi/master/main/test_spi_master.c
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@ -1085,7 +1085,6 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
}
#endif //#if (TEST_SPI_PERIPH_NUM >= 2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494
#define FD_TEST_BUF_SIZE 32
#define TEST_NUM 4
@ -1261,7 +1260,7 @@ static void fd_slave(void)
TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test", "[spi_ms][test_env=generic_multi_device]", fd_master, fd_slave);
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2) //TODO: IDF-3494
//NOTE: Explained in IDF-1445 | MR !14996
#if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
@ -1270,8 +1269,6 @@ TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test",
********************************************************************************/
//Disabled since the check in portENTER_CRITICAL in esp_intr_enable/disable increase the delay
#ifndef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
//IDF-5146
#define RECORD_TIME_PREPARE() uint32_t __t1, __t2
#define RECORD_TIME_START() do {__t1 = esp_cpu_get_cycle_count();}while(0)
@ -1412,7 +1409,6 @@ TEST_CASE("spi_speed", "[spi]")
spi_device_release_bus(spi);
master_free_device_bus(spi);
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
#endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
#endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)

4
components/driver/test_apps/spi/master/pytest_spi_master.py
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@ -7,6 +7,7 @@ import pytest
# If `test_env` is define, should not run on generic runner
@pytest.mark.supported_targets
@pytest.mark.generic
@pytest.mark.parametrize('config', ['defaults', 'release', 'freertos_compliance', 'freertos_flash',], indirect=True)
def test_master_single_dev(case_tester) -> None: # type: ignore
for case in case_tester.test_menu:
if 'test_env' in case.attributes:
@ -17,6 +18,7 @@ def test_master_single_dev(case_tester) -> None: # type: ignore
# Job for test_env `external_flash` just for esp32 only
@pytest.mark.esp32
@pytest.mark.flash_mutli
@pytest.mark.parametrize('config', ['defaults',], indirect=True)
def test_master_esp_flash(case_tester) -> None: # type: ignore
for case in case_tester.test_menu:
# test case `spi_bus_lock_with_flash` use difference test env
@ -28,7 +30,7 @@ def test_master_esp_flash(case_tester) -> None: # type: ignore
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c6'], reason='no runner')
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count', [2,], indirect=True)
@pytest.mark.parametrize('count, config', [(2, 'defaults',), (2, 'release',), (2, 'freertos_compliance',), (2, 'freertos_flash',)], indirect=True)
def test_master_multi_dev(case_tester) -> None: # type: ignore
for case in case_tester.test_menu:
if case.attributes.get('test_env', 'generic_multi_device') == 'generic_multi_device':

2
components/driver/test_apps/spi/master/sdkconfig.ci.defaults Normal file
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@ -0,0 +1,2 @@
# don't delete.
# used for CI to compile a default config when 'sdkconfig.ci.xxxx' is exist

1
components/driver/test_apps/spi/master/sdkconfig.ci.freertos_compliance Normal file
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@ -0,0 +1 @@
CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

1
components/driver/test_apps/spi/master/sdkconfig.ci.freertos_flash Normal file
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@ -0,0 +1 @@
CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y

3
components/driver/test_apps/spi/master/sdkconfig.ci.release Normal file
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@ -0,0 +1,3 @@
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

3
components/driver/test_apps/spi/slave/main/test_spi_slave.c
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@ -262,7 +262,7 @@ TEST_CASE("test slave send unaligned","[spi]")
#endif // #if (TEST_SPI_PERIPH_NUM >= 2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
#if (TEST_SPI_PERIPH_NUM == 1)
//These tests are for chips which only have 1 SPI controller
/********************************************************************************
@ -386,4 +386,3 @@ static void unaligned_test_slave(void)
TEST_CASE_MULTIPLE_DEVICES("SPI_Slave_Unaligned_Test", "[spi_ms][test_env=generic_multi_device][timeout=120]", unaligned_test_master, unaligned_test_slave);
#endif //#if (TEST_SPI_PERIPH_NUM == 1)
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

4
components/idf_test/include/esp32c2/idf_performance_target.h
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@ -28,9 +28,9 @@
#define IDF_PERFORMANCE_MAX_ECDSA_P256_VERIFY_OP 49000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 20
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 16
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 45
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 40
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 41
// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70