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Fix esp32h2 controller support.

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This commit is contained in:
Geng Yuchao 2022-06-03 22:01:31 +08:00
parent 5c3f0bfe7c
commit 5bba3ebed9
3 changed files with 174 additions and 98 deletions
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49
components/bt/controller/esp32h2/bt.c
View File

@ -27,7 +27,7 @@
#include "esp_coexist_internal.h"
#endif
#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#include "transport/uart/ble_hci_uart.h"
#else
#include "transport/ram/ble_hci_ram.h"
@ -91,11 +91,6 @@ struct ext_funcs_t {
uint32_t magic;
};
struct ble_ll_trace_func_t {
void (*_ble_ll_trace_u32_func)(uint32_t id, uint32_t p1);
void (*_ble_ll_trace_u32x2_func)(uint32_t id, uint32_t p1, uint32_t p2);
void (*_ble_ll_trace_u32x3_func)(uint32_t id, uint32_t p1, uint32_t p2, uint32_t p3);
};
/* External functions or variables
************************************************************************
@ -117,7 +112,6 @@ extern void npl_freertos_mempool_deinit(void);
/* TX power */
int ble_txpwr_set(int power_type, int power_level);
int ble_txpwr_get(int power_type);
extern void coex_pti_v2(void);
extern void bt_bb_v2_init_cmplx(uint8_t i);
extern int os_msys_buf_alloc(void);
extern uint32_t r_os_cputime_get32(void);
@ -236,7 +230,7 @@ bool esp_vhci_host_check_send_available(void)
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
return false;
}
return 1;
return true;
}
/**
@ -282,18 +276,16 @@ void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
return;
}
if (*(data) == DATA_TYPE_COMMAND)
{
struct ble_hci_cmd *cmd = NULL;
cmd = (void *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
memcpy((uint8_t *)cmd, data + 1, len - 1);
ble_hci_trans_hs_cmd_tx(cmd);
if (*(data) == DATA_TYPE_COMMAND) {
struct ble_hci_cmd *cmd = NULL;
cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
memcpy((uint8_t *)cmd, data + 1, len - 1);
ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
}
if (*(data) == DATA_TYPE_ACL)
{
if (*(data) == DATA_TYPE_ACL) {
struct os_mbuf *om = os_msys_get_pkthdr(0, 0);
assert(om);
assert(om);
memcpy(om->om_data, &data[1], len - 1);
om->om_len = len - 1;
OS_MBUF_PKTHDR(om)->omp_len = len - 1;
@ -326,7 +318,7 @@ static void task_delete_wrapper(void *task_handle)
static void hal_uart_start_tx_wrapper(int uart_no)
{
#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
hal_uart_start_tx(uart_no);
#endif
}
@ -335,7 +327,7 @@ static int hal_uart_init_cbs_wrapper(int uart_no, hal_uart_tx_char tx_func,
hal_uart_tx_done tx_done, hal_uart_rx_char rx_func, void *arg)
{
int rc = -1;
#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
rc = hal_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
#endif
return rc;
@ -345,7 +337,7 @@ static int hal_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits,
enum hal_uart_parity parity, enum hal_uart_flow_ctl flow_ctl)
{
int rc = -1;
#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
rc = hal_uart_config(uart_no, speed, databits, stopbits, parity, flow_ctl);
#endif
return rc;
@ -354,7 +346,7 @@ static int hal_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits,
static int hal_uart_close_wrapper(int uart_no)
{
int rc = -1;
#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
rc = hal_uart_close(uart_no);
#endif
return rc;
@ -362,7 +354,7 @@ static int hal_uart_close_wrapper(int uart_no)
static void hal_uart_blocking_tx_wrapper(int port, uint8_t data)
{
#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
hal_uart_blocking_tx(port, data);
#endif
}
@ -370,7 +362,7 @@ static void hal_uart_blocking_tx_wrapper(int port, uint8_t data)
static int hal_uart_init_wrapper(int uart_no, void *cfg)
{
int rc = -1;
#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
rc = hal_uart_init(uart_no, cfg);
#endif
return rc;
@ -531,10 +523,10 @@ error:
esp_timer_delete(s_btdm_slp_tmr);
s_btdm_slp_tmr = NULL;
}
#endif // CONFIG_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
#endif // CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
esp_sleep_disable_bt_wakeup();
#endif // CONFIG_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
#endif // CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
#endif
}
@ -623,7 +615,7 @@ esp_err_t esp_bt_controller_init(struct esp_bt_controller_config_t *cfg)
}
#if CONFIG_SW_COEXIST_ENABLE
coex_enable();
coex_init();
#endif
if (ble_controller_init(cfg) != 0) {
@ -754,6 +746,11 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
coex_enable();
#endif
if (ble_controller_enable(mode) != 0) {
return ESP_FAIL;
}

189
components/bt/include/esp32h2/include/esp_bt.h
View File

@ -15,7 +15,9 @@
#include "nimble/nimble_npl.h"
#include "syscfg/syscfg.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "esp_nimble_cfg.h"
#endif
#include "nimble/ble.h"
#ifdef __cplusplus
@ -23,7 +25,7 @@ extern "C" {
#endif
#if (SOC_ESP_NIMBLE_CONTROLLER)
#define NIMBLE_LL_STACK_SIZE CONFIG_BT_NIMBLE_CONTROLLER_TASK_STACK_SIZE
#define NIMBLE_LL_STACK_SIZE CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE
#endif
/**
@ -97,6 +99,11 @@ typedef enum {
ESP_PWR_LVL_INVALID = 0xFF, /*!< Indicates an invalid value */
} esp_power_level_t;
typedef struct {
uint8_t type;
uint8_t val[6];
} esp_ble_addr_t;
/**
* @brief Set BLE TX power
* Connection Tx power should only be set after connection created.
@ -173,42 +180,149 @@ struct esp_bt_controller_config_t{
typedef struct esp_bt_controller_config_t esp_bt_controller_config_t;
#ifdef CONFIG_BT_NIMBLE_RUN_BQB_TEST
#define RUN_BQB_TEST CONFIG_BT_NIMBLE_RUN_BQB_TEST
#else
#define RUN_BQB_TEST 0
#endif
#define RUN_BQB_TEST 0
#define RUN_QA_TEST 0
#ifdef CONFIG_BT_NIMBLE_RUN_QA_TEST
#define RUN_QA_TEST CONFIG_BT_NIMBLE_RUN_QA_TEST
#else
#define RUN_QA_TEST 0
#endif
#ifdef CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#define HCI_UART_EN CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI
#ifdef CONFIG_BT_NIMBLE_HCI_INTERFACE_USE_UART
#define HCI_UART_EN CONFIG_BT_NIMBLE_HCI_INTERFACE_USE_UART
#else
#define HCI_UART_EN 0 // hci ram mode
#endif
#if CONFIG_BT_LE_LL_CFG_FEAT_LE_CODED_PHY
#define BLE_LL_SCAN_PHY_NUMBER_N (2)
#else
#define BLE_LL_SCAN_PHY_NUMBER_N (1)
#endif
#ifdef CONFIG_BT_NIMBLE_SLEEP_ENABLE
#define NIMBLE_SLEEP_ENABLE CONFIG_BT_NIMBLE_SLEEP_ENABLE
#else
#define NIMBLE_SLEEP_ENABLE 0
#endif
#if CONFIG_BT_NIMBLE_ENABLED
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST MYNEWT_VAL(BLE_MAX_PERIODIC_ADVERTISER_LIST)
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS MYNEWT_VAL(BLE_MAX_PERIODIC_SYNCS)
#define DEFAULT_BT_LE_MAX_CONNECTIONS MYNEWT_VAL(BLE_MAX_CONNECTIONS)
#define DEFAULT_BT_LE_ACL_BUF_SIZE MYNEWT_VAL(BLE_ACL_BUF_SIZE)
#define DEFAULT_BT_LE_ACL_BUF_COUNT MYNEWT_VAL(BLE_ACL_BUF_COUNT)
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE MYNEWT_VAL(BLE_HCI_EVT_BUF_SIZE)
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE MYNEWT_VAL(BLE_EXT_ADV_MAX_SIZE)
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES MYNEWT_VAL(BLE_MULTI_ADV_INSTANCES)
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE MYNEWT_VAL(BLE_LL_WHITELIST_SIZE)
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT MYNEWT_VAL(BLE_HCI_EVT_HI_BUF_COUNT)
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT MYNEWT_VAL(BLE_HCI_EVT_LO_BUF_COUNT)
#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF
#else
# if defined(CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST)
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST)
#else
#define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST (0)
#endif
#if defined(CONFIG_BT_LE_MAX_PERIODIC_SYNCS)
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (CONFIG_BT_LE_MAX_PERIODIC_SYNCS)
#else
#define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS (0)
#endif
#if defined(CONFIG_BT_LE_MAX_CONNECTIONS)
#define DEFAULT_BT_LE_MAX_CONNECTIONS (CONFIG_BT_LE_MAX_CONNECTIONS)
#else
#define DEFAULT_BT_LE_MAX_CONNECTIONS (0)
#endif
#if defined(CONFIG_BT_LE_ACL_BUF_SIZE)
#define DEFAULT_BT_LE_ACL_BUF_SIZE (CONFIG_BT_LE_ACL_BUF_SIZE)
#else
#define DEFAULT_BT_LE_ACL_BUF_SIZE (0)
#endif
#if defined(CONFIG_BT_LE_ACL_BUF_COUNT)
#define DEFAULT_BT_LE_ACL_BUF_COUNT (CONFIG_BT_LE_ACL_BUF_COUNT)
#else
#define DEFAULT_BT_LE_ACL_BUF_COUNT (0)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_BUF_SIZE)
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (CONFIG_BT_LE_HCI_EVT_BUF_SIZE)
#else
#define DEFAULT_BT_LE_HCI_EVT_BUF_SIZE (0)
#endif
#if defined(CONFIG_BT_LE_EXT_ADV_MAX_SIZE)
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (CONFIG_BT_LE_EXT_ADV_MAX_SIZE)
#else
#define DEFAULT_BT_LE_EXT_ADV_MAX_SIZE (0)
#endif
#if defined(CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES)
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES)
#else
#define DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES (0)
#endif
#if defined(CONFIG_BT_LE_WHITELIST_SIZE)
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (CONFIG_BT_LE_WHITELIST_SIZE)
#else
#define DEFAULT_BT_NIMBLE_WHITELIST_SIZE (0)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT)
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT)
#else
#define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT (0)
#endif
#if defined(CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT)
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT)
#else
#define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (0)
#endif
#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
#endif
#ifdef BT_LE_HCI_INTERFACE_USE_UART
#define DEFAULT_BT_LE_HCI_UART_TX_PIN (CONFIG_BT_LE_HCI_UART_TX_PIN)
#define DEFAULT_BT_LE_HCI_UART_RX_PIN (CONFIG_BT_LE_HCI_UART_RX_PIN)
#define DEFAULT_BT_LE_HCI_UART_PORT (CONFIG_BT_LE_HCI_UART_PORT)
#define DEFAULT_BT_LE_HCI_UART_BAUD (CONFIG_BT_LE_HCI_UART_BAUD)
#define DEFAULT_BT_LE_HCI_UART_DATA_BITS (CONFIG_BT_LE_HCI_UART_DATA_BITS)
#define DEFAULT_BT_LE_HCI_UART_STOP_BITS (CONFIG_BT_LE_HCI_UART_STOP_BITS)
#define DEFAULT_BT_LE_HCI_UART_PARITY (CONFIG_BT_LE_HCI_UART_BAUD)
#define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE)
#define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOW_CTRL)
#else
#warning "DEFAULT_BT_LE_HCI_UART is not set"
#define DEFAULT_BT_LE_HCI_UART_TX_PIN (0)
#define DEFAULT_BT_LE_HCI_UART_RX_PIN (0)
#define DEFAULT_BT_LE_HCI_UART_PORT (0)
#define DEFAULT_BT_LE_HCI_UART_BAUD (0)
#define DEFAULT_BT_LE_HCI_UART_DATA_BITS (8)
#define DEFAULT_BT_LE_HCI_UART_STOP_BITS (1)
#define DEFAULT_BT_LE_HCI_UART_PARITY (0)
#define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0)
#define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0)
#endif
#define BT_CONTROLLER_INIT_CONFIG_DEFAULT() { \
.config_version = CONFIG_VERSION, \
.ble_ll_resolv_list_size = MYNEWT_VAL(BLE_LL_RESOLV_LIST_SIZE), \
.ble_hci_evt_hi_buf_count = MYNEWT_VAL(BLE_HCI_EVT_HI_BUF_COUNT), \
.ble_hci_evt_lo_buf_count = MYNEWT_VAL(BLE_HCI_EVT_LO_BUF_COUNT), \
.ble_ll_sync_list_cnt = BLE_LL_SYNC_LIST_CNT_N, \
.ble_ll_sync_cnt = BLE_LL_SYNC_CNT_N, \
.ble_ll_rsp_dup_list_count = CONFIG_BT_NIMBLE_LL_DUP_SCAN_LIST_COUNT, \
.ble_ll_adv_dup_list_count = CONFIG_BT_NIMBLE_LL_DUP_SCAN_LIST_COUNT, \
.ble_ll_resolv_list_size = CONFIG_BT_LE_LL_RESOLV_LIST_SIZE, \
.ble_hci_evt_hi_buf_count = DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT, \
.ble_hci_evt_lo_buf_count = DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT, \
.ble_ll_sync_list_cnt = DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST, \
.ble_ll_sync_cnt = DEFAULT_BT_LE_MAX_PERIODIC_SYNCS, \
.ble_ll_rsp_dup_list_count = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT, \
.ble_ll_adv_dup_list_count = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT, \
.ble_ll_tx_pwr_dbm = BLE_LL_TX_PWR_DBM_N, \
.rtc_freq = RTC_FREQ_N, \
.ble_ll_sca = MYNEWT_VAL(BLE_LL_SCA), \
.ble_ll_sca = CONFIG_BT_LE_LL_SCA, \
.ble_ll_scan_phy_number = BLE_LL_SCAN_PHY_NUMBER_N, \
.ble_ll_conn_def_auth_pyld_tmo = BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N, \
.ble_ll_jitter_usecs = BLE_LL_JITTER_USECS_N, \
@ -218,33 +332,32 @@ typedef struct esp_bt_controller_config_t esp_bt_controller_config_t;
.ble_scan_rsp_data_max_len = BLE_SCAN_RSP_DATA_MAX_LEN_N, \
.ble_ll_cfg_num_hci_cmd_pkts = BLE_LL_CFG_NUM_HCI_CMD_PKTS_N, \
.ble_ll_ctrl_proc_timeout_ms = BLE_LL_CTRL_PROC_TIMEOUT_MS_N, \
.nimble_max_connections = MYNEWT_VAL(BLE_MAX_CONNECTIONS), \
.ble_whitelist_size = MYNEWT_VAL(BLE_LL_WHITELIST_SIZE), \
.ble_acl_buf_size = MYNEWT_VAL(BLE_ACL_BUF_SIZE), \
.ble_acl_buf_count = MYNEWT_VAL(BLE_ACL_BUF_COUNT), \
.ble_hci_evt_buf_size = MYNEWT_VAL(BLE_HCI_EVT_BUF_SIZE), \
.ble_multi_adv_instances = MYNEWT_VAL(BLE_MULTI_ADV_INSTANCES), \
.ble_ext_adv_max_size = MYNEWT_VAL(BLE_EXT_ADV_MAX_SIZE), \
.nimble_max_connections = DEFAULT_BT_LE_MAX_CONNECTIONS, \
.ble_whitelist_size = DEFAULT_BT_NIMBLE_WHITELIST_SIZE, \
.ble_acl_buf_size = DEFAULT_BT_LE_ACL_BUF_SIZE, \
.ble_acl_buf_count = DEFAULT_BT_LE_ACL_BUF_COUNT, \
.ble_hci_evt_buf_size = DEFAULT_BT_LE_HCI_EVT_BUF_SIZE, \
.ble_multi_adv_instances = DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES, \
.ble_ext_adv_max_size = DEFAULT_BT_LE_EXT_ADV_MAX_SIZE, \
.controller_task_stack_size = NIMBLE_LL_STACK_SIZE, \
.controller_task_prio = ESP_TASK_BT_CONTROLLER_PRIO, \
.controller_run_cpu = 0, \
.enable_qa_test = RUN_QA_TEST, \
.enable_bqb_test = RUN_BQB_TEST, \
.enable_uart_hci = HCI_UART_EN, \
.ble_hci_uart_port = MYNEWT_VAL(BLE_HCI_UART_PORT), \
.ble_hci_uart_baud = MYNEWT_VAL(BLE_HCI_UART_BAUD), \
.ble_hci_uart_data_bits = MYNEWT_VAL(BLE_HCI_UART_DATA_BITS), \
.ble_hci_uart_stop_bits = MYNEWT_VAL(BLE_HCI_UART_STOP_BITS), \
.ble_hci_uart_flow_ctrl = MYNEWT_VAL(BLE_HCI_UART_FLOW_CTRL), \
.ble_hci_uart_uart_parity = MYNEWT_VAL(BLE_HCI_UART_PARITY), \
.ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \
.ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \
.ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \
.ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \
.ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \
.ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \
.enable_tx_cca = MYNEWT_VAL(BLE_TX_CCA_ENABLED), \
.cca_rssi_thresh = 256 - MYNEWT_VAL(BLE_CCA_RSSI_THRESH), \
.sleep_en = NIMBLE_SLEEP_ENABLE, \
.coex_phy_coded_tx_rx_time_limit = CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
.coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
.config_magic = CONFIG_MAGIC, \
};
esp_err_t esp_bt_controller_init(struct esp_bt_controller_config_t *cfg);
/**
@ -345,7 +458,7 @@ esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode);
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode);
/* Returns random static address or -1 if not present */
extern int esp_ble_hw_get_static_addr(ble_addr_t *addr);
extern int esp_ble_hw_get_static_addr(esp_ble_addr_t *addr);
#ifdef __cplusplus
}

34
components/bt/sdkconfig.rename.esp32h2
View File

@ -1,34 +0,0 @@
# sdkconfig replacement configurations for deprecated options formatted as
# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
CONFIG_BT_NIMBLE_CONTROLLER_ENABLED CONFIG_BT_BLE_CONTROLLER_ENABLED
CONFIG_BT_NIMBLE_CONTROL_USE_RAM_HCI CONFIG_BT_BLE_CONTROL_USE_RAM_HCI
CONFIG_BT_NIMBLE_CONTROL_USE_UART_HCI CONFIG_BT_BLE_CONTROL_USE_UART_HCI
CONFIG_BT_NIMBLE_HCI_EVT_BUF_SIZE CONFIG_BT_BLE_HCI_EVT_BUF_SIZE
CONFIG_BT_NIMBLE_MEMORY_SETTINGS CONFIG_BT_BLE_MEMORY_SETTINGS
CONFIG_BT_NIMBLE_MSYS_1_BLOCK_COUNT CONFIG_BT_BLE_MSYS_1_BLOCK_COUNT
CONFIG_BT_NIMBLE_MSYS_1_BLOCK_SIZE CONFIG_BT_BLE_MSYS_1_BLOCK_SIZE
CONFIG_BT_NIMBLE_MSYS_2_BLOCK_COUNT CONFIG_BT_BLE_MSYS_2_BLOCK_COUNT
CONFIG_BT_NIMBLE_MSYS_2_BLOCK_SIZE CONFIG_BT_BLE_MSYS_2_BLOCK_SIZE
CONFIG_BT_NIMBLE_LL_RESOLV_LIST_SIZE CONFIG_BT_BLE_LL_RESOLV_LIST_SIZE
CONFIG_BT_NIMBLE_HCI_EVT_HI_BUF_COUNT CONFIG_BT_BLE_HCI_EVT_HI_BUF_COUNT
CONFIG_BT_NIMBLE_HCI_EVT_LO_BUF_COUNT CONFIG_BT_BLE_HCI_EVT_LO_BUF_COUNT
CONFIG_BT_NIMBLE_LL_DUP_SCAN_LIST_COUNT CONFIG_BT_BLE_LL_DUP_SCAN_LIST_COUNT
CONFIG_BT_NIMBLE_MAX_CONNECTIONS CONFIG_BT_BLE_MAX_CONNECTIONS
CONFIG_BT_NIMBLE_ACL_BUF_COUNT CONFIG_BT_BLE_ACL_BUF_COUNT
CONFIG_BT_NIMBLE_ACL_BUF_SIZE CONFIG_BT_BLE_ACL_BUF_SIZE
CONFIG_BT_NIMBLE_HCI_UART_PORT CONFIG_BT_BLE_HCI_UART_PORT
CONFIG_BT_NIMBLE_HCI_UART_BAUD CONFIG_BT_BLE_HCI_UART_BAUD
CONFIG_BT_NIMBLE_SLEEP_ENABLE CONFIG_BT_BLE_SLEEP_ENABLE
CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM CONFIG_BT_BLE_COEX_PHY_CODED_TX_RX_TLIM
CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_EFF
CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EN CONFIG_BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_EN
CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_DIS CONFIG_BT_BLE_COEX_PHY_CODED_TX_RX_TLIM_DIS
CONFIG_BT_NIMBLE_MAX_BONDS CONFIG_BT_BLE_MAX_BONDS
CONFIG_BT_NIMBLE_WHITELIST_SIZE CONFIG_BT_BLE_WHITELIST_SIZE
CONFIG_BT_NIMBLE_CONTROLLER_TASK_STACK_SIZE CONFIG_BT_BLE_CONTROLLER_TASK_STACK_SIZE
CONFIG_BT_NIMBLE_MEM_ALLOC_MODE CONFIG_BT_BLE_MEM_ALLOC_MODE
CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_INTERNAL CONFIG_BT_BLE_MEM_ALLOC_MODE_INTERNAL
CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_EXTERNAL CONFIG_BT_BLE_MEM_ALLOC_MODE_EXTERNAL
CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_DEFAULT CONFIG_BT_BLE_MEM_ALLOC_MODE_DEFAULT
CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_IRAM_8BIT CONFIG_BT_BLE_MEM_ALLOC_MODE_IRAM_8BIT