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Merge branch 'feat/gpspi_flash_support_c61' into 'master'
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test(esp_flash): Enable test for spi_flash component for c61/c5/p4 Closes IDF-10313, IDF-8715, IDF-9314, IDF-10991, and IDF-8985 See merge request espressif/esp-idf!33238
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commit
59e1838270
@ -24,8 +24,6 @@
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#include <string.h>
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#include "hal/misc.h"
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// TODO: [ESP32C61] IDF-9314, inherit from c6
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#ifdef __cplusplus
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extern "C" {
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#endif
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@ -1,10 +1,6 @@
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# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
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components/spi_flash/test_apps/esp_flash:
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disable:
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- if: IDF_TARGET in ["esp32c5", "esp32c61"]
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temporary: true
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reason: not support yet # TODO: [ESP32C5] IDF-8715, [esp32c61] IDF-9314
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depends_filepatterns:
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- components/bootloader_support/bootloader_flash/**/*
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depends_components:
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@ -16,10 +12,9 @@ components/spi_flash/test_apps/esp_flash:
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- esptool_py # Some flash related kconfigs are listed here.
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components/spi_flash/test_apps/esp_flash_stress:
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disable:
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- if: IDF_TARGET == "esp32c5"
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temporary: true
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reason: not support yet # TODO: [ESP32C5] IDF-8715, IDF-10313
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depends_components:
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- esp_mm
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- spi_flash
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components/spi_flash/test_apps/flash_encryption:
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disable_test:
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@ -52,21 +47,8 @@ components/spi_flash/test_apps/flash_suspend:
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components/spi_flash/test_apps/mspi_test:
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disable:
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- if: IDF_TARGET in ["esp32c5", "esp32c61"]
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temporary: true
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reason: not support yet # TODO: [ESP32C5] IDF-8715, [esp32c61] IDF9316
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- if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1
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- if: CONFIG_NAME == "xip_psram" and SOC_SPIRAM_SUPPORTED != 1
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- if: CONFIG_NAME == "psram" and IDF_TARGET in ["esp32p4"]
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temporary: true
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reason: not supported yet #TODO: IDF-7499 for p4
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- if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32p4"]
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temporary: true
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reason: not supported yet #TODO: IDF-7556 for p4
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disable_test:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: test not pass, should be re-enable # TODO: IDF-8985
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depends_filepatterns:
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- components/bootloader_support/bootloader_flash/**/*
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depends_components:
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@ -1,2 +1,2 @@
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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@ -68,7 +68,7 @@
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#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
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#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
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#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6
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#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61
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#define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs
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#define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd
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#define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp
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@ -5,7 +5,6 @@ from pytest_embedded import Dut
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@pytest.mark.supported_targets
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@pytest.mark.temp_skip_ci(targets=['esp32c5', 'esp32c61'], reason='not support yet') # TODO: [ESP32C5] IDF-8715, IDF-10313, [ESP32C61] IDF-9314 IDF-10991
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@pytest.mark.generic
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@pytest.mark.parametrize(
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'config',
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@ -1,2 +1,2 @@
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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@ -5,7 +5,6 @@ from pytest_embedded import Dut
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@pytest.mark.supported_targets
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@pytest.mark.temp_skip_ci(targets=['esp32c5'], reason='not support yet') # TODO: [ESP32C5] IDF-8715, IDF-10313
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@pytest.mark.generic
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@pytest.mark.parametrize(
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'config',
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2010-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -280,7 +280,12 @@ TEST_CASE("Test esp_flash_write", "[spi_flash][esp_flash]")
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* NB: At the moment these only support aligned addresses, because memcpy
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* is not aware of the 32-but load requirements for these regions.
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*/
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#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
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#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) 0x40000000, start, 16));
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) 0x40070000, start, 16));
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) 0x40078000, start, 16));
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) 0x40080000, start, 16));
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#else
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#define TEST_SOC_IROM_ADDR (SOC_IROM_LOW)
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#define TEST_SOC_CACHE_RAM_BANK0_ADDR (SOC_IRAM_LOW)
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#define TEST_SOC_CACHE_RAM_BANK1_ADDR (SOC_IRAM_LOW + 0x2000)
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@ -297,11 +302,6 @@ TEST_CASE("Test esp_flash_write", "[spi_flash][esp_flash]")
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) TEST_SOC_CACHE_RAM_BANK3_ADDR, start, 16));
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) TEST_SOC_RTC_IRAM_ADDR, start, 16));
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) TEST_SOC_RTC_DRAM_ADDR, start, 16));
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#else
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) 0x40000000, start, 16));
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) 0x40070000, start, 16));
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) 0x40078000, start, 16));
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ESP_ERROR_CHECK(esp_flash_write(NULL, (char *) 0x40080000, start, 16));
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#endif
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}
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# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: Apache-2.0
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import pytest
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from pytest_embedded import Dut
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# TODO: [ESP32P4] IDF-8985 [ESP32C5] IDF-8715, IDF-10313, [ESP32C61] IDF-9314 IDF-10991
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@pytest.mark.temp_skip_ci(targets=['esp32p4', 'esp32c5', 'esp32c61'], reason='esp32p4, esp32c5 support TBD')
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@pytest.mark.supported_targets
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@pytest.mark.generic
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@pytest.mark.parametrize(
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