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feat(esp_hw_support): add case to test slow clock switching
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -24,6 +24,7 @@
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#include "esp_rom_sys.h"
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#include "esp_rom_uart.h"
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#include "test_utils.h"
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#include "esp_random.h"
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#include "esp_sleep.h"
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#include "esp_system.h"
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#include "esp_private/esp_clk.h"
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@ -119,6 +120,26 @@ TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]")
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#endif
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}
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#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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TEST_CASE("Test RTC_SLOW_CLK sources switching", "[rtc_clk]")
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{
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soc_rtc_slow_clk_src_t clk_src_before_switch = rtc_clk_slow_src_get();
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soc_rtc_slow_clk_src_t switching_sources[] = {SOC_RTC_SLOW_CLK_SRC_RC_SLOW, SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256};
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for (uint32_t test_cnt = 0; test_cnt < 100; test_cnt++) {
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uint32_t src_id = esp_random() % 2;
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if (switching_sources[src_id] == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {
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rtc_clk_8m_enable(true, true);
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}
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rtc_clk_slow_src_set(switching_sources[src_id]);
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esp_rom_delay_us(10*1000);
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TEST_ASSERT_EQUAL(switching_sources[src_id], rtc_clk_slow_src_get());
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}
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rtc_clk_slow_src_set(clk_src_before_switch);
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printf("done\n");
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}
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#endif
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/* The following two are not unit tests, but are added here to make it easy to
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* check the frequency of 150k/32k oscillators. The following two "tests" will
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* output either 32k or 150k clock to GPIO25.
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