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Merge branch 'bugfix/adc_outof_bound_read' into 'master'

Browse Source 
adc: fix out of bound read

See merge request espressif/esp-idf!24134
This commit is contained in:
morris 2023-06-12 14:13:57 +08:00
commit 575ad2bd6f
22 changed files with 46 additions and 44 deletions
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2
components/driver/deprecated/adc_dma_legacy.c
View File

@ -104,7 +104,7 @@ static void adc_dma_intr_handler(void *arg);
static int8_t adc_digi_get_io_num(adc_unit_t adc_unit, uint8_t adc_channel)
{
assert(adc_unit <= SOC_ADC_PERIPH_NUM);
assert(adc_unit < SOC_ADC_PERIPH_NUM);
uint8_t adc_n = (adc_unit == ADC_UNIT_1) ? 0 : 1;
return adc_channel_io_map[adc_n][adc_channel];
}

2
components/driver/deprecated/i2s_legacy.c
View File

@ -1730,7 +1730,7 @@ esp_err_t i2s_write_expand(i2s_port_t i2s_num, const void *src, size_t size, siz
esp_err_t i2s_read(i2s_port_t i2s_num, void *dest, size_t size, size_t *bytes_read, TickType_t ticks_to_wait)
{
char *data_ptr;;
char *data_ptr;
char *dest_byte;
int bytes_can_read;
*bytes_read = 0;

3
components/driver/gptimer/gptimer.c
View File

@ -65,11 +65,10 @@ static esp_err_t gptimer_register_to_group(gptimer_t *timer)
portEXIT_CRITICAL(&group->spinlock);
if (timer_id < 0) {
gptimer_release_group_handle(group);
group = NULL;
} else {
timer->timer_id = timer_id;
timer->group = group;
break;;
break;
}
}
ESP_RETURN_ON_FALSE(timer_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free timer");

5
components/driver/parlio/parlio_tx.c
View File

@ -92,7 +92,6 @@ static esp_err_t parlio_tx_register_to_group(parlio_tx_unit_t *unit)
if (unit_id < 0) {
// didn't find a free unit slot in the group
parlio_release_group_handle(group);
group = NULL;
} else {
unit->unit_id = unit_id;
unit->group = group;
@ -477,6 +476,8 @@ esp_err_t parlio_tx_unit_enable(parlio_tx_unit_handle_t tx_unit)
if (atomic_compare_exchange_strong(&tx_unit->fsm, &expected_fsm, PARLIO_TX_FSM_RUN_WAIT)) {
// check if we need to start one transaction
if (xQueueReceive(tx_unit->trans_queues[PARLIO_TX_QUEUE_PROGRESS], &t, 0) == pdTRUE) {
// sanity check
assert(t);
atomic_store(&tx_unit->fsm, PARLIO_TX_FSM_RUN);
parlio_tx_do_transaction(tx_unit, t);
} else {
@ -611,6 +612,8 @@ static void IRAM_ATTR parlio_tx_default_isr(void *args)
expected_fsm = PARLIO_TX_FSM_ENABLE;
if (atomic_compare_exchange_strong(&tx_unit->fsm, &expected_fsm, PARLIO_TX_FSM_RUN_WAIT)) {
if (xQueueReceiveFromISR(tx_unit->trans_queues[PARLIO_TX_QUEUE_PROGRESS], &trans_desc, &high_task_woken) == pdTRUE) {
// sanity check
assert(trans_desc);
atomic_store(&tx_unit->fsm, PARLIO_TX_FSM_RUN);
parlio_tx_do_transaction(tx_unit, trans_desc);
if (high_task_woken == pdTRUE) {

1
components/driver/pcnt/pulse_cnt.c
View File

@ -133,7 +133,6 @@ static esp_err_t pcnt_register_to_group(pcnt_unit_t *unit)
portEXIT_CRITICAL(&group->spinlock);
if (unit_id < 0) {
pcnt_release_group_handle(group);
group = NULL;
} else {
unit->group = group;
unit->unit_id = unit_id;

1
components/driver/rmt/rmt_rx.c
View File

@ -133,7 +133,6 @@ static esp_err_t rmt_rx_register_to_group(rmt_rx_channel_t *rx_channel, const rm
if (channel_id < 0) {
// didn't find a capable channel in the group, don't forget to release the group handle
rmt_release_group_handle(group);
group = NULL;
} else {
rx_channel->base.channel_id = channel_id;
rx_channel->base.channel_mask = channel_mask;

1
components/driver/rmt/rmt_tx.c
View File

@ -120,7 +120,6 @@ static esp_err_t rmt_tx_register_to_group(rmt_tx_channel_t *tx_channel, const rm
if (channel_id < 0) {
// didn't find a capable channel in the group, don't forget to release the group handle
rmt_release_group_handle(group);
group = NULL;
} else {
tx_channel->base.channel_id = channel_id;
tx_channel->base.channel_mask = channel_mask;

33
components/driver/sdmmc/sdmmc_host.c
View File

@ -29,10 +29,10 @@
#define SDMMC_EVENT_QUEUE_LENGTH 32
static void sdmmc_isr(void* arg);
static void sdmmc_isr(void *arg);
static void sdmmc_host_dma_init(void);
static const char* TAG = "sdmmc_periph";
static const char *TAG = "sdmmc_periph";
static intr_handle_t s_intr_handle;
static QueueHandle_t s_event_queue;
static SemaphoreHandle_t s_io_intr_event;
@ -56,7 +56,7 @@ static size_t s_slot_width[2] = {1, 1};
* (for GPIO matrix).
*/
#ifdef SOC_SDMMC_USE_GPIO_MATRIX
static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char* name);
static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char *name);
#define configure_pin(name, slot, mode) \
configure_pin_gpio_matrix(s_sdmmc_slot_gpio_num[slot].name, sdmmc_slot_gpio_sig[slot].name, mode, #name)
static sdmmc_slot_io_info_t s_sdmmc_slot_gpio_num[SOC_SDMMC_NUM_SLOTS];
@ -197,7 +197,7 @@ static esp_err_t sdmmc_host_clock_update_command(int slot)
.wait_complete = 1
};
bool repeat = true;
while(repeat) {
while (repeat) {
ESP_RETURN_ON_ERROR(sdmmc_host_start_command(slot, cmd_val, 0), TAG, "sdmmc_host_start_command returned 0x%x", err_rc_);
@ -339,7 +339,7 @@ esp_err_t sdmmc_host_set_card_clk(int slot, uint32_t freq_khz)
return ESP_OK;
}
esp_err_t sdmmc_host_get_real_freq(int slot, int* real_freq_khz)
esp_err_t sdmmc_host_get_real_freq(int slot, int *real_freq_khz)
{
if (real_freq_khz == NULL) {
return ESP_ERR_INVALID_ARG;
@ -366,7 +366,8 @@ esp_err_t sdmmc_host_set_input_delay(int slot, sdmmc_delay_phase_t delay_phase)
ESP_RETURN_ON_FALSE(delay_phase < SOC_SDMMC_DELAY_PHASE_NUM, ESP_ERR_INVALID_ARG, TAG, "invalid delay phase");
uint32_t clk_src_freq_hz = 0;
esp_clk_tree_src_get_freq_hz(SDMMC_CLK_SRC_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_freq_hz);
ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz(SDMMC_CLK_SRC_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_freq_hz),
TAG, "get source clock frequency failed");
//Now we're in high speed. Note ESP SDMMC Host HW only supports integer divider.
int delay_phase_num = 0;
@ -397,7 +398,8 @@ esp_err_t sdmmc_host_set_input_delay(int slot, sdmmc_delay_phase_t delay_phase)
return ESP_OK;
}
esp_err_t sdmmc_host_start_command(int slot, sdmmc_hw_cmd_t cmd, uint32_t arg) {
esp_err_t sdmmc_host_start_command(int slot, sdmmc_hw_cmd_t cmd, uint32_t arg)
{
if (!(slot == 0 || slot == 1)) {
return ESP_ERR_INVALID_ARG;
}
@ -526,7 +528,7 @@ static void configure_pin_iomux(uint8_t gpio_num)
#elif SOC_SDMMC_USE_GPIO_MATRIX
static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char* name)
static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char *name)
{
assert (gpio_num != (uint8_t) GPIO_NUM_NC);
ESP_LOGD(TAG, "using GPIO%d as %s pin", gpio_num, name);
@ -543,7 +545,7 @@ static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig,
#endif // SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t *slot_config)
{
if (!s_intr_handle) {
return ESP_ERR_INVALID_STATE;
@ -559,12 +561,11 @@ esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
uint8_t slot_width = slot_config->width;
// Configure pins
const sdmmc_slot_info_t* slot_info = &sdmmc_slot_info[slot];
const sdmmc_slot_info_t *slot_info = &sdmmc_slot_info[slot];
if (slot_width == SDMMC_SLOT_WIDTH_DEFAULT) {
slot_width = slot_info->width;
}
else if (slot_width > slot_info->width) {
} else if (slot_width > slot_info->width) {
return ESP_ERR_INVALID_ARG;
}
s_slot_width[slot] = slot_width;
@ -683,7 +684,7 @@ esp_err_t sdmmc_host_deinit(void)
return ESP_OK;
}
esp_err_t sdmmc_host_wait_for_event(int tick_count, sdmmc_event_t* out_event)
esp_err_t sdmmc_host_wait_for_event(int tick_count, sdmmc_event_t *out_event)
{
if (!out_event) {
return ESP_ERR_INVALID_ARG;
@ -778,7 +779,6 @@ static void sdmmc_host_dma_init(void)
SDMMC.idinten.ti = 1;
}
void sdmmc_host_dma_stop(void)
{
SDMMC.ctrl.use_internal_dma = 0;
@ -787,7 +787,7 @@ void sdmmc_host_dma_stop(void)
SDMMC.bmod.enable = 0;
}
void sdmmc_host_dma_prepare(sdmmc_desc_t* desc, size_t block_size, size_t data_size)
void sdmmc_host_dma_prepare(sdmmc_desc_t *desc, size_t block_size, size_t data_size)
{
// Set size of data and DMA descriptor pointer
SDMMC.bytcnt = data_size;
@ -862,7 +862,8 @@ esp_err_t sdmmc_host_io_int_wait(int slot, TickType_t timeout_ticks)
* may be dropped. We ignore this problem for now, since the there are no other
* interesting events which can get lost due to this.
*/
static void sdmmc_isr(void* arg) {
static void sdmmc_isr(void *arg)
{
QueueHandle_t queue = (QueueHandle_t) arg;
sdmmc_event_t event;
int higher_priority_task_awoken = pdFALSE;

1
components/driver/sigma_delta/sdm.c
View File

@ -156,7 +156,6 @@ static esp_err_t sdm_register_to_group(sdm_channel_t *chan)
portEXIT_CRITICAL(&group->spinlock);
if (chan_id < 0) {
sdm_release_group_handle(group);
group = NULL;
} else {
chan->group = group;
chan->chan_id = chan_id;

1
components/driver/test_apps/parlio/sdkconfig.ci.iram_safe
View File

@ -5,3 +5,4 @@ CONFIG_PARLIO_ISR_IRAM_SAFE=y
CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
# silent the error check, as the error string are stored in rodata, causing RTL check failure
CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y

1
components/driver/test_apps/rmt/sdkconfig.ci.iram_safe
View File

@ -8,3 +8,4 @@ CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_HAL_ASSERTION_SILENT=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y

6
components/driver/test_apps/touch_sensor_v2/main/test_touch_v2.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -625,7 +625,7 @@ static esp_err_t test_touch_check_ch_touched_with_proximity(uint32_t test_ch_num
continue;
} else { // If the interrupt type error, test error.
ESP_LOGI(TAG, "Touch[%"PRIu32"] intr error, status %"PRIx32", evt_msk0x%x", evt.pad_num, evt.pad_status, evt.intr_mask);
continue;;
continue;
}
} else {
ESP_LOGI(TAG, "Touch intr exceed time");
@ -667,7 +667,7 @@ static esp_err_t test_touch_check_ch_released_with_proximity(uint32_t test_ch_nu
continue;
} else { // If the interrupt type error, test error.
ESP_LOGI(TAG, "Touch[%"PRIu32"] intr error, status %"PRIx32", evt_msk0x%x", evt.pad_num, evt.pad_status, evt.intr_mask);
continue;;
continue;
}
} else {
ESP_LOGI(TAG, "Touch intr exceed time");

1
components/driver/touch_sensor/esp32/touch_sensor.c
View File

@ -295,6 +295,7 @@ esp_err_t touch_pad_config(touch_pad_t touch_num, uint16_t threshold)
uint32_t wait_time_ms = 0;
uint32_t wait_tick = 0;
uint32_t rtc_clk_freq = rtc_clk_slow_freq_get_hz();
assert(rtc_clk_freq != 0);
touch_pad_set_group_mask((1 << touch_num), (1 << touch_num), (1 << touch_num));
touch_pad_get_measurement_interval(&sleep_time);
touch_pad_get_measurement_clock_cycles(&meas_cycle);

2
components/driver/twai/twai.c
View File

@ -688,7 +688,7 @@ esp_err_t twai_reconfigure_alerts(uint32_t alerts_enabled, uint32_t *current_ale
TWAI_ENTER_CRITICAL();
//Clear any unhandled alerts
if (current_alerts != NULL) {
*current_alerts = p_twai_obj->alerts_triggered;;
*current_alerts = p_twai_obj->alerts_triggered;
}
p_twai_obj->alerts_triggered = 0;
p_twai_obj->alerts_enabled = alerts_enabled; //Update enabled alerts

4
components/esp_hw_support/esp_etm.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -145,7 +145,7 @@ static esp_err_t etm_chan_register_to_group(esp_etm_channel_t *chan)
} else {
chan->chan_id = chan_id;
chan->group = group;
break;;
break;
}
}
ESP_RETURN_ON_FALSE(chan_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free channel");

2
components/esp_hw_support/port/esp32c3/esp_memprot.c
View File

@ -756,7 +756,7 @@ esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config)
esp_err_t esp_mprot_dump_configuration(char **dump_info_string)
{
if (dump_info_string == NULL) {
return ESP_ERR_INVALID_ARG;;
return ESP_ERR_INVALID_ARG;
}
*dump_info_string = calloc(1024, 1);

2
components/hal/emac_hal.c
View File

@ -230,7 +230,7 @@ void emac_hal_init_mac_default(emac_hal_context_t *hal)
/* Enable Carrier Sense During Transmission */
emac_ll_carrier_sense_enable(hal->mac_regs, true);
/* Select speed: port: 10/100 Mbps, here set default 100M, afterwards, will reset by auto-negotiation */
emac_ll_set_port_speed(hal->mac_regs, ETH_SPEED_100M);;
emac_ll_set_port_speed(hal->mac_regs, ETH_SPEED_100M);
/* Allow the reception of frames when the TX_EN signal is asserted in Half-Duplex mode */
emac_ll_recv_own_enable(hal->mac_regs, true);
/* Disable internal loopback mode */

4
components/hal/esp32/include/hal/mcpwm_ll.h
View File

@ -312,7 +312,7 @@ static inline void mcpwm_ll_timer_set_start_stop_command(mcpwm_dev_t *mcpwm, int
break;
default:
HAL_ASSERT(false);
break;;
break;
}
}
@ -918,7 +918,7 @@ static inline void mcpwm_ll_operator_set_deadtime_clock_src(mcpwm_dev_t *mcpwm,
break;
case MCPWM_LL_DEADTIME_CLK_SRC_TIMER:
mcpwm->operators[operator_id].dt_cfg.dt_clk_sel = 1;
break;;
break;
default:
HAL_ASSERT(false);
}

6
components/hal/esp32c6/include/hal/mcpwm_ll.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -323,7 +323,7 @@ static inline void mcpwm_ll_timer_set_start_stop_command(mcpwm_dev_t *mcpwm, int
break;
default:
HAL_ASSERT(false);
break;;
break;
}
}
@ -941,7 +941,7 @@ static inline void mcpwm_ll_operator_set_deadtime_clock_src(mcpwm_dev_t *mcpwm,
break;
case MCPWM_LL_DEADTIME_CLK_SRC_TIMER:
mcpwm->operators[operator_id].dt_cfg.db_clk_sel = 1;
break;;
break;
default:
HAL_ASSERT(false);
}

4
components/hal/esp32h2/include/hal/mcpwm_ll.h
View File

@ -321,7 +321,7 @@ static inline void mcpwm_ll_timer_set_start_stop_command(mcpwm_dev_t *mcpwm, int
break;
default:
HAL_ASSERT(false);
break;;
break;
}
}
@ -939,7 +939,7 @@ static inline void mcpwm_ll_operator_set_deadtime_clock_src(mcpwm_dev_t *mcpwm,
break;
case MCPWM_LL_DEADTIME_CLK_SRC_TIMER:
mcpwm->operators[operator_id].dt_cfg.db_clk_sel = 1;
break;;
break;
default:
HAL_ASSERT(false);
}

4
components/hal/esp32s3/include/hal/mcpwm_ll.h
View File

@ -312,7 +312,7 @@ static inline void mcpwm_ll_timer_set_start_stop_command(mcpwm_dev_t *mcpwm, int
break;
default:
HAL_ASSERT(false);
break;;
break;
}
}
@ -930,7 +930,7 @@ static inline void mcpwm_ll_operator_set_deadtime_clock_src(mcpwm_dev_t *mcpwm,
break;
case MCPWM_LL_DEADTIME_CLK_SRC_TIMER:
mcpwm->operators[operator_id].dt_cfg.dt_clk_sel = 1;
break;;
break;
default:
HAL_ASSERT(false);
}

4
examples/peripherals/twai/twai_network/twai_network_slave/main/twai_network_example_slave_main.c
View File

@ -235,8 +235,8 @@ void app_main(void)
tx_task_queue = xQueueCreate(1, sizeof(tx_task_action_t));
rx_task_queue = xQueueCreate(1, sizeof(rx_task_action_t));
ctrl_task_sem = xSemaphoreCreateBinary();
stop_data_sem = xSemaphoreCreateBinary();;
done_sem = xSemaphoreCreateBinary();;
stop_data_sem = xSemaphoreCreateBinary();
done_sem = xSemaphoreCreateBinary();
xTaskCreatePinnedToCore(twai_receive_task, "TWAI_rx", 4096, NULL, RX_TASK_PRIO, NULL, tskNO_AFFINITY);
xTaskCreatePinnedToCore(twai_transmit_task, "TWAI_tx", 4096, NULL, TX_TASK_PRIO, NULL, tskNO_AFFINITY);
xTaskCreatePinnedToCore(twai_control_task, "TWAI_ctrl", 4096, NULL, CTRL_TSK_PRIO, NULL, tskNO_AFFINITY);