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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'feature/add_chip_revision_to_image_header_4.0' into 'release/v4.0'
Add chip revision into image header(v4.0) See merge request espressif/esp-idf!6127
This commit is contained in:
commit
57335cfc26
4
Kconfig
4
Kconfig
@ -29,6 +29,10 @@ mainmenu "Espressif IoT Development Framework Configuration"
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default "IDF_TARGET_NOT_SET" if IDF_TARGET_ENV=""
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default IDF_TARGET_ENV
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config IDF_FIRMWARE_CHIP_ID
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hex
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default 0x0000 if IDF_TARGET="esp32"
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default 0xFFFF
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menu "SDK tool configuration"
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config SDK_TOOLPREFIX
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@ -200,7 +200,7 @@ esp_err_t esp_ota_write(esp_ota_handle_t handle, const void *data, size_t size)
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// must erase the partition before writing to it
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assert(it->erased_size > 0 && "must erase the partition before writing to it");
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if (it->wrote_size == 0 && it->partial_bytes == 0 && size > 0 && data_bytes[0] != ESP_IMAGE_HEADER_MAGIC) {
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ESP_LOGE(TAG, "OTA image has invalid magic byte (expected 0xE9, saw 0x%02x", data_bytes[0]);
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ESP_LOGE(TAG, "OTA image has invalid magic byte (expected 0xE9, saw 0x%02x)", data_bytes[0]);
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return ESP_ERR_OTA_VALIDATE_FAILED;
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}
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@ -15,6 +15,7 @@
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#pragma once
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#include "esp_flash_partitions.h"
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#include "esp_image_format.h"
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#include "esp_app_format.h"
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#ifdef __cplusplus
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extern "C" {
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@ -141,6 +142,23 @@ int bootloader_common_select_otadata(const esp_ota_select_entry_t *two_otadata,
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*/
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esp_err_t bootloader_common_get_partition_description(const esp_partition_pos_t *partition, esp_app_desc_t *app_desc);
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/**
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* @brief Get chip revision
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*
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* @return Chip revision number
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*/
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uint8_t bootloader_common_get_chip_revision(void);
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/**
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* @brief Check if the image (bootloader and application) has valid chip ID and revision
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*
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* @param img_hdr: image header
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* @return
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* - ESP_OK: image and chip are matched well
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* - ESP_FAIL: image doesn't match to the chip
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*/
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esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hdr);
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/**
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* @brief Configure VDDSDIO, call this API to rise VDDSDIO to 1.9V when VDDSDIO regulator is enabled as 1.8V mode.
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*/
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@ -13,6 +13,19 @@
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// limitations under the License.
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#pragma once
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/**
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* @brief ESP chip ID
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*
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*/
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typedef enum {
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ESP_CHIP_ID_ESP32 = 0x0000, /*!< chip ID: ESP32 */
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ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
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} __attribute__((packed)) esp_chip_id_t;
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/** @cond */
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_Static_assert(sizeof(esp_chip_id_t) == 2, "esp_chip_id_t should be 16 bit");
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/** @endcond */
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/**
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* @brief SPI flash mode, used in esp_image_header_t
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*/
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@ -63,7 +76,9 @@ typedef struct {
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* the IDF bootloader uses software to configure the WP
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* pin and sets this field to 0xEE=disabled) */
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uint8_t spi_pin_drv[3]; /*!< Drive settings for the SPI flash pins (read by ROM bootloader) */
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uint8_t reserved[11]; /*!< Reserved bytes in ESP32 additional header space, currently unused */
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esp_chip_id_t chip_id; /*!< Chip identification number */
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uint8_t min_chip_rev; /*!< Minimum chip revision supported by image */
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uint8_t reserved[8]; /*!< Reserved bytes in additional header space, currently unused */
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uint8_t hash_appended; /*!< If 1, a SHA256 digest "simple hash" (of the entire image) is appended after the checksum.
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* Included in image length. This digest
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* is separate to secure boot and only used for detecting corruption.
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@ -25,6 +25,8 @@
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#include "bootloader_common.h"
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#include "soc/gpio_periph.h"
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#include "soc/rtc.h"
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#include "soc/efuse_reg.h"
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#include "soc/apb_ctrl_reg.h"
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#include "esp_image_format.h"
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#include "bootloader_sha.h"
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#include "sys/param.h"
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@ -270,3 +272,51 @@ void bootloader_common_vddsdio_configure()
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}
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#endif // CONFIG_BOOTLOADER_VDDSDIO_BOOST
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}
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#ifdef CONFIG_IDF_TARGET_ESP32
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uint8_t bootloader_common_get_chip_revision(void)
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{
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uint8_t eco_bit0, eco_bit1, eco_bit2;
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eco_bit0 = (REG_READ(EFUSE_BLK0_RDATA3_REG) & 0xF000) >> 15;
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eco_bit1 = (REG_READ(EFUSE_BLK0_RDATA5_REG) & 0x100000) >> 20;
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eco_bit2 = (REG_READ(APB_CTRL_DATE_REG) & 0x80000000) >> 31;
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uint32_t combine_value = (eco_bit2 << 2) | (eco_bit1 << 1) | eco_bit0;
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uint8_t chip_ver = 0;
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switch (combine_value) {
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case 0:
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chip_ver = 0;
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break;
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case 1:
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chip_ver = 1;
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break;
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case 3:
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chip_ver = 2;
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break;
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case 7:
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chip_ver = 3;
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break;
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default:
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chip_ver = 0;
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break;
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}
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return chip_ver;
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}
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#endif
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esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hdr)
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{
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esp_err_t err = ESP_OK;
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esp_chip_id_t chip_id = CONFIG_IDF_FIRMWARE_CHIP_ID;
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if (chip_id != img_hdr->chip_id) {
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ESP_LOGE(TAG, "mismatch chip ID, expect %d, found %d", chip_id, img_hdr->chip_id);
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err = ESP_FAIL;
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}
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uint8_t revision = bootloader_common_get_chip_revision();
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if (revision < img_hdr->min_chip_rev) {
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ESP_LOGE(TAG, "can't run on lower chip revision, expect %d, found %d", revision, img_hdr->min_chip_rev);
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err = ESP_FAIL;
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} else if (revision != img_hdr->min_chip_rev) {
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ESP_LOGI(TAG, "mismatch chip revision, expect %d, found %d", revision, img_hdr->min_chip_rev);
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}
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return err;
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}
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@ -127,6 +127,14 @@ static esp_err_t bootloader_main()
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ESP_LOGE(TAG, "failed to load bootloader header!");
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return ESP_FAIL;
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}
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/* Check chip ID and minimum chip revision that supported by this image */
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uint8_t revision = bootloader_common_get_chip_revision();
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ESP_LOGI(TAG, "Chip Revision: %d", revision);
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if (bootloader_common_check_chip_validity(&fhdr) != ESP_OK) {
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return ESP_FAIL;
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}
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bootloader_init_flash_configure(&fhdr);
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#if (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ == 240)
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//Check if ESP32 is rated for a CPU frequency of 160MHz only
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@ -24,6 +24,7 @@
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#include <bootloader_random.h>
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#include <bootloader_sha.h>
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#include "bootloader_util.h"
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#include "bootloader_common.h"
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/* Checking signatures as part of verifying images is necessary:
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- Always if secure boot is enabled
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@ -278,6 +279,9 @@ static esp_err_t verify_image_header(uint32_t src_addr, const esp_image_header_t
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}
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err = ESP_ERR_IMAGE_INVALID;
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}
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if (bootloader_common_check_chip_validity(image) != ESP_OK) {
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err = ESP_ERR_IMAGE_INVALID;
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}
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if (!silent) {
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if (image->spi_mode > ESP_IMAGE_SPI_MODE_SLOW_READ) {
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ESP_LOGW(TAG, "image at 0x%x has invalid SPI mode %d", src_addr, image->spi_mode);
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@ -400,15 +400,6 @@ void start_cpu0_default(void)
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esp_err_t flash_ret = esp_flash_init_default_chip();
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assert(flash_ret == ESP_OK);
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uint8_t revision = esp_efuse_get_chip_ver();
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ESP_LOGI(TAG, "Chip Revision: %d", revision);
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if (revision > CONFIG_ESP32_REV_MIN) {
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ESP_LOGW(TAG, "Chip revision is higher than the one configured in menuconfig. Suggest to upgrade it.");
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} else if(revision != CONFIG_ESP32_REV_MIN) {
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ESP_LOGE(TAG, "ESP-IDF can't support this chip revision. Modify minimum supported revision in menuconfig");
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abort();
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}
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#ifdef CONFIG_PM_ENABLE
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esp_pm_impl_init();
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#ifdef CONFIG_PM_DFS_INIT_AUTO
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@ -31,6 +31,10 @@ endif
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ESPTOOL_ELF2IMAGE_OPTIONS :=
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ifdef CONFIG_ESP32_REV_MIN
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ESPTOOL_ELF2IMAGE_OPTIONS += --min-rev $(CONFIG_ESP32_REV_MIN)
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endif
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ifdef CONFIG_SECURE_BOOT_ENABLED
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ifndef CONFIG_SECURE_BOOT_ALLOW_SHORT_APP_PARTITION
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ifndef IS_BOOTLOADER_BUILD
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@ -1 +1 @@
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Subproject commit 1a7dbf787e7e504acdeaea074d15a5ccaf87e9e8
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Subproject commit 4f1e825d2d1ee33b896b3977905fb29ac6cc0794
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@ -52,6 +52,10 @@ if(CONFIG_SECURE_BOOT_ENABLED AND
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set(ESPTOOLPY_ELF2IMAGE_OPTIONS ${ESPTOOLPY_ELF2IMAGE_OPTIONS} --secure-pad)
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endif()
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if(CONFIG_ESP32_REV_MIN)
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set(ESPTOOLPY_ELF2IMAGE_OPTIONS ${ESPTOOLPY_ELF2IMAGE_OPTIONS} --min-rev ${CONFIG_ESP32_REV_MIN})
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endif()
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if(CONFIG_ESPTOOLPY_FLASHSIZE_DETECT)
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# Set ESPFLASHSIZE to 'detect' *after* elf2image options are generated,
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# as elf2image can't have 'detect' as an option...
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