From 42ae0166d7a0b8160777fe5ab45b22811d058e67 Mon Sep 17 00:00:00 2001 From: Shu Chen Date: Fri, 23 Apr 2021 18:10:45 +0800 Subject: [PATCH] esp32c3: fix typos of c3 path --- components/esp_system/port/cpu_start.c | 13 +++++-------- components/esp_system/sleep_modes.c | 2 +- 2 files changed, 6 insertions(+), 9 deletions(-) diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index bcb769dfe5..03377115a6 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -60,7 +60,7 @@ #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rtc.h" #include "esp32c3/cache_err_int.h" -#include "esp32s3/rom/cache.h" +#include "esp32c3/rom/cache.h" #include "esp32c3/rom/rtc.h" #include "soc/cache_memory.h" #include "esp32c3/memprot.h" @@ -89,16 +89,13 @@ #if CONFIG_APP_BUILD_TYPE_ELF_RAM #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/spi_flash.h" -#endif // CONFIG_IDF_TARGET_ESP32 -#if CONFIG_IDF_TARGET_ESP32S2 +#elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/rom/spi_flash.h" -#endif // CONFIG_IDF_TARGET_ESP32S2 -#if CONFIG_IDF_TARGET_ESP32S3 +#elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/spi_flash.h" -#endif // CONFIG_IDF_TARGET_ESP32S3 -#if CONFIG_IDF_TARGET_ESP32C3 +#elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/spi_flash.h" -#endif // CONFIG_IDF_TARGET_ESP32C3 +#endif #endif // CONFIG_APP_BUILD_TYPE_ELF_RAM #include "esp_private/startup_internal.h" diff --git a/components/esp_system/sleep_modes.c b/components/esp_system/sleep_modes.c index d75462a141..510e483b77 100644 --- a/components/esp_system/sleep_modes.c +++ b/components/esp_system/sleep_modes.c @@ -68,7 +68,7 @@ #include "soc/extmem_reg.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/clk.h" -#include "esp32s3/rom/cache.h" +#include "esp32c3/rom/cache.h" #include "esp32c3/rom/rtc.h" #include "soc/extmem_reg.h" #include "esp_heap_caps.h"