mirror of
https://github.com/espressif/esp-idf.git
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pcnt: refactor hal driver
This commit is contained in:
morris
parent
9920271c21
commit
56760c9669
@ -6,20 +6,104 @@
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#pragma once
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#include "freertos/FreeRTOS.h"
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#include "esp_types.h"
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#include "esp_err.h"
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#include "esp_intr_alloc.h"
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#include "freertos/FreeRTOS.h"
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#include "driver/gpio.h"
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#include "soc/soc_caps.h"
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#include "hal/pcnt_types.h"
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#include "soc/pcnt_periph.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define PCNT_PIN_NOT_USED (-1) /*!< When selected for a pin, this pin will not be used */
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typedef intr_handle_t pcnt_isr_handle_t;
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/**
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* @brief PCNT port number, the max port number is (PCNT_PORT_MAX - 1).
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*/
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typedef enum {
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PCNT_PORT_0, /*!< PCNT port 0 */
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PCNT_PORT_MAX, /*!< PCNT port max */
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} pcnt_port_t;
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/**
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* @brief Selection of all available PCNT units
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*/
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typedef enum {
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PCNT_UNIT_0, /*!< PCNT unit 0 */
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PCNT_UNIT_1, /*!< PCNT unit 1 */
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PCNT_UNIT_2, /*!< PCNT unit 2 */
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PCNT_UNIT_3, /*!< PCNT unit 3 */
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#if SOC_PCNT_UNITS_PER_GROUP > 4
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PCNT_UNIT_4, /*!< PCNT unit 4 */
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PCNT_UNIT_5, /*!< PCNT unit 5 */
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PCNT_UNIT_6, /*!< PCNT unit 6 */
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PCNT_UNIT_7, /*!< PCNT unit 7 */
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#endif
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PCNT_UNIT_MAX,
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} pcnt_unit_t;
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/**
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* @brief Selection of channels available for a single PCNT unit
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*/
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typedef enum {
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PCNT_CHANNEL_0, /*!< PCNT channel 0 */
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PCNT_CHANNEL_1, /*!< PCNT channel 1 */
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PCNT_CHANNEL_MAX,
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} pcnt_channel_t;
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/**
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* @brief Selection of counter's events the may trigger an interrupt
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*/
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typedef enum {
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PCNT_EVT_THRES_1 = 1 << 2, /*!< PCNT watch point event: threshold1 value event */
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PCNT_EVT_THRES_0 = 1 << 3, /*!< PCNT watch point event: threshold0 value event */
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PCNT_EVT_L_LIM = 1 << 4, /*!< PCNT watch point event: Minimum counter value */
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PCNT_EVT_H_LIM = 1 << 5, /*!< PCNT watch point event: Maximum counter value */
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PCNT_EVT_ZERO = 1 << 6, /*!< PCNT watch point event: counter value zero event */
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PCNT_EVT_MAX
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} pcnt_evt_type_t;
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/**
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* @brief Selection of available modes that determine the counter's action depending on the state of the control signal's input GPIO
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* @note Configuration covers two actions, one for high, and one for low level on the control input
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*/
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typedef pcnt_channel_level_action_t pcnt_ctrl_mode_t;
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#define PCNT_MODE_KEEP PCNT_CHANNEL_LEVEL_ACTION_KEEP /*!< Control mode: won't change counter mode*/
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#define PCNT_MODE_REVERSE PCNT_CHANNEL_LEVEL_ACTION_INVERSE /*!< Control mode: invert counter mode(increase -> decrease, decrease -> increase) */
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#define PCNT_MODE_DISABLE PCNT_CHANNEL_LEVEL_ACTION_HOLD /*!< Control mode: Inhibit counter(counter value will not change in this condition) */
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#define PCNT_MODE_MAX 3
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/**
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* @brief Selection of available modes that determine the counter's action on the edge of the pulse signal's input GPIO
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* @note Configuration covers two actions, one for positive, and one for negative edge on the pulse input
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*/
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typedef pcnt_channel_edge_action_t pcnt_count_mode_t;
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#define PCNT_COUNT_DIS PCNT_CHANNEL_EDGE_ACTION_HOLD /*!< Counter mode: Inhibit counter(counter value will not change in this condition) */
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#define PCNT_COUNT_INC PCNT_CHANNEL_EDGE_ACTION_INCREASE /*!< Counter mode: Increase counter value */
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#define PCNT_COUNT_DEC PCNT_CHANNEL_EDGE_ACTION_DECREASE /*!< Counter mode: Decrease counter value */
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#define PCNT_COUNT_MAX 3
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/**
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* @brief Pulse Counter configuration for a single channel
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*/
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typedef struct {
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int pulse_gpio_num; /*!< Pulse input GPIO number, if you want to use GPIO16, enter pulse_gpio_num = 16, a negative value will be ignored */
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int ctrl_gpio_num; /*!< Control signal input GPIO number, a negative value will be ignored */
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pcnt_ctrl_mode_t lctrl_mode; /*!< PCNT low control mode */
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pcnt_ctrl_mode_t hctrl_mode; /*!< PCNT high control mode */
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pcnt_count_mode_t pos_mode; /*!< PCNT positive edge count mode */
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pcnt_count_mode_t neg_mode; /*!< PCNT negative edge count mode */
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int16_t counter_h_lim; /*!< Maximum counter value */
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int16_t counter_l_lim; /*!< Minimum counter value */
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pcnt_unit_t unit; /*!< PCNT unit number */
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pcnt_channel_t channel; /*!< the PCNT channel */
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} pcnt_config_t;
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/**
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* @brief Configure Pulse Counter unit
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* @note
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@ -173,7 +257,6 @@ esp_err_t pcnt_get_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16
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* @param unit PCNT unit number
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* @param status Pointer to accept event status word
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* @return
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*
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* - ESP_OK Success
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* - ESP_ERR_INVALID_STATE pcnt driver has not been initialized
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* - ESP_ERR_INVALID_ARG Parameter error
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@ -363,42 +446,6 @@ void pcnt_isr_service_uninstall(void);
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*/
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esp_err_t pcnt_isr_handler_remove(pcnt_unit_t unit);
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/**
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* @addtogroup pcnt-examples
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*
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* @{
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*
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* EXAMPLE OF PCNT CONFIGURATION
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* ==============================
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* @code{c}
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* //1. Config PCNT unit
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* pcnt_config_t pcnt_config = {
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* .pulse_gpio_num = 4, //set gpio4 as pulse input gpio
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* .ctrl_gpio_num = 5, //set gpio5 as control gpio
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* .channel = PCNT_CHANNEL_0, //use unit 0 channel 0
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* .lctrl_mode = PCNT_MODE_REVERSE, //when control signal is low, reverse the primary counter mode(inc->dec/dec->inc)
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* .hctrl_mode = PCNT_MODE_KEEP, //when control signal is high, keep the primary counter mode
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* .pos_mode = PCNT_COUNT_INC, //increment the counter
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* .neg_mode = PCNT_COUNT_DIS, //keep the counter value
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* .counter_h_lim = 10,
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* .counter_l_lim = -10,
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* };
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* pcnt_unit_config(&pcnt_config); //init unit
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* @endcode
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*
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* EXAMPLE OF PCNT EVENT SETTING
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* ==============================
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* @code{c}
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* //2. Configure PCNT watchpoint event.
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* pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, 5); //set thres1 value
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* pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_1); //enable thres1 event
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* @endcode
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*
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* For more examples please refer to PCNT example code in IDF_PATH/examples
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*
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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@ -4,14 +4,15 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "esp_log.h"
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#include "soc/soc_caps.h"
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#if SOC_PCNT_SUPPORTED
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#include "driver/periph_ctrl.h"
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#include "driver/pcnt.h"
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#include "hal/pcnt_hal.h"
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#include "hal/pcnt_ll.h"
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#include "hal/gpio_hal.h"
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#include "soc/pcnt_periph.h"
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#include "esp_rom_gpio.h"
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#define PCNT_CHANNEL_ERR_STR "PCNT CHANNEL ERROR"
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@ -60,19 +61,20 @@ static portMUX_TYPE pcnt_spinlock = portMUX_INITIALIZER_UNLOCKED;
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static inline esp_err_t _pcnt_set_mode(pcnt_port_t pcnt_port, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_count_mode_t pos_mode, pcnt_count_mode_t neg_mode, pcnt_ctrl_mode_t hctrl_mode, pcnt_ctrl_mode_t lctrl_mode)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(channel < PCNT_CHANNEL_MAX, PCNT_CHANNEL_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK((pos_mode < PCNT_COUNT_MAX) && (neg_mode < PCNT_COUNT_MAX), PCNT_COUNT_MODE_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK((hctrl_mode < PCNT_MODE_MAX) && (lctrl_mode < PCNT_MODE_MAX), PCNT_CTRL_MODE_ERR_STR, ESP_ERR_INVALID_ARG);
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pcnt_hal_set_mode(&(p_pcnt_obj[pcnt_port]->hal), unit, channel, pos_mode, neg_mode, hctrl_mode, lctrl_mode);
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pcnt_ll_set_edge_action(p_pcnt_obj[pcnt_port]->hal.dev, unit, channel, pos_mode, neg_mode);
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pcnt_ll_set_level_action(p_pcnt_obj[pcnt_port]->hal.dev, unit, channel, hctrl_mode, lctrl_mode);
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return ESP_OK;
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}
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static inline esp_err_t _pcnt_set_pin(pcnt_port_t pcnt_port, pcnt_unit_t unit, pcnt_channel_t channel, int pulse_io, int ctrl_io)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(channel < PCNT_CHANNEL_MAX, PCNT_CHANNEL_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(GPIO_IS_VALID_GPIO(pulse_io) || pulse_io < 0, PCNT_GPIO_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(GPIO_IS_VALID_GPIO(ctrl_io) || ctrl_io < 0, PCNT_GPIO_ERR_STR, ESP_ERR_INVALID_ARG);
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@ -81,14 +83,14 @@ static inline esp_err_t _pcnt_set_pin(pcnt_port_t pcnt_port, pcnt_unit_t unit, p
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[pulse_io], PIN_FUNC_GPIO);
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gpio_set_direction(pulse_io, GPIO_MODE_INPUT);
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gpio_set_pull_mode(pulse_io, GPIO_PULLUP_ONLY);
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esp_rom_gpio_connect_in_signal(pulse_io, pcnt_periph_signals.units[unit].channels[channel].pulse_sig, 0);
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esp_rom_gpio_connect_in_signal(pulse_io, pcnt_periph_signals.groups[pcnt_port].units[unit].channels[channel].pulse_sig, 0);
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}
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if (ctrl_io >= 0) {
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[ctrl_io], PIN_FUNC_GPIO);
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gpio_set_direction(ctrl_io, GPIO_MODE_INPUT);
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gpio_set_pull_mode(ctrl_io, GPIO_PULLUP_ONLY);
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esp_rom_gpio_connect_in_signal(ctrl_io, pcnt_periph_signals.units[unit].channels[channel].control_sig, 0);
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esp_rom_gpio_connect_in_signal(ctrl_io, pcnt_periph_signals.groups[pcnt_port].units[unit].channels[channel].control_sig, 0);
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}
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return ESP_OK;
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@ -97,18 +99,18 @@ static inline esp_err_t _pcnt_set_pin(pcnt_port_t pcnt_port, pcnt_unit_t unit, p
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static inline esp_err_t _pcnt_get_counter_value(pcnt_port_t pcnt_port, pcnt_unit_t pcnt_unit, int16_t *count)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(pcnt_unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(pcnt_unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(count != NULL, PCNT_ADDRESS_ERR_STR, ESP_ERR_INVALID_ARG);
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pcnt_hal_get_counter_value(&(p_pcnt_obj[pcnt_port]->hal), pcnt_unit, count);
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*count = pcnt_ll_get_count(p_pcnt_obj[pcnt_port]->hal.dev, pcnt_unit);
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return ESP_OK;
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}
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static inline esp_err_t _pcnt_counter_pause(pcnt_port_t pcnt_port, pcnt_unit_t pcnt_unit)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(pcnt_unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(pcnt_unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_ENTER_CRITICAL(&pcnt_spinlock);
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pcnt_hal_counter_pause(&(p_pcnt_obj[pcnt_port]->hal), pcnt_unit);
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pcnt_ll_stop_count(p_pcnt_obj[pcnt_port]->hal.dev, pcnt_unit);
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PCNT_EXIT_CRITICAL(&pcnt_spinlock);
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return ESP_OK;
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}
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@ -116,9 +118,9 @@ static inline esp_err_t _pcnt_counter_pause(pcnt_port_t pcnt_port, pcnt_unit_t p
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static inline esp_err_t _pcnt_counter_resume(pcnt_port_t pcnt_port, pcnt_unit_t pcnt_unit)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(pcnt_unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(pcnt_unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_ENTER_CRITICAL(&pcnt_spinlock);
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pcnt_hal_counter_resume(&(p_pcnt_obj[pcnt_port]->hal), pcnt_unit);
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pcnt_ll_start_count(p_pcnt_obj[pcnt_port]->hal.dev, pcnt_unit);
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PCNT_EXIT_CRITICAL(&pcnt_spinlock);
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return ESP_OK;
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}
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@ -126,115 +128,136 @@ static inline esp_err_t _pcnt_counter_resume(pcnt_port_t pcnt_port, pcnt_unit_t
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static inline esp_err_t _pcnt_counter_clear(pcnt_port_t pcnt_port, pcnt_unit_t pcnt_unit)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(pcnt_unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(pcnt_unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_ENTER_CRITICAL(&pcnt_spinlock);
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pcnt_hal_counter_clear(&(p_pcnt_obj[pcnt_port]->hal), pcnt_unit);
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pcnt_ll_clear_count(p_pcnt_obj[pcnt_port]->hal.dev, pcnt_unit);
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PCNT_EXIT_CRITICAL(&pcnt_spinlock);
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return ESP_OK;
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}
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static inline esp_err_t _pcnt_intr_enable(pcnt_port_t pcnt_port, pcnt_unit_t pcnt_unit)
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static inline esp_err_t _pcnt_intr_enable(pcnt_port_t pcnt_port, pcnt_unit_t pcnt_unit, bool enable)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(pcnt_unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(pcnt_unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_ENTER_CRITICAL(&pcnt_spinlock);
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pcnt_hal_intr_enable(&(p_pcnt_obj[pcnt_port]->hal), pcnt_unit);
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pcnt_ll_enable_intr(p_pcnt_obj[pcnt_port]->hal.dev, 1 << pcnt_unit, enable);
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PCNT_EXIT_CRITICAL(&pcnt_spinlock);
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return ESP_OK;
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}
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static inline esp_err_t _pcnt_intr_disable(pcnt_port_t pcnt_port, pcnt_unit_t pcnt_unit)
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static inline esp_err_t _pcnt_event_enable(pcnt_port_t pcnt_port, pcnt_unit_t unit, pcnt_evt_type_t evt_type, bool enable)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(pcnt_unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_ENTER_CRITICAL(&pcnt_spinlock);
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pcnt_hal_intr_disable(&(p_pcnt_obj[pcnt_port]->hal), pcnt_unit);
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PCNT_EXIT_CRITICAL(&pcnt_spinlock);
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return ESP_OK;
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}
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static inline esp_err_t _pcnt_event_enable(pcnt_port_t pcnt_port, pcnt_unit_t unit, pcnt_evt_type_t evt_type)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(evt_type < PCNT_EVT_MAX, PCNT_EVT_TYPE_ERR_STR, ESP_ERR_INVALID_ARG);
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pcnt_hal_event_enable(&(p_pcnt_obj[pcnt_port]->hal), unit, evt_type);
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return ESP_OK;
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}
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static inline esp_err_t _pcnt_event_disable(pcnt_port_t pcnt_port, pcnt_unit_t unit, pcnt_evt_type_t evt_type)
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{
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PCNT_OBJ_CHECK(pcnt_port);
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PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
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PCNT_CHECK(evt_type < PCNT_EVT_MAX, PCNT_EVT_TYPE_ERR_STR, ESP_ERR_INVALID_ARG);
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pcnt_hal_event_disable(&(p_pcnt_obj[pcnt_port]->hal), unit, evt_type);
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switch (evt_type) {
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case PCNT_EVT_THRES_1:
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pcnt_ll_enable_thres_event(p_pcnt_obj[pcnt_port]->hal.dev, unit, 1, enable);
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break;
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case PCNT_EVT_THRES_0:
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pcnt_ll_enable_thres_event(p_pcnt_obj[pcnt_port]->hal.dev, unit, 0, enable);
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break;
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case PCNT_EVT_L_LIM:
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pcnt_ll_enable_low_limit_event(p_pcnt_obj[pcnt_port]->hal.dev, unit, enable);
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break;
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case PCNT_EVT_H_LIM:
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pcnt_ll_enable_high_limit_event(p_pcnt_obj[pcnt_port]->hal.dev, unit, enable);
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break;
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case PCNT_EVT_ZERO:
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pcnt_ll_enable_zero_cross_event(p_pcnt_obj[pcnt_port]->hal.dev, unit, enable);
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break;
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default:
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PCNT_CHECK(false, PCNT_EVT_TYPE_ERR_STR, ESP_ERR_INVALID_ARG);
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break;
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}
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return ESP_OK;
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}
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static inline esp_err_t _pcnt_set_event_value(pcnt_port_t pcnt_port, pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t value)
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{
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PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(evt_type < PCNT_EVT_MAX, PCNT_EVT_TYPE_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(!(evt_type == PCNT_EVT_L_LIM && value > 0), PCNT_LIMT_VAL_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(!(evt_type == PCNT_EVT_H_LIM && value < 0), PCNT_LIMT_VAL_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
pcnt_hal_set_event_value(&(p_pcnt_obj[pcnt_port]->hal), unit, evt_type, value);
|
||||
switch (evt_type) {
|
||||
case PCNT_EVT_THRES_1:
|
||||
pcnt_ll_set_thres_value(p_pcnt_obj[pcnt_port]->hal.dev, unit, 1, value);
|
||||
break;
|
||||
case PCNT_EVT_THRES_0:
|
||||
pcnt_ll_set_thres_value(p_pcnt_obj[pcnt_port]->hal.dev, unit, 0, value);
|
||||
break;
|
||||
case PCNT_EVT_L_LIM:
|
||||
pcnt_ll_set_low_limit_value(p_pcnt_obj[pcnt_port]->hal.dev, unit, value);
|
||||
break;
|
||||
case PCNT_EVT_H_LIM:
|
||||
pcnt_ll_set_high_limit_value(p_pcnt_obj[pcnt_port]->hal.dev, unit, value);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static inline esp_err_t _pcnt_get_event_value(pcnt_port_t pcnt_port, pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t *value)
|
||||
{
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(evt_type < PCNT_EVT_MAX, PCNT_EVT_TYPE_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(value != NULL, PCNT_ADDRESS_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
|
||||
pcnt_hal_get_event_value(&(p_pcnt_obj[pcnt_port]->hal), unit, evt_type, value);
|
||||
switch (evt_type) {
|
||||
case PCNT_EVT_THRES_1:
|
||||
*value = pcnt_ll_get_thres_value(p_pcnt_obj[pcnt_port]->hal.dev, unit, 1);
|
||||
break;
|
||||
case PCNT_EVT_THRES_0:
|
||||
*value = pcnt_ll_get_thres_value(p_pcnt_obj[pcnt_port]->hal.dev, unit, 0);
|
||||
break;
|
||||
case PCNT_EVT_L_LIM:
|
||||
*value = pcnt_ll_get_low_limit_value(p_pcnt_obj[pcnt_port]->hal.dev, unit);
|
||||
break;
|
||||
case PCNT_EVT_H_LIM:
|
||||
*value = pcnt_ll_get_high_limit_value(p_pcnt_obj[pcnt_port]->hal.dev, unit);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static inline esp_err_t _pcnt_get_event_status(pcnt_port_t pcnt_port, pcnt_unit_t unit, uint32_t *status)
|
||||
{
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(status != NULL, PCNT_ADDRESS_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
|
||||
*status = pcnt_hal_get_event_status(&(p_pcnt_obj[pcnt_port]->hal), unit);
|
||||
*status = pcnt_ll_get_unit_status(p_pcnt_obj[pcnt_port]->hal.dev, unit);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static inline esp_err_t _pcnt_set_filter_value(pcnt_port_t pcnt_port, pcnt_unit_t unit, uint16_t filter_val)
|
||||
{
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(filter_val < 1024, PCNT_PARAM_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
pcnt_hal_set_filter_value(&(p_pcnt_obj[pcnt_port]->hal), unit, filter_val);
|
||||
pcnt_ll_set_glitch_filter_thres(p_pcnt_obj[pcnt_port]->hal.dev, unit, filter_val);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static inline esp_err_t _pcnt_get_filter_value(pcnt_port_t pcnt_port, pcnt_unit_t unit, uint16_t *filter_val)
|
||||
{
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(filter_val != NULL, PCNT_ADDRESS_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
|
||||
pcnt_hal_get_filter_value(&(p_pcnt_obj[pcnt_port]->hal), unit, filter_val);
|
||||
*filter_val = (uint16_t)pcnt_ll_get_glitch_filter_thres(p_pcnt_obj[pcnt_port]->hal.dev, unit);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static inline esp_err_t _pcnt_filter_enable(pcnt_port_t pcnt_port, pcnt_unit_t unit)
|
||||
static inline esp_err_t _pcnt_filter_enable(pcnt_port_t pcnt_port, pcnt_unit_t unit, bool enable)
|
||||
{
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
pcnt_hal_filter_enable(&(p_pcnt_obj[pcnt_port]->hal), unit);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static inline esp_err_t _pcnt_filter_disable(pcnt_port_t pcnt_port, pcnt_unit_t unit)
|
||||
{
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
pcnt_hal_filter_disable(&(p_pcnt_obj[pcnt_port]->hal), unit);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
pcnt_ll_enable_glitch_filter(p_pcnt_obj[pcnt_port]->hal.dev, unit, enable);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
@ -242,16 +265,16 @@ static inline esp_err_t _pcnt_isr_handler_add(pcnt_port_t pcnt_port, pcnt_unit_t
|
||||
{
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(pcnt_isr_func != NULL, "ISR service is not installed, call pcnt_install_isr_service() first", ESP_ERR_INVALID_STATE);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, "PCNT unit error", ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, "PCNT unit error", ESP_ERR_INVALID_ARG);
|
||||
PCNT_ENTER_CRITICAL(&pcnt_spinlock);
|
||||
_pcnt_intr_disable(PCNT_PORT_0, unit);
|
||||
_pcnt_intr_enable(PCNT_PORT_0, unit, false);
|
||||
|
||||
if (pcnt_isr_func) {
|
||||
pcnt_isr_func[unit].fn = isr_handler;
|
||||
pcnt_isr_func[unit].args = args;
|
||||
}
|
||||
|
||||
_pcnt_intr_enable(PCNT_PORT_0, unit);
|
||||
_pcnt_intr_enable(PCNT_PORT_0, unit, true);
|
||||
PCNT_EXIT_CRITICAL(&pcnt_spinlock);
|
||||
return ESP_OK;
|
||||
}
|
||||
@ -260,9 +283,9 @@ static inline esp_err_t _pcnt_isr_handler_remove(pcnt_port_t pcnt_port, pcnt_uni
|
||||
{
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(pcnt_isr_func != NULL, "ISR service is not installed", ESP_ERR_INVALID_STATE);
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, "PCNT unit error", ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, "PCNT unit error", ESP_ERR_INVALID_ARG);
|
||||
PCNT_ENTER_CRITICAL(&pcnt_spinlock);
|
||||
_pcnt_intr_disable(PCNT_PORT_0, unit);
|
||||
_pcnt_intr_enable(PCNT_PORT_0, unit, false);
|
||||
|
||||
if (pcnt_isr_func) {
|
||||
pcnt_isr_func[unit].fn = NULL;
|
||||
@ -278,8 +301,8 @@ static void IRAM_ATTR pcnt_intr_service(void *arg)
|
||||
{
|
||||
uint32_t status = 0;
|
||||
pcnt_port_t pcnt_port = (pcnt_port_t)arg;
|
||||
pcnt_hal_get_intr_status(&(p_pcnt_obj[pcnt_port]->hal), &status);
|
||||
pcnt_hal_clear_intr_status(&(p_pcnt_obj[pcnt_port]->hal), status);
|
||||
status = pcnt_ll_get_intr_status(p_pcnt_obj[pcnt_port]->hal.dev);
|
||||
pcnt_ll_clear_intr_status(p_pcnt_obj[pcnt_port]->hal.dev, status);
|
||||
|
||||
while (status) {
|
||||
int unit = __builtin_ffs(status) - 1;
|
||||
@ -296,7 +319,7 @@ static inline esp_err_t _pcnt_isr_service_install(pcnt_port_t pcnt_port, int int
|
||||
PCNT_OBJ_CHECK(pcnt_port);
|
||||
PCNT_CHECK(pcnt_isr_func == NULL, "ISR service already installed", ESP_ERR_INVALID_STATE);
|
||||
esp_err_t ret = ESP_FAIL;
|
||||
pcnt_isr_func = (pcnt_isr_func_t *) calloc(PCNT_UNIT_MAX, sizeof(pcnt_isr_func_t));
|
||||
pcnt_isr_func = (pcnt_isr_func_t *) calloc(SOC_PCNT_UNITS_PER_GROUP, sizeof(pcnt_isr_func_t));
|
||||
|
||||
if (pcnt_isr_func == NULL) {
|
||||
ret = ESP_ERR_NO_MEM;
|
||||
@ -333,7 +356,7 @@ static inline esp_err_t _pcnt_unit_config(pcnt_port_t pcnt_port, const pcnt_conf
|
||||
int input_io = pcnt_config->pulse_gpio_num;
|
||||
int ctrl_io = pcnt_config->ctrl_gpio_num;
|
||||
|
||||
PCNT_CHECK(unit < PCNT_UNIT_MAX, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(unit < SOC_PCNT_UNITS_PER_GROUP, PCNT_UNIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(channel < PCNT_CHANNEL_MAX, PCNT_CHANNEL_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(input_io < 0 || (GPIO_IS_VALID_GPIO(input_io) && (input_io != ctrl_io)), "PCNT pulse input io error", ESP_ERR_INVALID_ARG);
|
||||
PCNT_CHECK(ctrl_io < 0 || GPIO_IS_VALID_GPIO(ctrl_io), "PCNT ctrl io error", ESP_ERR_INVALID_ARG);
|
||||
@ -342,18 +365,18 @@ static inline esp_err_t _pcnt_unit_config(pcnt_port_t pcnt_port, const pcnt_conf
|
||||
/*Enalbe hardware module*/
|
||||
static bool pcnt_enable = false;
|
||||
if (pcnt_enable == false) {
|
||||
periph_module_reset(pcnt_periph_signals.module);
|
||||
periph_module_reset(pcnt_periph_signals.groups[pcnt_port].module);
|
||||
pcnt_enable = true;
|
||||
}
|
||||
periph_module_enable(pcnt_periph_signals.module);
|
||||
periph_module_enable(pcnt_periph_signals.groups[pcnt_port].module);
|
||||
/*Set counter range*/
|
||||
_pcnt_set_event_value(pcnt_port, unit, PCNT_EVT_H_LIM, pcnt_config->counter_h_lim);
|
||||
_pcnt_set_event_value(pcnt_port, unit, PCNT_EVT_L_LIM, pcnt_config->counter_l_lim);
|
||||
/*Default value after reboot is positive, we disable these events like others*/
|
||||
_pcnt_event_disable(pcnt_port, unit, PCNT_EVT_H_LIM);
|
||||
_pcnt_event_disable(pcnt_port, unit, PCNT_EVT_L_LIM);
|
||||
_pcnt_event_disable(pcnt_port, unit, PCNT_EVT_ZERO);
|
||||
_pcnt_filter_disable(pcnt_port, unit);
|
||||
_pcnt_event_enable(pcnt_port, unit, PCNT_EVT_H_LIM, false);
|
||||
_pcnt_event_enable(pcnt_port, unit, PCNT_EVT_L_LIM, false);
|
||||
_pcnt_event_enable(pcnt_port, unit, PCNT_EVT_ZERO, false);
|
||||
_pcnt_filter_enable(pcnt_port, unit, false);
|
||||
/*set pulse input and control mode*/
|
||||
_pcnt_set_mode(pcnt_port, unit, channel, pcnt_config->pos_mode, pcnt_config->neg_mode, pcnt_config->hctrl_mode, pcnt_config->lctrl_mode);
|
||||
/*Set pulse input and control pins*/
|
||||
@ -386,8 +409,6 @@ esp_err_t pcnt_init(pcnt_port_t pcnt_port)
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
// TODO: The following functions are wrappers, for compatibility with current API.
|
||||
|
||||
esp_err_t pcnt_unit_config(const pcnt_config_t *pcnt_config)
|
||||
{
|
||||
esp_err_t ret;
|
||||
@ -433,22 +454,22 @@ esp_err_t pcnt_counter_clear(pcnt_unit_t pcnt_unit)
|
||||
|
||||
esp_err_t pcnt_intr_enable(pcnt_unit_t pcnt_unit)
|
||||
{
|
||||
return _pcnt_intr_enable(PCNT_PORT_0, pcnt_unit);
|
||||
return _pcnt_intr_enable(PCNT_PORT_0, pcnt_unit, true);
|
||||
}
|
||||
|
||||
esp_err_t pcnt_intr_disable(pcnt_unit_t pcnt_unit)
|
||||
{
|
||||
return _pcnt_intr_disable(PCNT_PORT_0, pcnt_unit);
|
||||
return _pcnt_intr_enable(PCNT_PORT_0, pcnt_unit, false);
|
||||
}
|
||||
|
||||
esp_err_t pcnt_event_enable(pcnt_unit_t unit, pcnt_evt_type_t evt_type)
|
||||
{
|
||||
return _pcnt_event_enable(PCNT_PORT_0, unit, evt_type);
|
||||
return _pcnt_event_enable(PCNT_PORT_0, unit, evt_type, true);
|
||||
}
|
||||
|
||||
esp_err_t pcnt_event_disable(pcnt_unit_t unit, pcnt_evt_type_t evt_type)
|
||||
{
|
||||
return _pcnt_event_disable(PCNT_PORT_0, unit, evt_type);
|
||||
return _pcnt_event_enable(PCNT_PORT_0, unit, evt_type, false);
|
||||
}
|
||||
|
||||
esp_err_t pcnt_set_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t value)
|
||||
@ -478,12 +499,12 @@ esp_err_t pcnt_get_filter_value(pcnt_unit_t unit, uint16_t *filter_val)
|
||||
|
||||
esp_err_t pcnt_filter_enable(pcnt_unit_t unit)
|
||||
{
|
||||
return _pcnt_filter_enable(PCNT_PORT_0, unit);
|
||||
return _pcnt_filter_enable(PCNT_PORT_0, unit, true);
|
||||
}
|
||||
|
||||
esp_err_t pcnt_filter_disable(pcnt_unit_t unit)
|
||||
{
|
||||
return _pcnt_filter_disable(PCNT_PORT_0, unit);
|
||||
return _pcnt_filter_enable(PCNT_PORT_0, unit, false);
|
||||
}
|
||||
|
||||
esp_err_t pcnt_isr_unregister(pcnt_isr_handle_t handle)
|
||||
@ -500,7 +521,7 @@ esp_err_t pcnt_isr_register(void (*fun)(void *), void *arg, int intr_alloc_flags
|
||||
esp_err_t ret = ESP_FAIL;
|
||||
PCNT_CHECK(fun != NULL, PCNT_ADDRESS_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
PCNT_ENTER_CRITICAL(&pcnt_spinlock);
|
||||
ret = esp_intr_alloc(pcnt_periph_signals.irq, intr_alloc_flags, fun, arg, handle);
|
||||
ret = esp_intr_alloc(pcnt_periph_signals.groups[0].irq, intr_alloc_flags, fun, arg, handle);
|
||||
PCNT_EXIT_CRITICAL(&pcnt_spinlock);
|
||||
return ret;
|
||||
}
|
||||
@ -515,7 +536,6 @@ esp_err_t pcnt_isr_handler_remove(pcnt_unit_t unit)
|
||||
return _pcnt_isr_handler_remove(PCNT_PORT_0, unit);
|
||||
}
|
||||
|
||||
|
||||
esp_err_t pcnt_isr_service_install(int intr_alloc_flags)
|
||||
{
|
||||
return _pcnt_isr_service_install(PCNT_PORT_0, intr_alloc_flags);
|
||||
|
||||
@ -28,6 +28,7 @@
|
||||
#include "esp_attr.h"
|
||||
#include "esp_log.h"
|
||||
#include "soc/gpio_periph.h"
|
||||
#include "soc/pcnt_struct.h"
|
||||
#include "unity.h"
|
||||
#include "esp_rom_gpio.h"
|
||||
|
||||
@ -59,7 +60,7 @@ static void pcnt_test_io_config(int ctrl_level)
|
||||
gpio_set_direction(PULSE_IO, GPIO_MODE_INPUT_OUTPUT);
|
||||
esp_rom_gpio_connect_out_signal(PULSE_IO, LEDC_LS_SIG_OUT1_IDX, 0, 0); // LEDC_TIMER_1, LEDC_LOW_SPEED_MODE
|
||||
esp_rom_gpio_connect_in_signal(PULSE_IO, PCNT_SIG_CH0_IN0_IDX, 0); // PCNT_UNIT_0, PCNT_CHANNEL_0
|
||||
esp_rom_gpio_connect_in_signal(ctrl_level ? GPIO_MATRIX_CONST_ONE_INPUT: GPIO_MATRIX_CONST_ZERO_INPUT, PCNT_CTRL_CH0_IN0_IDX, 0); // PCNT_UNIT_0, PCNT_CHANNEL_0
|
||||
esp_rom_gpio_connect_in_signal(ctrl_level ? GPIO_MATRIX_CONST_ONE_INPUT : GPIO_MATRIX_CONST_ZERO_INPUT, PCNT_CTRL_CH0_IN0_IDX, 0); // PCNT_UNIT_0, PCNT_CHANNEL_0
|
||||
}
|
||||
|
||||
/* use LEDC to produce pulse for PCNT
|
||||
@ -96,7 +97,7 @@ static void IRAM_ATTR pcnt_intr_handler(void *arg)
|
||||
uint32_t status;
|
||||
BaseType_t port_status = pdFALSE;
|
||||
|
||||
for (i = 0; i < PCNT_UNIT_MAX; i++) {
|
||||
for (i = 0; i < SOC_PCNT_UNITS_PER_GROUP; i++) {
|
||||
if (intr_status & (BIT(i))) {
|
||||
status = PCNT.status_unit[i].val;
|
||||
PCNT.int_clr.val = BIT(i);
|
||||
@ -108,7 +109,7 @@ static void IRAM_ATTR pcnt_intr_handler(void *arg)
|
||||
}
|
||||
}
|
||||
|
||||
static void event_calculate(event_times* event)
|
||||
static void event_calculate(event_times *event)
|
||||
{
|
||||
int16_t test_counter = 0;
|
||||
int times = 0;
|
||||
@ -147,7 +148,7 @@ static void event_calculate(event_times* event)
|
||||
times++;
|
||||
}
|
||||
printf("%d, %d, %d, %d, %d, %d\n", event->h_threshold, event->l_threshold,
|
||||
event->l_limit, event->h_limit, event->zero_times, event->filter_time);
|
||||
event->l_limit, event->h_limit, event->zero_times, event->filter_time);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -333,11 +334,11 @@ TEST_CASE("PCNT test config", "[pcnt]")
|
||||
pcnt_config_t temp_pcnt_config = pcnt_config;
|
||||
TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
|
||||
|
||||
// test PCNT_UNIT_MAX units, from 0-(PCNT_UNIT_MAX-1)
|
||||
// test SOC_PCNT_UNITS_PER_GROUP units, from 0-(SOC_PCNT_UNITS_PER_GROUP-1)
|
||||
pcnt_config = temp_pcnt_config;
|
||||
pcnt_config.unit = PCNT_UNIT_MAX;
|
||||
pcnt_config.unit = SOC_PCNT_UNITS_PER_GROUP;
|
||||
TEST_ASSERT_NOT_NULL((void *)pcnt_unit_config(&pcnt_config));
|
||||
for (int i = 0; i < PCNT_UNIT_MAX; i++) {
|
||||
for (int i = 0; i < SOC_PCNT_UNITS_PER_GROUP; i++) {
|
||||
pcnt_config.unit = i;
|
||||
TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
|
||||
}
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
|
||||
// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
@ -22,75 +22,67 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/pcnt_periph.h"
|
||||
#include <stdlib.h>
|
||||
#include <stdbool.h>
|
||||
#include "soc/pcnt_struct.h"
|
||||
#include "hal/pcnt_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Get PCNT hardware instance with giving pcnt num
|
||||
#define PCNT_LL_GET_HW(num) (((num) == 0) ? (&PCNT) : NULL)
|
||||
#define PCNT_LL_MAX_GLITCH_WIDTH 1023
|
||||
|
||||
typedef enum {
|
||||
PCNT_LL_EVENT_THRES1,
|
||||
PCNT_LL_EVENT_THRES0,
|
||||
PCNT_LL_EVENT_LOW_LIMIT,
|
||||
PCNT_LL_EVENT_HIGH_LIMIT,
|
||||
PCNT_LL_EVENT_ZERO_CROSS,
|
||||
PCNT_LL_EVENT_MAX
|
||||
} pcnt_ll_event_id_t;
|
||||
|
||||
#define PCNT_LL_EVENT_MASK ((1 << PCNT_LL_EVENT_MAX) - 1)
|
||||
|
||||
/**
|
||||
* @brief Set PCNT channel edge mode
|
||||
* @brief Set PCNT channel edge action
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param pos_mode Counter mode when detecting positive edge
|
||||
* @param neg_mode Counter mode when detecting negative edge
|
||||
* @param pos_act Counter action when detecting positive edge
|
||||
* @param neg_act Counter action when detecting negative edge
|
||||
*/
|
||||
static inline void pcnt_ll_set_edge_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_count_mode_t pos_mode, pcnt_count_mode_t neg_mode)
|
||||
static inline void pcnt_ll_set_edge_action(pcnt_dev_t *hw, uint32_t unit, uint32_t channel, pcnt_channel_edge_action_t pos_act, pcnt_channel_edge_action_t neg_act)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf0) conf0_reg = hw->conf_unit[unit].conf0;
|
||||
if (channel == 0) {
|
||||
conf0_reg.ch0_pos_mode = pos_mode;
|
||||
conf0_reg.ch0_neg_mode = neg_mode;
|
||||
hw->conf_unit[unit].conf0.ch0_pos_mode = pos_act;
|
||||
hw->conf_unit[unit].conf0.ch0_neg_mode = neg_act;
|
||||
} else {
|
||||
conf0_reg.ch1_pos_mode = pos_mode;
|
||||
conf0_reg.ch1_neg_mode = neg_mode;
|
||||
hw->conf_unit[unit].conf0.ch1_pos_mode = pos_act;
|
||||
hw->conf_unit[unit].conf0.ch1_neg_mode = neg_act;
|
||||
}
|
||||
hw->conf_unit[unit].conf0 = conf0_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT channel level mode
|
||||
* @brief Set PCNT channel level action
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param hctrl_mode Counter mode when control signal is high level
|
||||
* @param lctrl_mode Counter mode when control signal is low level
|
||||
* @param high_act Counter action when control signal is high level
|
||||
* @param low_act Counter action when control signal is low level
|
||||
*/
|
||||
static inline void pcnt_ll_set_level_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_ctrl_mode_t hctrl_mode, pcnt_ctrl_mode_t lctrl_mode)
|
||||
static inline void pcnt_ll_set_level_action(pcnt_dev_t *hw, uint32_t unit, uint32_t channel, pcnt_channel_level_action_t high_act, pcnt_channel_level_action_t low_act)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf0) conf0_reg = hw->conf_unit[unit].conf0;
|
||||
if (channel == 0) {
|
||||
conf0_reg.ch0_hctrl_mode = hctrl_mode;
|
||||
conf0_reg.ch0_lctrl_mode = lctrl_mode;
|
||||
hw->conf_unit[unit].conf0.ch0_hctrl_mode = high_act;
|
||||
hw->conf_unit[unit].conf0.ch0_lctrl_mode = low_act;
|
||||
} else {
|
||||
conf0_reg.ch1_hctrl_mode = hctrl_mode;
|
||||
conf0_reg.ch1_lctrl_mode = lctrl_mode;
|
||||
hw->conf_unit[unit].conf0.ch1_hctrl_mode = high_act;
|
||||
hw->conf_unit[unit].conf0.ch1_lctrl_mode = low_act;
|
||||
}
|
||||
hw->conf_unit[unit].conf0 = conf0_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT counter mode
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param pos_mode Counter mode when detecting positive edge
|
||||
* @param neg_mode Counter mode when detecting negative edge
|
||||
* @param hctrl_mode Counter mode when control signal is high level
|
||||
* @param lctrl_mode Counter mode when control signal is low level
|
||||
*/
|
||||
static inline void pcnt_ll_set_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_count_mode_t pos_mode, pcnt_count_mode_t neg_mode, pcnt_ctrl_mode_t hctrl_mode, pcnt_ctrl_mode_t lctrl_mode)
|
||||
{
|
||||
pcnt_ll_set_edge_mode(hw, unit, channel, pos_mode, neg_mode);
|
||||
pcnt_ll_set_level_mode(hw, unit, channel, hctrl_mode, lctrl_mode);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -98,11 +90,13 @@ static inline void pcnt_ll_set_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_chann
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit Pulse Counter unit number
|
||||
* @param count Pointer to accept counter value
|
||||
* @return PCNT count value (a signed integer)
|
||||
*/
|
||||
static inline void pcnt_ll_get_counter_value(pcnt_dev_t *hw, pcnt_unit_t unit, int16_t *count)
|
||||
static inline int pcnt_ll_get_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
*count = (int16_t) hw->cnt_unit[unit].cnt_val;
|
||||
typeof(hw->cnt_unit[unit]) cnt_reg = hw->cnt_unit[unit];
|
||||
int16_t value = cnt_reg.cnt_val;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -111,69 +105,60 @@ static inline void pcnt_ll_get_counter_value(pcnt_dev_t *hw, pcnt_unit_t unit, i
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_counter_pause(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_stop_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->ctrl.val |= BIT(PCNT_CNT_PAUSE_U0_S + (unit * 2));
|
||||
hw->ctrl.val |= 1 << (2 * unit + 1);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resume counting for PCNT counter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number, select from pcnt_unit_t
|
||||
* @param unit PCNT unit number, select from uint32_t
|
||||
*/
|
||||
static inline void pcnt_ll_counter_resume(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_start_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->ctrl.val &= (~(BIT(PCNT_CNT_PAUSE_U0_S + (unit * 2))));
|
||||
hw->ctrl.val &= ~(1 << (2 * unit + 1));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear and reset PCNT counter value to zero
|
||||
* @brief Clear PCNT counter value to zero
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number, select from pcnt_unit_t
|
||||
* @param unit PCNT unit number, select from uint32_t
|
||||
*/
|
||||
static inline void pcnt_ll_counter_clear(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_clear_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
uint32_t reset_bit = BIT(PCNT_PLUS_CNT_RST_U0_S + (unit * 2));
|
||||
hw->ctrl.val |= reset_bit;
|
||||
hw->ctrl.val &= ~reset_bit;
|
||||
hw->ctrl.val |= 1 << (2 * unit);
|
||||
hw->ctrl.val &= ~(1 << (2 * unit));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT interrupt for PCNT unit
|
||||
* @note
|
||||
* Each Pulse counter unit has five watch point events that share the same interrupt.
|
||||
* Configure events with pcnt_event_enable() and pcnt_event_disable()
|
||||
* @note Each PCNT unit has five watch point events that share the same interrupt bit.
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param unit_mask PCNT units mask
|
||||
* @param enable True to enable interrupt, False to disable interrupt
|
||||
*/
|
||||
static inline void pcnt_ll_intr_enable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_enable_intr(pcnt_dev_t *hw, uint32_t unit_mask, bool enable)
|
||||
{
|
||||
hw->int_ena.val |= BIT(PCNT_CNT_THR_EVENT_U0_INT_ENA_S + unit);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT interrupt for PCNT unit
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_intr_disable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
{
|
||||
hw->int_ena.val &= (~(BIT(PCNT_CNT_THR_EVENT_U0_INT_ENA_S + unit)));
|
||||
if (enable) {
|
||||
hw->int_ena.val |= unit_mask;
|
||||
} else {
|
||||
hw->int_ena.val &= ~unit_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT interrupt status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param status Pointer to accept value
|
||||
* @return Interrupt status word
|
||||
*/
|
||||
static inline void pcnt_ll_get_intr_status(pcnt_dev_t *hw, uint32_t *status)
|
||||
__attribute__((always_inline)) static inline uint32_t pcnt_ll_get_intr_status(pcnt_dev_t *hw)
|
||||
{
|
||||
*status = hw->int_st.val;
|
||||
return hw->int_st.val;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -182,163 +167,241 @@ static inline void pcnt_ll_get_intr_status(pcnt_dev_t *hw, uint32_t *status)
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param status value to clear interrupt status
|
||||
*/
|
||||
static inline void pcnt_ll_clear_intr_status(pcnt_dev_t *hw, uint32_t status)
|
||||
__attribute__((always_inline)) static inline void pcnt_ll_clear_intr_status(pcnt_dev_t *hw, uint32_t status)
|
||||
{
|
||||
hw->int_clr.val = status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT event of PCNT unit
|
||||
* @brief Enable PCNT high limit event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_event_enable(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type)
|
||||
static inline void pcnt_ll_enable_high_limit_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_ZERO) {
|
||||
hw->conf_unit[unit].conf0.thr_zero_en = 1;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT event of PCNT unit
|
||||
* @brief Enable PCNT low limit event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_event_disable(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type)
|
||||
static inline void pcnt_ll_enable_low_limit_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_ZERO) {
|
||||
hw->conf_unit[unit].conf0.thr_zero_en = 0;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT event value of PCNT unit
|
||||
* @brief Enable PCNT zero cross event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
*
|
||||
* @param value Counter value for PCNT event
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_set_event_value(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t value)
|
||||
static inline void pcnt_ll_enable_zero_cross_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf2.cnt_l_lim = value;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf2.cnt_h_lim = value;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf1.cnt_thres0 = value;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf1.cnt_thres1 = value;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_zero_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT event value of PCNT unit
|
||||
* @brief Enable PCNT threshold event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param value Pointer to accept counter value for PCNT event
|
||||
* @param thres Threshold ID
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_get_event_value(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t *value)
|
||||
static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf2.cnt_l_lim;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf2.cnt_h_lim;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf1.cnt_thres0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf1.cnt_thres1;
|
||||
if (thres == 0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en = enable;
|
||||
} else {
|
||||
*value = 0;
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en = enable;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable all PCNT threshold events
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit unit number
|
||||
*/
|
||||
static inline void pcnt_ll_disable_all_events(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.val &= ~(PCNT_LL_EVENT_MASK << 11);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT high limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param value PCNT high limit value
|
||||
*/
|
||||
static inline void pcnt_ll_set_high_limit_value(pcnt_dev_t *hw, uint32_t unit, int value)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf2) conf2_reg = hw->conf_unit[unit].conf2;
|
||||
conf2_reg.cnt_h_lim = value;
|
||||
hw->conf_unit[unit].conf2 = conf2_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT low limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param value PCNT low limit value
|
||||
*/
|
||||
static inline void pcnt_ll_set_low_limit_value(pcnt_dev_t *hw, uint32_t unit, int value)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf2) conf2_reg = hw->conf_unit[unit].conf2;
|
||||
conf2_reg.cnt_l_lim = value;
|
||||
hw->conf_unit[unit].conf2 = conf2_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT threshold value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param thres Threshold ID
|
||||
* @param value PCNT threshold value
|
||||
*/
|
||||
static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf1) conf1_reg = hw->conf_unit[unit].conf1;
|
||||
if (thres == 0) {
|
||||
conf1_reg.cnt_thres0 = value;
|
||||
} else {
|
||||
conf1_reg.cnt_thres1 = value;
|
||||
}
|
||||
hw->conf_unit[unit].conf1 = conf1_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT high limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT high limit value
|
||||
*/
|
||||
static inline int pcnt_ll_get_high_limit_value(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf2) conf2_reg = hw->conf_unit[unit].conf2;
|
||||
int16_t value = conf2_reg.cnt_h_lim;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT low limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT high limit value
|
||||
*/
|
||||
static inline int pcnt_ll_get_low_limit_value(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf2) conf2_reg = hw->conf_unit[unit].conf2;
|
||||
int16_t value = conf2_reg.cnt_l_lim;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT threshold value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param thres Threshold ID
|
||||
* @return PCNT threshold value
|
||||
*/
|
||||
static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres)
|
||||
{
|
||||
int16_t value;
|
||||
typeof(hw->conf_unit[unit].conf1) conf1_reg = hw->conf_unit[unit].conf1;
|
||||
if (thres == 0) {
|
||||
value = conf1_reg.cnt_thres0;
|
||||
} else {
|
||||
value = conf1_reg.cnt_thres1;
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT unit runtime status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT unit runtime status
|
||||
*/
|
||||
static inline uint32_t pcnt_ll_get_unit_status(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT count sign
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return Count sign
|
||||
*/
|
||||
static inline pcnt_unit_count_sign_t pcnt_ll_get_count_sign(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val & 0x03;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT event status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return event status word
|
||||
* @return Event status word
|
||||
*/
|
||||
static inline uint32_t pcnt_ll_get_event_status(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline uint32_t pcnt_ll_get_event_status(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val;
|
||||
return hw->status_unit[unit].val >> 2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT filter value
|
||||
* @brief Set PCNT glitch filter threshold
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param filter_val PCNT signal filter value, counter in APB_CLK cycles.
|
||||
* Any pulses lasting shorter than this will be ignored when the filter is enabled.
|
||||
* @note
|
||||
* filter_val is a 10-bit value, so the maximum filter_val should be limited to 1023.
|
||||
*/
|
||||
static inline void pcnt_ll_set_filter_value(pcnt_dev_t *hw, pcnt_unit_t unit, uint16_t filter_val)
|
||||
static inline void pcnt_ll_set_glitch_filter_thres(pcnt_dev_t *hw, uint32_t unit, uint32_t filter_val)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_thres = filter_val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT filter value
|
||||
* @brief Get PCNT glitch filter threshold
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param filter_val Pointer to accept PCNT filter value.
|
||||
* @return glitch filter threshold
|
||||
*/
|
||||
static inline void pcnt_ll_get_filter_value(pcnt_dev_t *hw, pcnt_unit_t unit, uint16_t *filter_val)
|
||||
static inline uint32_t pcnt_ll_get_glitch_filter_thres(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
*filter_val = hw->conf_unit[unit].conf0.filter_thres;
|
||||
return hw->conf_unit[unit].conf0.filter_thres;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT input filter
|
||||
* @brief Enable PCNT glitch filter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param enable True to enable the filter, False to disable the filter
|
||||
*/
|
||||
static inline void pcnt_ll_filter_enable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_enable_glitch_filter(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_en = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT input filter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_filter_disable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_en = 0;
|
||||
hw->conf_unit[unit].conf0.filter_en = enable;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
|
||||
// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
@ -22,75 +22,67 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/pcnt_periph.h"
|
||||
#include <stdlib.h>
|
||||
#include <stdbool.h>
|
||||
#include "soc/pcnt_struct.h"
|
||||
#include "hal/pcnt_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Get PCNT hardware instance with giving pcnt num
|
||||
#define PCNT_LL_GET_HW(num) (((num) == 0) ? (&PCNT) : NULL)
|
||||
#define PCNT_LL_MAX_GLITCH_WIDTH 1023
|
||||
|
||||
typedef enum {
|
||||
PCNT_LL_EVENT_THRES1,
|
||||
PCNT_LL_EVENT_THRES0,
|
||||
PCNT_LL_EVENT_LOW_LIMIT,
|
||||
PCNT_LL_EVENT_HIGH_LIMIT,
|
||||
PCNT_LL_EVENT_ZERO_CROSS,
|
||||
PCNT_LL_EVENT_MAX
|
||||
} pcnt_ll_event_id_t;
|
||||
|
||||
#define PCNT_LL_EVENT_MASK ((1 << PCNT_LL_EVENT_MAX) - 1)
|
||||
|
||||
/**
|
||||
* @brief Set PCNT channel edge mode
|
||||
* @brief Set PCNT channel edge action
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param pos_mode Counter mode when detecting positive edge
|
||||
* @param neg_mode Counter mode when detecting negative edge
|
||||
* @param pos_act Counter action when detecting positive edge
|
||||
* @param neg_act Counter action when detecting negative edge
|
||||
*/
|
||||
static inline void pcnt_ll_set_edge_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_count_mode_t pos_mode, pcnt_count_mode_t neg_mode)
|
||||
static inline void pcnt_ll_set_edge_action(pcnt_dev_t *hw, uint32_t unit, uint32_t channel, pcnt_channel_edge_action_t pos_act, pcnt_channel_edge_action_t neg_act)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf0) conf0_reg = hw->conf_unit[unit].conf0;
|
||||
if (channel == 0) {
|
||||
conf0_reg.ch0_pos_mode = pos_mode;
|
||||
conf0_reg.ch0_neg_mode = neg_mode;
|
||||
hw->conf_unit[unit].conf0.ch0_pos_mode_un = pos_act;
|
||||
hw->conf_unit[unit].conf0.ch0_neg_mode_un = neg_act;
|
||||
} else {
|
||||
conf0_reg.ch1_pos_mode = pos_mode;
|
||||
conf0_reg.ch1_neg_mode = neg_mode;
|
||||
hw->conf_unit[unit].conf0.ch1_pos_mode_un = pos_act;
|
||||
hw->conf_unit[unit].conf0.ch1_neg_mode_un = neg_act;
|
||||
}
|
||||
hw->conf_unit[unit].conf0 = conf0_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT channel level mode
|
||||
* @brief Set PCNT channel level action
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param hctrl_mode Counter mode when control signal is high level
|
||||
* @param lctrl_mode Counter mode when control signal is low level
|
||||
* @param high_act Counter action when control signal is high level
|
||||
* @param low_act Counter action when control signal is low level
|
||||
*/
|
||||
static inline void pcnt_ll_set_level_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_ctrl_mode_t hctrl_mode, pcnt_ctrl_mode_t lctrl_mode)
|
||||
static inline void pcnt_ll_set_level_action(pcnt_dev_t *hw, uint32_t unit, uint32_t channel, pcnt_channel_level_action_t high_act, pcnt_channel_level_action_t low_act)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf0) conf0_reg = hw->conf_unit[unit].conf0;
|
||||
if (channel == 0) {
|
||||
conf0_reg.ch0_hctrl_mode = hctrl_mode;
|
||||
conf0_reg.ch0_lctrl_mode = lctrl_mode;
|
||||
hw->conf_unit[unit].conf0.ch0_hctrl_mode_un = high_act;
|
||||
hw->conf_unit[unit].conf0.ch0_lctrl_mode_un = low_act;
|
||||
} else {
|
||||
conf0_reg.ch1_hctrl_mode = hctrl_mode;
|
||||
conf0_reg.ch1_lctrl_mode = lctrl_mode;
|
||||
hw->conf_unit[unit].conf0.ch1_hctrl_mode_un = high_act;
|
||||
hw->conf_unit[unit].conf0.ch1_lctrl_mode_un = low_act;
|
||||
}
|
||||
hw->conf_unit[unit].conf0 = conf0_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT counter mode
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param pos_mode Counter mode when detecting positive edge
|
||||
* @param neg_mode Counter mode when detecting negative edge
|
||||
* @param hctrl_mode Counter mode when control signal is high level
|
||||
* @param lctrl_mode Counter mode when control signal is low level
|
||||
*/
|
||||
static inline void pcnt_ll_set_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_count_mode_t pos_mode, pcnt_count_mode_t neg_mode, pcnt_ctrl_mode_t hctrl_mode, pcnt_ctrl_mode_t lctrl_mode)
|
||||
{
|
||||
pcnt_ll_set_edge_mode(hw, unit, channel, pos_mode, neg_mode);
|
||||
pcnt_ll_set_level_mode(hw, unit, channel, hctrl_mode, lctrl_mode);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -98,11 +90,13 @@ static inline void pcnt_ll_set_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_chann
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit Pulse Counter unit number
|
||||
* @param count Pointer to accept counter value
|
||||
* @return PCNT count value (a signed integer)
|
||||
*/
|
||||
static inline void pcnt_ll_get_counter_value(pcnt_dev_t *hw, pcnt_unit_t unit, int16_t *count)
|
||||
static inline int pcnt_ll_get_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
*count = (int16_t) hw->cnt_unit[unit].cnt_val;
|
||||
pcnt_un_cnt_reg_t cnt_reg = hw->cnt_unit[unit];
|
||||
int16_t value = cnt_reg.pulse_cnt_un;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -111,69 +105,60 @@ static inline void pcnt_ll_get_counter_value(pcnt_dev_t *hw, pcnt_unit_t unit, i
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_counter_pause(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_stop_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->ctrl.val |= BIT(PCNT_CNT_PAUSE_U0_S + (unit * 2));
|
||||
hw->ctrl.val |= 1 << (2 * unit + 1);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resume counting for PCNT counter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number, select from pcnt_unit_t
|
||||
* @param unit PCNT unit number, select from uint32_t
|
||||
*/
|
||||
static inline void pcnt_ll_counter_resume(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_start_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->ctrl.val &= (~(BIT(PCNT_CNT_PAUSE_U0_S + (unit * 2))));
|
||||
hw->ctrl.val &= ~(1 << (2 * unit + 1));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear and reset PCNT counter value to zero
|
||||
* @brief Clear PCNT counter value to zero
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number, select from pcnt_unit_t
|
||||
* @param unit PCNT unit number, select from uint32_t
|
||||
*/
|
||||
static inline void pcnt_ll_counter_clear(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_clear_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
uint32_t reset_bit = BIT(PCNT_PULSE_CNT_RST_U0_S + (unit * 2));
|
||||
hw->ctrl.val |= reset_bit;
|
||||
hw->ctrl.val &= ~reset_bit;
|
||||
hw->ctrl.val |= 1 << (2 * unit);
|
||||
hw->ctrl.val &= ~(1 << (2 * unit));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT interrupt for PCNT unit
|
||||
* @note
|
||||
* Each Pulse counter unit has five watch point events that share the same interrupt.
|
||||
* Configure events with pcnt_event_enable() and pcnt_event_disable()
|
||||
* @note Each PCNT unit has five watch point events that share the same interrupt bit.
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param unit_mask PCNT units mask
|
||||
* @param enable True to enable interrupt, False to disable interrupt
|
||||
*/
|
||||
static inline void pcnt_ll_intr_enable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_enable_intr(pcnt_dev_t *hw, uint32_t unit_mask, bool enable)
|
||||
{
|
||||
hw->int_ena.val |= BIT(PCNT_CNT_THR_EVENT_U0_INT_ENA_S + unit);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT interrupt for PCNT unit
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_intr_disable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
{
|
||||
hw->int_ena.val &= (~(BIT(PCNT_CNT_THR_EVENT_U0_INT_ENA_S + unit)));
|
||||
if (enable) {
|
||||
hw->int_ena.val |= unit_mask;
|
||||
} else {
|
||||
hw->int_ena.val &= ~unit_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT interrupt status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param status Pointer to accept value
|
||||
* @return Interrupt status word
|
||||
*/
|
||||
static inline void pcnt_ll_get_intr_status(pcnt_dev_t *hw, uint32_t *status)
|
||||
__attribute__((always_inline)) static inline uint32_t pcnt_ll_get_intr_status(pcnt_dev_t *hw)
|
||||
{
|
||||
*status = hw->int_st.val;
|
||||
return hw->int_st.val;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -182,163 +167,241 @@ static inline void pcnt_ll_get_intr_status(pcnt_dev_t *hw, uint32_t *status)
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param status value to clear interrupt status
|
||||
*/
|
||||
static inline void pcnt_ll_clear_intr_status(pcnt_dev_t *hw, uint32_t status)
|
||||
__attribute__((always_inline)) static inline void pcnt_ll_clear_intr_status(pcnt_dev_t *hw, uint32_t status)
|
||||
{
|
||||
hw->int_clr.val = status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT event of PCNT unit
|
||||
* @brief Enable PCNT high limit event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_event_enable(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type)
|
||||
static inline void pcnt_ll_enable_high_limit_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_ZERO) {
|
||||
hw->conf_unit[unit].conf0.thr_zero_en = 1;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en_un = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT event of PCNT unit
|
||||
* @brief Enable PCNT low limit event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_event_disable(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type)
|
||||
static inline void pcnt_ll_enable_low_limit_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_ZERO) {
|
||||
hw->conf_unit[unit].conf0.thr_zero_en = 0;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en_un = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT event value of PCNT unit
|
||||
* @brief Enable PCNT zero cross event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
*
|
||||
* @param value Counter value for PCNT event
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_set_event_value(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t value)
|
||||
static inline void pcnt_ll_enable_zero_cross_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf2.cnt_l_lim = value;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf2.cnt_h_lim = value;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf1.cnt_thres0 = value;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf1.cnt_thres1 = value;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_zero_en_un = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT event value of PCNT unit
|
||||
* @brief Enable PCNT threshold event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param value Pointer to accept counter value for PCNT event
|
||||
* @param thres Threshold ID
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_get_event_value(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t *value)
|
||||
static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf2.cnt_l_lim;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf2.cnt_h_lim;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf1.cnt_thres0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf1.cnt_thres1;
|
||||
if (thres == 0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en_un = enable;
|
||||
} else {
|
||||
*value = 0;
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en_un = enable;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable all PCNT threshold events
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit unit number
|
||||
*/
|
||||
static inline void pcnt_ll_disable_all_events(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.val &= ~(PCNT_LL_EVENT_MASK << 11);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT high limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param value PCNT high limit value
|
||||
*/
|
||||
static inline void pcnt_ll_set_high_limit_value(pcnt_dev_t *hw, uint32_t unit, int value)
|
||||
{
|
||||
pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
|
||||
conf2_reg.cnt_h_lim_un = value;
|
||||
hw->conf_unit[unit].conf2 = conf2_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT low limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param value PCNT low limit value
|
||||
*/
|
||||
static inline void pcnt_ll_set_low_limit_value(pcnt_dev_t *hw, uint32_t unit, int value)
|
||||
{
|
||||
pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
|
||||
conf2_reg.cnt_l_lim_un = value;
|
||||
hw->conf_unit[unit].conf2 = conf2_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT threshold value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param thres Threshold ID
|
||||
* @param value PCNT threshold value
|
||||
*/
|
||||
static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value)
|
||||
{
|
||||
pcnt_un_conf1_reg_t conf1_reg = hw->conf_unit[unit].conf1;
|
||||
if (thres == 0) {
|
||||
conf1_reg.cnt_thres0_un = value;
|
||||
} else {
|
||||
conf1_reg.cnt_thres1_un = value;
|
||||
}
|
||||
hw->conf_unit[unit].conf1 = conf1_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT high limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT high limit value
|
||||
*/
|
||||
static inline int pcnt_ll_get_high_limit_value(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
|
||||
int16_t value = conf2_reg.cnt_h_lim_un;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT low limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT high limit value
|
||||
*/
|
||||
static inline int pcnt_ll_get_low_limit_value(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
|
||||
int16_t value = conf2_reg.cnt_l_lim_un;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT threshold value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param thres Threshold ID
|
||||
* @return PCNT threshold value
|
||||
*/
|
||||
static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres)
|
||||
{
|
||||
int16_t value;
|
||||
pcnt_un_conf1_reg_t conf1_reg = hw->conf_unit[unit].conf1;
|
||||
if (thres == 0) {
|
||||
value = conf1_reg.cnt_thres0_un;
|
||||
} else {
|
||||
value = conf1_reg.cnt_thres1_un;
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT unit runtime status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT unit runtime status
|
||||
*/
|
||||
static inline uint32_t pcnt_ll_get_unit_status(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT count sign
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return Count sign
|
||||
*/
|
||||
static inline pcnt_unit_count_sign_t pcnt_ll_get_count_sign(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val & 0x03;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT event status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return event status word
|
||||
* @return Event status word
|
||||
*/
|
||||
static inline uint32_t pcnt_ll_get_event_status(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline uint32_t pcnt_ll_get_event_status(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val;
|
||||
return hw->status_unit[unit].val >> 2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT filter value
|
||||
* @brief Set PCNT glitch filter threshold
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param filter_val PCNT signal filter value, counter in APB_CLK cycles.
|
||||
* Any pulses lasting shorter than this will be ignored when the filter is enabled.
|
||||
* @note
|
||||
* filter_val is a 10-bit value, so the maximum filter_val should be limited to 1023.
|
||||
*/
|
||||
static inline void pcnt_ll_set_filter_value(pcnt_dev_t *hw, pcnt_unit_t unit, uint16_t filter_val)
|
||||
static inline void pcnt_ll_set_glitch_filter_thres(pcnt_dev_t *hw, uint32_t unit, uint32_t filter_val)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_thres = filter_val;
|
||||
hw->conf_unit[unit].conf0.filter_thres_un = filter_val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT filter value
|
||||
* @brief Get PCNT glitch filter threshold
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param filter_val Pointer to accept PCNT filter value.
|
||||
* @return glitch filter threshold
|
||||
*/
|
||||
static inline void pcnt_ll_get_filter_value(pcnt_dev_t *hw, pcnt_unit_t unit, uint16_t *filter_val)
|
||||
static inline uint32_t pcnt_ll_get_glitch_filter_thres(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
*filter_val = hw->conf_unit[unit].conf0.filter_thres;
|
||||
return hw->conf_unit[unit].conf0.filter_thres_un;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT input filter
|
||||
* @brief Enable PCNT glitch filter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param enable True to enable the filter, False to disable the filter
|
||||
*/
|
||||
static inline void pcnt_ll_filter_enable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_enable_glitch_filter(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_en = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT input filter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_filter_disable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_en = 0;
|
||||
hw->conf_unit[unit].conf0.filter_en_un = enable;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
@ -22,75 +22,67 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/pcnt_periph.h"
|
||||
#include <stdlib.h>
|
||||
#include <stdbool.h>
|
||||
#include "soc/pcnt_struct.h"
|
||||
#include "hal/pcnt_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Get PCNT hardware instance with giving pcnt num
|
||||
#define PCNT_LL_GET_HW(num) (((num) == 0) ? (&PCNT) : NULL)
|
||||
#define PCNT_LL_MAX_GLITCH_WIDTH 1023
|
||||
|
||||
typedef enum {
|
||||
PCNT_LL_EVENT_THRES1,
|
||||
PCNT_LL_EVENT_THRES0,
|
||||
PCNT_LL_EVENT_LOW_LIMIT,
|
||||
PCNT_LL_EVENT_HIGH_LIMIT,
|
||||
PCNT_LL_EVENT_ZERO_CROSS,
|
||||
PCNT_LL_EVENT_MAX
|
||||
} pcnt_ll_event_id_t;
|
||||
|
||||
#define PCNT_LL_EVENT_MASK ((1 << PCNT_LL_EVENT_MAX) - 1)
|
||||
|
||||
/**
|
||||
* @brief Set PCNT channel edge mode
|
||||
* @brief Set PCNT channel edge action
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param pos_mode Counter mode when detecting positive edge
|
||||
* @param neg_mode Counter mode when detecting negative edge
|
||||
* @param pos_act Counter action when detecting positive edge
|
||||
* @param neg_act Counter action when detecting negative edge
|
||||
*/
|
||||
static inline void pcnt_ll_set_edge_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_count_mode_t pos_mode, pcnt_count_mode_t neg_mode)
|
||||
static inline void pcnt_ll_set_edge_action(pcnt_dev_t *hw, uint32_t unit, uint32_t channel, pcnt_channel_edge_action_t pos_act, pcnt_channel_edge_action_t neg_act)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf0) conf0_reg = hw->conf_unit[unit].conf0;
|
||||
if (channel == 0) {
|
||||
conf0_reg.ch0_pos_mode = pos_mode;
|
||||
conf0_reg.ch0_neg_mode = neg_mode;
|
||||
hw->conf_unit[unit].conf0.ch0_pos_mode_un = pos_act;
|
||||
hw->conf_unit[unit].conf0.ch0_neg_mode_un = neg_act;
|
||||
} else {
|
||||
conf0_reg.ch1_pos_mode = pos_mode;
|
||||
conf0_reg.ch1_neg_mode = neg_mode;
|
||||
hw->conf_unit[unit].conf0.ch1_pos_mode_un = pos_act;
|
||||
hw->conf_unit[unit].conf0.ch1_neg_mode_un = neg_act;
|
||||
}
|
||||
hw->conf_unit[unit].conf0 = conf0_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT channel level mode
|
||||
* @brief Set PCNT channel level action
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param hctrl_mode Counter mode when control signal is high level
|
||||
* @param lctrl_mode Counter mode when control signal is low level
|
||||
* @param high_act Counter action when control signal is high level
|
||||
* @param low_act Counter action when control signal is low level
|
||||
*/
|
||||
static inline void pcnt_ll_set_level_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_ctrl_mode_t hctrl_mode, pcnt_ctrl_mode_t lctrl_mode)
|
||||
static inline void pcnt_ll_set_level_action(pcnt_dev_t *hw, uint32_t unit, uint32_t channel, pcnt_channel_level_action_t high_act, pcnt_channel_level_action_t low_act)
|
||||
{
|
||||
typeof(hw->conf_unit[unit].conf0) conf0_reg = hw->conf_unit[unit].conf0;
|
||||
if (channel == 0) {
|
||||
conf0_reg.ch0_hctrl_mode = hctrl_mode;
|
||||
conf0_reg.ch0_lctrl_mode = lctrl_mode;
|
||||
hw->conf_unit[unit].conf0.ch0_hctrl_mode_un = high_act;
|
||||
hw->conf_unit[unit].conf0.ch0_lctrl_mode_un = low_act;
|
||||
} else {
|
||||
conf0_reg.ch1_hctrl_mode = hctrl_mode;
|
||||
conf0_reg.ch1_lctrl_mode = lctrl_mode;
|
||||
hw->conf_unit[unit].conf0.ch1_hctrl_mode_un = high_act;
|
||||
hw->conf_unit[unit].conf0.ch1_lctrl_mode_un = low_act;
|
||||
}
|
||||
hw->conf_unit[unit].conf0 = conf0_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT counter mode
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param pos_mode Counter mode when detecting positive edge
|
||||
* @param neg_mode Counter mode when detecting negative edge
|
||||
* @param hctrl_mode Counter mode when control signal is high level
|
||||
* @param lctrl_mode Counter mode when control signal is low level
|
||||
*/
|
||||
static inline void pcnt_ll_set_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_channel_t channel, pcnt_count_mode_t pos_mode, pcnt_count_mode_t neg_mode, pcnt_ctrl_mode_t hctrl_mode, pcnt_ctrl_mode_t lctrl_mode)
|
||||
{
|
||||
pcnt_ll_set_edge_mode(hw, unit, channel, pos_mode, neg_mode);
|
||||
pcnt_ll_set_level_mode(hw, unit, channel, hctrl_mode, lctrl_mode);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -98,11 +90,13 @@ static inline void pcnt_ll_set_mode(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_chann
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit Pulse Counter unit number
|
||||
* @param count Pointer to accept counter value
|
||||
* @return PCNT count value (a signed integer)
|
||||
*/
|
||||
static inline void pcnt_ll_get_counter_value(pcnt_dev_t *hw, pcnt_unit_t unit, int16_t *count)
|
||||
static inline int pcnt_ll_get_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
*count = (int16_t) hw->cnt_unit[unit].cnt_val;
|
||||
pcnt_un_cnt_reg_t cnt_reg = hw->cnt_unit[unit];
|
||||
int16_t value = cnt_reg.pulse_cnt_un;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -111,69 +105,60 @@ static inline void pcnt_ll_get_counter_value(pcnt_dev_t *hw, pcnt_unit_t unit, i
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_counter_pause(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_stop_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->ctrl.val |= BIT(PCNT_CNT_PAUSE_U0_S + (unit * 2));
|
||||
hw->ctrl.val |= 1 << (2 * unit + 1);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resume counting for PCNT counter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number, select from pcnt_unit_t
|
||||
* @param unit PCNT unit number, select from uint32_t
|
||||
*/
|
||||
static inline void pcnt_ll_counter_resume(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_start_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->ctrl.val &= (~(BIT(PCNT_CNT_PAUSE_U0_S + (unit * 2))));
|
||||
hw->ctrl.val &= ~(1 << (2 * unit + 1));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear and reset PCNT counter value to zero
|
||||
* @brief Clear PCNT counter value to zero
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number, select from pcnt_unit_t
|
||||
* @param unit PCNT unit number, select from uint32_t
|
||||
*/
|
||||
static inline void pcnt_ll_counter_clear(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_clear_count(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
uint32_t reset_bit = BIT(PCNT_PULSE_CNT_RST_U0_S + (unit * 2));
|
||||
hw->ctrl.val |= reset_bit;
|
||||
hw->ctrl.val &= ~reset_bit;
|
||||
hw->ctrl.val |= 1 << (2 * unit);
|
||||
hw->ctrl.val &= ~(1 << (2 * unit));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT interrupt for PCNT unit
|
||||
* @note
|
||||
* Each Pulse counter unit has five watch point events that share the same interrupt.
|
||||
* Configure events with pcnt_event_enable() and pcnt_event_disable()
|
||||
* @note Each PCNT unit has five watch point events that share the same interrupt bit.
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param unit_mask PCNT units mask
|
||||
* @param enable True to enable interrupt, False to disable interrupt
|
||||
*/
|
||||
static inline void pcnt_ll_intr_enable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_enable_intr(pcnt_dev_t *hw, uint32_t unit_mask, bool enable)
|
||||
{
|
||||
hw->int_ena.val |= BIT(PCNT_CNT_THR_EVENT_U0_INT_ENA_S + unit);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT interrupt for PCNT unit
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_intr_disable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
{
|
||||
hw->int_ena.val &= (~(BIT(PCNT_CNT_THR_EVENT_U0_INT_ENA_S + unit)));
|
||||
if (enable) {
|
||||
hw->int_ena.val |= unit_mask;
|
||||
} else {
|
||||
hw->int_ena.val &= ~unit_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT interrupt status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param status Pointer to accept value
|
||||
* @return Interrupt status word
|
||||
*/
|
||||
static inline void pcnt_ll_get_intr_status(pcnt_dev_t *hw, uint32_t *status)
|
||||
__attribute__((always_inline)) static inline uint32_t pcnt_ll_get_intr_status(pcnt_dev_t *hw)
|
||||
{
|
||||
*status = hw->int_st.val;
|
||||
return hw->int_st.val;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -182,163 +167,241 @@ static inline void pcnt_ll_get_intr_status(pcnt_dev_t *hw, uint32_t *status)
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param status value to clear interrupt status
|
||||
*/
|
||||
static inline void pcnt_ll_clear_intr_status(pcnt_dev_t *hw, uint32_t status)
|
||||
__attribute__((always_inline)) static inline void pcnt_ll_clear_intr_status(pcnt_dev_t *hw, uint32_t status)
|
||||
{
|
||||
hw->int_clr.val = status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT event of PCNT unit
|
||||
* @brief Enable PCNT high limit event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_event_enable(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type)
|
||||
static inline void pcnt_ll_enable_high_limit_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en = 1;
|
||||
} else if (evt_type == PCNT_EVT_ZERO) {
|
||||
hw->conf_unit[unit].conf0.thr_zero_en = 1;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en_un = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT event of PCNT unit
|
||||
* @brief Enable PCNT low limit event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_event_disable(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type)
|
||||
static inline void pcnt_ll_enable_low_limit_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf0.thr_h_lim_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en = 0;
|
||||
} else if (evt_type == PCNT_EVT_ZERO) {
|
||||
hw->conf_unit[unit].conf0.thr_zero_en = 0;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_l_lim_en_un = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT event value of PCNT unit
|
||||
* @brief Enable PCNT zero cross event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
*
|
||||
* @param value Counter value for PCNT event
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_set_event_value(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t value)
|
||||
static inline void pcnt_ll_enable_zero_cross_event(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
hw->conf_unit[unit].conf2.cnt_l_lim = value;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
hw->conf_unit[unit].conf2.cnt_h_lim = value;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
hw->conf_unit[unit].conf1.cnt_thres0 = value;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
hw->conf_unit[unit].conf1.cnt_thres1 = value;
|
||||
}
|
||||
hw->conf_unit[unit].conf0.thr_zero_en_un = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT event value of PCNT unit
|
||||
* @brief Enable PCNT threshold event
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param value Pointer to accept counter value for PCNT event
|
||||
* @param thres Threshold ID
|
||||
* @param enable true to enable, false to disable
|
||||
*/
|
||||
static inline void pcnt_ll_get_event_value(pcnt_dev_t *hw, pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16_t *value)
|
||||
static inline void pcnt_ll_enable_thres_event(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, bool enable)
|
||||
{
|
||||
if (evt_type == PCNT_EVT_L_LIM) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf2.cnt_l_lim;
|
||||
} else if (evt_type == PCNT_EVT_H_LIM) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf2.cnt_h_lim;
|
||||
} else if (evt_type == PCNT_EVT_THRES_0) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf1.cnt_thres0;
|
||||
} else if (evt_type == PCNT_EVT_THRES_1) {
|
||||
*value = (int16_t) hw->conf_unit[unit].conf1.cnt_thres1;
|
||||
if (thres == 0) {
|
||||
hw->conf_unit[unit].conf0.thr_thres0_en_un = enable;
|
||||
} else {
|
||||
*value = 0;
|
||||
hw->conf_unit[unit].conf0.thr_thres1_en_un = enable;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable all PCNT threshold events
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit unit number
|
||||
*/
|
||||
static inline void pcnt_ll_disable_all_events(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.val &= ~(PCNT_LL_EVENT_MASK << 11);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT high limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param value PCNT high limit value
|
||||
*/
|
||||
static inline void pcnt_ll_set_high_limit_value(pcnt_dev_t *hw, uint32_t unit, int value)
|
||||
{
|
||||
pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
|
||||
conf2_reg.cnt_h_lim_un = value;
|
||||
hw->conf_unit[unit].conf2 = conf2_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT low limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param value PCNT low limit value
|
||||
*/
|
||||
static inline void pcnt_ll_set_low_limit_value(pcnt_dev_t *hw, uint32_t unit, int value)
|
||||
{
|
||||
pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
|
||||
conf2_reg.cnt_l_lim_un = value;
|
||||
hw->conf_unit[unit].conf2 = conf2_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT threshold value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param thres Threshold ID
|
||||
* @param value PCNT threshold value
|
||||
*/
|
||||
static inline void pcnt_ll_set_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres, int value)
|
||||
{
|
||||
pcnt_un_conf1_reg_t conf1_reg = hw->conf_unit[unit].conf1;
|
||||
if (thres == 0) {
|
||||
conf1_reg.cnt_thres0_un = value;
|
||||
} else {
|
||||
conf1_reg.cnt_thres1_un = value;
|
||||
}
|
||||
hw->conf_unit[unit].conf1 = conf1_reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT high limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT high limit value
|
||||
*/
|
||||
static inline int pcnt_ll_get_high_limit_value(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
|
||||
int16_t value = conf2_reg.cnt_h_lim_un;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT low limit value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT high limit value
|
||||
*/
|
||||
static inline int pcnt_ll_get_low_limit_value(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
pcnt_un_conf2_reg_t conf2_reg = hw->conf_unit[unit].conf2;
|
||||
int16_t value = conf2_reg.cnt_l_lim_un;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT threshold value
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param thres Threshold ID
|
||||
* @return PCNT threshold value
|
||||
*/
|
||||
static inline int pcnt_ll_get_thres_value(pcnt_dev_t *hw, uint32_t unit, uint32_t thres)
|
||||
{
|
||||
int16_t value;
|
||||
pcnt_un_conf1_reg_t conf1_reg = hw->conf_unit[unit].conf1;
|
||||
if (thres == 0) {
|
||||
value = conf1_reg.cnt_thres0_un;
|
||||
} else {
|
||||
value = conf1_reg.cnt_thres1_un;
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT unit runtime status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return PCNT unit runtime status
|
||||
*/
|
||||
static inline uint32_t pcnt_ll_get_unit_status(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT count sign
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return Count sign
|
||||
*/
|
||||
static inline pcnt_unit_count_sign_t pcnt_ll_get_count_sign(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val & 0x03;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT event status
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @return event status word
|
||||
* @return Event status word
|
||||
*/
|
||||
static inline uint32_t pcnt_ll_get_event_status(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline uint32_t pcnt_ll_get_event_status(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
return hw->status_unit[unit].val;
|
||||
return hw->status_unit[unit].val >> 2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set PCNT filter value
|
||||
* @brief Set PCNT glitch filter threshold
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param filter_val PCNT signal filter value, counter in APB_CLK cycles.
|
||||
* Any pulses lasting shorter than this will be ignored when the filter is enabled.
|
||||
* @note
|
||||
* filter_val is a 10-bit value, so the maximum filter_val should be limited to 1023.
|
||||
*/
|
||||
static inline void pcnt_ll_set_filter_value(pcnt_dev_t *hw, pcnt_unit_t unit, uint16_t filter_val)
|
||||
static inline void pcnt_ll_set_glitch_filter_thres(pcnt_dev_t *hw, uint32_t unit, uint32_t filter_val)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_thres = filter_val;
|
||||
hw->conf_unit[unit].conf0.filter_thres_un = filter_val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get PCNT filter value
|
||||
* @brief Get PCNT glitch filter threshold
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param filter_val Pointer to accept PCNT filter value.
|
||||
* @return glitch filter threshold
|
||||
*/
|
||||
static inline void pcnt_ll_get_filter_value(pcnt_dev_t *hw, pcnt_unit_t unit, uint16_t *filter_val)
|
||||
static inline uint32_t pcnt_ll_get_glitch_filter_thres(pcnt_dev_t *hw, uint32_t unit)
|
||||
{
|
||||
*filter_val = hw->conf_unit[unit].conf0.filter_thres;
|
||||
return hw->conf_unit[unit].conf0.filter_thres_un;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT input filter
|
||||
* @brief Enable PCNT glitch filter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
* @param enable True to enable the filter, False to disable the filter
|
||||
*/
|
||||
static inline void pcnt_ll_filter_enable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
static inline void pcnt_ll_enable_glitch_filter(pcnt_dev_t *hw, uint32_t unit, bool enable)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_en = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT input filter
|
||||
*
|
||||
* @param hw Peripheral PCNT hardware instance address.
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
static inline void pcnt_ll_filter_disable(pcnt_dev_t *hw, pcnt_unit_t unit)
|
||||
{
|
||||
hw->conf_unit[unit].conf0.filter_en = 0;
|
||||
hw->conf_unit[unit].conf0.filter_en_un = enable;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -23,10 +23,7 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdio.h>
|
||||
#include "soc/pcnt_periph.h"
|
||||
#include "hal/pcnt_types.h"
|
||||
#include "hal/pcnt_ll.h"
|
||||
#include "soc/pcnt_struct.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@ -35,188 +32,18 @@ extern "C" {
|
||||
/**
|
||||
* Context that should be maintained by both the driver and the HAL
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
pcnt_dev_t *dev;
|
||||
pcnt_dev_t *dev; /*!< PCNT peripheral register base address */
|
||||
} pcnt_hal_context_t;
|
||||
|
||||
/**
|
||||
* @brief Set PCNT counter mode
|
||||
* @brief Init the PCNT hal and set the PCNT to the default configuration.
|
||||
* @note This function should be called first before other hal layer function is called.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param pos_mode Counter mode when detecting positive edge
|
||||
* @param neg_mode Counter mode when detecting negative edge
|
||||
* @param hctrl_mode Counter mode when control signal is high level
|
||||
* @param lctrl_mode Counter mode when control signal is low level
|
||||
* @param group_id PCNT group ID
|
||||
*/
|
||||
#define pcnt_hal_set_mode(hal, unit, channel, pos_mode, neg_mode, hctrl_mode, lctrl_mode) pcnt_ll_set_mode((hal)->dev, unit, channel, pos_mode, neg_mode, hctrl_mode, lctrl_mode)
|
||||
|
||||
/**
|
||||
* @brief Get pulse counter value
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit Pulse Counter unit number
|
||||
* @param count Pointer to accept counter value
|
||||
*/
|
||||
#define pcnt_hal_get_counter_value(hal, unit, count) pcnt_ll_get_counter_value((hal)->dev, unit, count)
|
||||
|
||||
/**
|
||||
* @brief Pause PCNT counter of PCNT unit
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
#define pcnt_hal_counter_pause(hal, unit) pcnt_ll_counter_pause((hal)->dev, unit)
|
||||
|
||||
/**
|
||||
* @brief Resume counting for PCNT counter
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number, select from unit_t
|
||||
*/
|
||||
#define pcnt_hal_counter_resume(hal, unit) pcnt_ll_counter_resume((hal)->dev, unit)
|
||||
|
||||
/**
|
||||
* @brief Clear and reset PCNT counter value to zero
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number, select from unit_t
|
||||
*/
|
||||
#define pcnt_hal_counter_clear(hal, unit) pcnt_ll_counter_clear((hal)->dev, unit)
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT interrupt for PCNT unit
|
||||
* @note
|
||||
* Each Pulse counter unit has five watch point events that share the same interrupt.
|
||||
* Configure events with pcnt_event_enable() and pcnt_event_disable()
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
#define pcnt_hal_intr_enable(hal, unit) pcnt_ll_intr_enable((hal)->dev, unit)
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT interrupt for PCNT unit
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
#define pcnt_hal_intr_disable(hal, unit) pcnt_ll_intr_disable((hal)->dev, unit)
|
||||
|
||||
/**
|
||||
* @brief Get PCNT interrupt status
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param mask The interrupt status mask to be cleared. Pointer to accept value interrupt status mask.
|
||||
*/
|
||||
#define pcnt_hal_get_intr_status(hal, mask) pcnt_ll_get_intr_status((hal)->dev, mask)
|
||||
|
||||
/**
|
||||
* @brief Clear PCNT interrupt status
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param mask The interrupt status mask to be cleared.
|
||||
*/
|
||||
#define pcnt_hal_clear_intr_status(hal, mask) pcnt_ll_clear_intr_status((hal)->dev, mask)
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT event of PCNT unit
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
*/
|
||||
#define pcnt_hal_event_enable(hal, unit, evt_type) pcnt_ll_event_enable((hal)->dev, unit, evt_type)
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT event of PCNT unit
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
*/
|
||||
#define pcnt_hal_event_disable(hal, unit, evt_type) pcnt_ll_event_disable((hal)->dev, unit, evt_type)
|
||||
|
||||
/**
|
||||
* @brief Set PCNT event value of PCNT unit
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
*
|
||||
* @param value Counter value for PCNT event
|
||||
*/
|
||||
#define pcnt_hal_set_event_value(hal, unit, evt_type, value) pcnt_ll_set_event_value((hal)->dev, unit, evt_type, value)
|
||||
|
||||
/**
|
||||
* @brief Get PCNT event value of PCNT unit
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
* @param evt_type Watch point event type.
|
||||
* All enabled events share the same interrupt (one interrupt per pulse counter unit).
|
||||
* @param value Pointer to accept counter value for PCNT event
|
||||
*/
|
||||
#define pcnt_hal_get_event_value(hal, unit, evt_type, value) pcnt_ll_get_event_value((hal)->dev, unit, evt_type, value)
|
||||
|
||||
/**
|
||||
* @brief Get PCNT event status
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
* @return event status word
|
||||
*/
|
||||
#define pcnt_hal_get_event_status(hal, unit) pcnt_ll_get_event_status((hal)->dev, unit)
|
||||
|
||||
/**
|
||||
* @brief Set PCNT filter value
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
* @param filter_val PCNT signal filter value, counter in APB_CLK cycles.
|
||||
* Any pulses lasting shorter than this will be ignored when the filter is enabled.
|
||||
* @note
|
||||
* filter_val is a 10-bit value, so the maximum filter_val should be limited to 1023.
|
||||
*/
|
||||
#define pcnt_hal_set_filter_value(hal, unit, filter_val) pcnt_ll_set_filter_value((hal)->dev, unit, filter_val)
|
||||
|
||||
/**
|
||||
* @brief Get PCNT filter value
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
* @param filter_val Pointer to accept PCNT filter value.
|
||||
*/
|
||||
#define pcnt_hal_get_filter_value(hal, unit, filter_val) pcnt_ll_get_filter_value((hal)->dev, unit, filter_val)
|
||||
|
||||
/**
|
||||
* @brief Enable PCNT input filter
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
#define pcnt_hal_filter_enable(hal, unit) pcnt_ll_filter_enable((hal)->dev, unit)
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT input filter
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param unit PCNT unit number
|
||||
*/
|
||||
#define pcnt_hal_filter_disable(hal, unit) pcnt_ll_filter_disable((hal)->dev, unit)
|
||||
|
||||
/**
|
||||
* @brief Init the PCNT hal and set the PCNT to the default configuration. This function should be called first before other hal layer function is called
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param pcnt_num The uart port number, the max port number is (PCNT_NUM_MAX -1)
|
||||
*/
|
||||
void pcnt_hal_init(pcnt_hal_context_t *hal, int pcnt_num);
|
||||
void pcnt_hal_init(pcnt_hal_context_t *hal, int group_id);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
|
||||
// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
@ -18,93 +18,36 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "soc/soc_caps.h"
|
||||
|
||||
#define PCNT_PIN_NOT_USED (-1) /*!< When selected for a pin, this pin will not be used */
|
||||
|
||||
/**
|
||||
* @brief PCNT port number, the max port number is (PCNT_PORT_MAX - 1).
|
||||
* @brief PCNT channel action on control level
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_PORT_0 = 0, /*!< PCNT port 0 */
|
||||
PCNT_PORT_MAX, /*!< PCNT port max */
|
||||
} pcnt_port_t;
|
||||
PCNT_CHANNEL_LEVEL_ACTION_KEEP, /*!< Keep current count mode */
|
||||
PCNT_CHANNEL_LEVEL_ACTION_INVERSE, /*!< Invert current count mode (increase -> decrease, decrease -> increase) */
|
||||
PCNT_CHANNEL_LEVEL_ACTION_HOLD, /*!< Hold current count value */
|
||||
} pcnt_channel_level_action_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of all available PCNT units
|
||||
* @brief PCNT channel action on signal edge
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_UNIT_0 = 0, /*!< PCNT unit 0 */
|
||||
PCNT_UNIT_1 = 1, /*!< PCNT unit 1 */
|
||||
PCNT_UNIT_2 = 2, /*!< PCNT unit 2 */
|
||||
PCNT_UNIT_3 = 3, /*!< PCNT unit 3 */
|
||||
#if SOC_PCNT_UNIT_NUM > 4
|
||||
PCNT_UNIT_4 = 4, /*!< PCNT unit 4 */
|
||||
PCNT_UNIT_5 = 5, /*!< PCNT unit 5 */
|
||||
PCNT_UNIT_6 = 6, /*!< PCNT unit 6 */
|
||||
PCNT_UNIT_7 = 7, /*!< PCNT unit 7 */
|
||||
#endif
|
||||
PCNT_UNIT_MAX,
|
||||
} pcnt_unit_t;
|
||||
PCNT_CHANNEL_EDGE_ACTION_HOLD, /*!< Hold current count value */
|
||||
PCNT_CHANNEL_EDGE_ACTION_INCREASE, /*!< Increase count value */
|
||||
PCNT_CHANNEL_EDGE_ACTION_DECREASE, /*!< Decrease count value */
|
||||
} pcnt_channel_edge_action_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of available modes that determine the counter's action depending on the state of the control signal's input GPIO
|
||||
* @note Configuration covers two actions, one for high, and one for low level on the control input
|
||||
* @brief PCNT unit counter value's sign
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_MODE_KEEP = 0, /*!< Control mode: won't change counter mode*/
|
||||
PCNT_MODE_REVERSE = 1, /*!< Control mode: invert counter mode(increase -> decrease, decrease -> increase) */
|
||||
PCNT_MODE_DISABLE = 2, /*!< Control mode: Inhibit counter(counter value will not change in this condition) */
|
||||
PCNT_MODE_MAX
|
||||
} pcnt_ctrl_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of available modes that determine the counter's action on the edge of the pulse signal's input GPIO
|
||||
* @note Configuration covers two actions, one for positive, and one for negative edge on the pulse input
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_COUNT_DIS = 0, /*!< Counter mode: Inhibit counter(counter value will not change in this condition) */
|
||||
PCNT_COUNT_INC = 1, /*!< Counter mode: Increase counter value */
|
||||
PCNT_COUNT_DEC = 2, /*!< Counter mode: Decrease counter value */
|
||||
PCNT_COUNT_MAX
|
||||
} pcnt_count_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of channels available for a single PCNT unit
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_CHANNEL_0 = 0x00, /*!< PCNT channel 0 */
|
||||
PCNT_CHANNEL_1 = 0x01, /*!< PCNT channel 1 */
|
||||
PCNT_CHANNEL_MAX,
|
||||
} pcnt_channel_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of counter's events the may trigger an interrupt
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_EVT_THRES_1 = BIT(2), /*!< PCNT watch point event: threshold1 value event */
|
||||
PCNT_EVT_THRES_0 = BIT(3), /*!< PCNT watch point event: threshold0 value event */
|
||||
PCNT_EVT_L_LIM = BIT(4), /*!< PCNT watch point event: Minimum counter value */
|
||||
PCNT_EVT_H_LIM = BIT(5), /*!< PCNT watch point event: Maximum counter value */
|
||||
PCNT_EVT_ZERO = BIT(6), /*!< PCNT watch point event: counter value zero event */
|
||||
PCNT_EVT_MAX
|
||||
} pcnt_evt_type_t;
|
||||
|
||||
/**
|
||||
* @brief Pulse Counter configuration for a single channel
|
||||
*/
|
||||
typedef struct {
|
||||
int pulse_gpio_num; /*!< Pulse input GPIO number, if you want to use GPIO16, enter pulse_gpio_num = 16, a negative value will be ignored */
|
||||
int ctrl_gpio_num; /*!< Control signal input GPIO number, a negative value will be ignored */
|
||||
pcnt_ctrl_mode_t lctrl_mode; /*!< PCNT low control mode */
|
||||
pcnt_ctrl_mode_t hctrl_mode; /*!< PCNT high control mode */
|
||||
pcnt_count_mode_t pos_mode; /*!< PCNT positive edge count mode */
|
||||
pcnt_count_mode_t neg_mode; /*!< PCNT negative edge count mode */
|
||||
int16_t counter_h_lim; /*!< Maximum counter value */
|
||||
int16_t counter_l_lim; /*!< Minimum counter value */
|
||||
pcnt_unit_t unit; /*!< PCNT unit number */
|
||||
pcnt_channel_t channel; /*!< the PCNT channel */
|
||||
} pcnt_config_t;
|
||||
PCNT_UNIT_COUNT_SIGN_ZERO_POS, /*!< positive value to zero */
|
||||
PCNT_UNIT_COUNT_SIGN_ZERO_NEG, /*!< negative value to zero */
|
||||
PCNT_UNIT_COUNT_SIGN_NEG, /*!< counter value negative */
|
||||
PCNT_UNIT_COUNT_SIGN_POS, /*!< counter value positive */
|
||||
} pcnt_unit_count_sign_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -15,6 +15,7 @@
|
||||
// The HAL layer for PCNT (common part)
|
||||
|
||||
#include "hal/pcnt_hal.h"
|
||||
#include "hal/pcnt_ll.h"
|
||||
|
||||
void pcnt_hal_init(pcnt_hal_context_t *hal, int pcnt_num)
|
||||
{
|
||||
|
||||
@ -39,11 +39,13 @@
|
||||
#include "hal/rmt_hal.h"
|
||||
#include "hal/rmt_ll.h"
|
||||
#include "hal/pcnt_hal.h"
|
||||
#include "hal/pcnt_ll.h"
|
||||
#include "esp_rom_gpio.h"
|
||||
#include "esp_rom_sys.h"
|
||||
|
||||
#define REF_CLOCK_RMT_CHANNEL 0 // RMT channel 0
|
||||
#define REF_CLOCK_PCNT_UNIT 0 // PCNT unit 0 channel 0
|
||||
#define REF_CLOCK_PCNT_UNIT 0 // PCNT unit 0
|
||||
#define REF_CLOCK_PCNT_CHANNEL 0// PCNT channel 0
|
||||
#define REF_CLOCK_GPIO 21 // GPIO used to combine RMT out signal with PCNT input signal
|
||||
|
||||
#define REF_CLOCK_PRESCALER_MS 30 // PCNT high threshold interrupt fired every 30ms
|
||||
@ -109,19 +111,17 @@ void ref_clock_init(void)
|
||||
periph_module_enable(PERIPH_PCNT_MODULE);
|
||||
pcnt_hal_init(&s_pcnt_hal, REF_CLOCK_PCNT_UNIT);
|
||||
|
||||
pcnt_ll_set_mode(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, PCNT_CHANNEL_0,
|
||||
PCNT_COUNT_INC, PCNT_COUNT_INC,
|
||||
PCNT_MODE_KEEP, PCNT_MODE_KEEP);
|
||||
pcnt_ll_event_disable(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, PCNT_EVT_L_LIM);
|
||||
pcnt_ll_event_enable(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, PCNT_EVT_H_LIM);
|
||||
pcnt_ll_event_disable(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, PCNT_EVT_ZERO);
|
||||
pcnt_ll_event_disable(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, PCNT_EVT_THRES_0);
|
||||
pcnt_ll_event_disable(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, PCNT_EVT_THRES_1);
|
||||
pcnt_ll_set_event_value(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, PCNT_EVT_H_LIM, REF_CLOCK_PRESCALER_MS * 1000);
|
||||
pcnt_ll_set_edge_action(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, REF_CLOCK_PCNT_CHANNEL,
|
||||
PCNT_CHANNEL_EDGE_ACTION_INCREASE, PCNT_CHANNEL_EDGE_ACTION_INCREASE);
|
||||
pcnt_ll_set_level_action(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, REF_CLOCK_PCNT_CHANNEL,
|
||||
PCNT_CHANNEL_LEVEL_ACTION_KEEP, PCNT_CHANNEL_LEVEL_ACTION_KEEP);
|
||||
pcnt_ll_disable_all_events(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
pcnt_ll_set_high_limit_value(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, REF_CLOCK_PRESCALER_MS * 1000);
|
||||
pcnt_ll_enable_high_limit_event(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, true);
|
||||
|
||||
// Enable PCNT and wait for it to start counting
|
||||
pcnt_ll_counter_resume(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
pcnt_ll_counter_clear(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
pcnt_ll_start_count(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
pcnt_ll_clear_count(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
|
||||
esp_rom_delay_us(10000);
|
||||
|
||||
@ -129,7 +129,7 @@ void ref_clock_init(void)
|
||||
s_milliseconds = 0;
|
||||
ESP_ERROR_CHECK(esp_intr_alloc(ETS_PCNT_INTR_SOURCE, ESP_INTR_FLAG_IRAM, pcnt_isr, NULL, &s_intr_handle));
|
||||
pcnt_ll_clear_intr_status(s_pcnt_hal.dev, BIT(REF_CLOCK_PCNT_UNIT));
|
||||
pcnt_ll_intr_enable(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
pcnt_ll_enable_intr(s_pcnt_hal.dev, 1 << REF_CLOCK_PCNT_UNIT, true);
|
||||
}
|
||||
|
||||
static void IRAM_ATTR pcnt_isr(void *arg)
|
||||
@ -145,7 +145,7 @@ void ref_clock_deinit()
|
||||
assert(s_intr_handle && "ref clock deinit called without init");
|
||||
|
||||
// Disable interrupt
|
||||
pcnt_ll_intr_disable(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
pcnt_ll_enable_intr(s_pcnt_hal.dev, 1 << REF_CLOCK_PCNT_UNIT, false);
|
||||
esp_intr_free(s_intr_handle);
|
||||
s_intr_handle = NULL;
|
||||
|
||||
@ -154,21 +154,20 @@ void ref_clock_deinit()
|
||||
periph_module_disable(PERIPH_RMT_MODULE);
|
||||
|
||||
// Disable PCNT
|
||||
pcnt_ll_counter_pause(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
pcnt_ll_stop_count(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
periph_module_disable(PERIPH_PCNT_MODULE);
|
||||
}
|
||||
|
||||
uint64_t ref_clock_get()
|
||||
{
|
||||
portENTER_CRITICAL(&s_lock);
|
||||
int16_t microseconds = 0;
|
||||
pcnt_ll_get_counter_value(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, µseconds);
|
||||
int microseconds = 0;
|
||||
microseconds = pcnt_ll_get_count(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
uint32_t milliseconds = s_milliseconds;
|
||||
uint32_t intr_status = 0;
|
||||
pcnt_ll_get_intr_status(s_pcnt_hal.dev, &intr_status);
|
||||
uint32_t intr_status = pcnt_ll_get_intr_status(s_pcnt_hal.dev);
|
||||
if (intr_status & BIT(REF_CLOCK_PCNT_UNIT)) {
|
||||
// refresh counter value, in case the overflow has happened after reading cnt_val
|
||||
pcnt_ll_get_counter_value(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT, µseconds);
|
||||
microseconds = pcnt_ll_get_count(s_pcnt_hal.dev, REF_CLOCK_PCNT_UNIT);
|
||||
milliseconds += REF_CLOCK_PRESCALER_MS;
|
||||
}
|
||||
portEXIT_CRITICAL(&s_lock);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user