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Merge branch 'bugfix/fix_esp32c6_swd_wprotect_key' into 'master'

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soc: Fix esp32c6 super watchdog wrong wprotect key

See merge request espressif/esp-idf!20891
This commit is contained in:
morris 2022-11-02 00:02:32 +08:00
commit 53560f4227
2 changed files with 7 additions and 7 deletions
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6
components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
View File

@ -236,9 +236,9 @@ static void bootloader_check_wdt_reset(void)
static void bootloader_super_wdt_auto_feed(void)
{
REG_WRITE(LP_WDT_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE);
REG_WRITE(LP_WDT_SWD_WPROTECT_REG, LP_WDT_SWD_WKEY_VALUE);
REG_SET_BIT(LP_WDT_SWD_CONFIG_REG, LP_WDT_SWD_AUTO_FEED_EN);
REG_WRITE(LP_WDT_WPROTECT_REG, 0);
REG_WRITE(LP_WDT_SWD_WPROTECT_REG, 0);
}
static inline void bootloader_hardware_init(void)
@ -255,8 +255,8 @@ static inline void bootloader_hardware_init(void)
static inline void bootloader_ana_reset_config(void)
{
// TODO: IDF-5990 copied from C3, need update
// Have removed bootloader_ana_super_wdt_reset_config for now; can be evaluated later to see whether needs to add it back
/*
esp32c6 has removed super wdt!
For origin chip & ECO1: only support swt reset;
For ECO2: fix brownout reset bug, support swt & brownout reset;
For ECO3: fix clock glitch reset bug, support all reset, include: swt & brownout & clock glitch reset.

8
components/soc/esp32c6/include/soc/lp_wdt_reg.h
View File

@ -11,11 +11,11 @@
extern "C" {
#endif
// TODO: IDF-5730 (better to move to wdt_types.h?)
/* The value that needs to be written to RTC_CNTL_WDT_WKEY to write-enable the wdt registers */
// TODO: IDF-5730 (better to rename and move to wdt_types.h?)
/* The value that needs to be written to LP_WDT_WPROTECT_REG to write-enable the wdt registers */
#define RTC_CNTL_WDT_WKEY_VALUE 0x50D83AA1
/* The value that needs to be written to RTC_CNTL_SWD_WPROTECT_REG to write-enable the wdt registers */
#define RTC_CNTL_SWD_WKEY_VALUE 0x8F1D312A
/* The value that needs to be written to LP_WDT_SWD_WPROTECT_REG to write-enable the swd registers */
#define LP_WDT_SWD_WKEY_VALUE 0x50D83AA1
/* Possible values for RTC_CNTL_WDT_CPU_RESET_LENGTH and RTC_CNTL_WDT_SYS_RESET_LENGTH */
#define RTC_WDT_RESET_LENGTH_100_NS 0