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Merge branch 'bugfix/fix_esp32c6_swd_wprotect_key' into 'master'
soc: Fix esp32c6 super watchdog wrong wprotect key See merge request espressif/esp-idf!20891
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commit
53560f4227
@ -236,9 +236,9 @@ static void bootloader_check_wdt_reset(void)
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static void bootloader_super_wdt_auto_feed(void)
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static void bootloader_super_wdt_auto_feed(void)
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{
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{
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REG_WRITE(LP_WDT_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE);
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REG_WRITE(LP_WDT_SWD_WPROTECT_REG, LP_WDT_SWD_WKEY_VALUE);
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REG_SET_BIT(LP_WDT_SWD_CONFIG_REG, LP_WDT_SWD_AUTO_FEED_EN);
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REG_SET_BIT(LP_WDT_SWD_CONFIG_REG, LP_WDT_SWD_AUTO_FEED_EN);
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REG_WRITE(LP_WDT_WPROTECT_REG, 0);
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REG_WRITE(LP_WDT_SWD_WPROTECT_REG, 0);
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}
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}
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static inline void bootloader_hardware_init(void)
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static inline void bootloader_hardware_init(void)
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@ -255,8 +255,8 @@ static inline void bootloader_hardware_init(void)
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static inline void bootloader_ana_reset_config(void)
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static inline void bootloader_ana_reset_config(void)
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{
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{
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// TODO: IDF-5990 copied from C3, need update
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// TODO: IDF-5990 copied from C3, need update
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// Have removed bootloader_ana_super_wdt_reset_config for now; can be evaluated later to see whether needs to add it back
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/*
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/*
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esp32c6 has removed super wdt!
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For origin chip & ECO1: only support swt reset;
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For origin chip & ECO1: only support swt reset;
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For ECO2: fix brownout reset bug, support swt & brownout reset;
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For ECO2: fix brownout reset bug, support swt & brownout reset;
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For ECO3: fix clock glitch reset bug, support all reset, include: swt & brownout & clock glitch reset.
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For ECO3: fix clock glitch reset bug, support all reset, include: swt & brownout & clock glitch reset.
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@ -11,11 +11,11 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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// TODO: IDF-5730 (better to move to wdt_types.h?)
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// TODO: IDF-5730 (better to rename and move to wdt_types.h?)
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/* The value that needs to be written to RTC_CNTL_WDT_WKEY to write-enable the wdt registers */
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/* The value that needs to be written to LP_WDT_WPROTECT_REG to write-enable the wdt registers */
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#define RTC_CNTL_WDT_WKEY_VALUE 0x50D83AA1
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#define RTC_CNTL_WDT_WKEY_VALUE 0x50D83AA1
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/* The value that needs to be written to RTC_CNTL_SWD_WPROTECT_REG to write-enable the wdt registers */
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/* The value that needs to be written to LP_WDT_SWD_WPROTECT_REG to write-enable the swd registers */
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#define RTC_CNTL_SWD_WKEY_VALUE 0x8F1D312A
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#define LP_WDT_SWD_WKEY_VALUE 0x50D83AA1
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/* Possible values for RTC_CNTL_WDT_CPU_RESET_LENGTH and RTC_CNTL_WDT_SYS_RESET_LENGTH */
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/* Possible values for RTC_CNTL_WDT_CPU_RESET_LENGTH and RTC_CNTL_WDT_SYS_RESET_LENGTH */
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#define RTC_WDT_RESET_LENGTH_100_NS 0
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#define RTC_WDT_RESET_LENGTH_100_NS 0
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