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Merge branch 'feature/support_esp32p4_deepsleep' into 'master'

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feature(esp_hw_support): support esp32p4 deepsleep example and tests

Closes IDF-7529

See merge request espressif/esp-idf!29789
This commit is contained in:
Wu Zheng Hui 2024-03-27 17:43:05 +08:00
commit 520ed675d7
35 changed files with 161 additions and 92 deletions
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4
components/esp_driver_gpio/test_apps/gpio/main/test_rtcio.c
View File

@ -235,7 +235,7 @@ TEST_CASE("RTCIO_output_hold_test", "[rtcio]")
#endif //SOC_RTCIO_HOLD_SUPPORTED
#endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) // TODO: IDF-7529
#if SOC_DEEP_SLEEP_SUPPORTED
// It is not necessary to test every rtcio pin, it will take too much ci testing time for deep sleep
// Only tests on s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX] pin
// (ESP32: IO25, ESP32S2, S3: IO6, C6: IO5, H2: IO12) these pads' default configuration is low level
@ -284,4 +284,4 @@ static void rtcio_deep_sleep_hold_test_second_stage(void)
TEST_CASE_MULTIPLE_STAGES("RTCIO_deep_sleep_output_hold_test", "[rtcio]",
rtcio_deep_sleep_hold_test_first_stage,
rtcio_deep_sleep_hold_test_second_stage)
#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)
#endif // SOC_DEEP_SLEEP_SUPPORTED

7
components/esp_hw_support/CMakeLists.txt
View File

@ -138,7 +138,7 @@ if(NOT BOOTLOADER_BUILD)
endif()
endif()
if(CONFIG_SOC_RTC_FAST_MEM_SUPPORTED)
if(CONFIG_SOC_RTC_FAST_MEM_SUPPORTED AND CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB)
list(APPEND srcs "sleep_wake_stub.c")
endif()
@ -146,11 +146,6 @@ if(NOT BOOTLOADER_BUILD)
list(APPEND srcs "esp_clock_output.c")
endif()
if(CONFIG_IDF_TARGET_ESP32P4)
list(REMOVE_ITEM srcs
"sleep_wake_stub.c" # TODO: IDF-7529
)
endif()
if(CONFIG_IDF_TARGET_ESP32C5)
list(REMOVE_ITEM srcs
"sleep_modes.c" # TODO: [ESP32C5] IDF-8638, IDF-8640

2
components/esp_hw_support/port/esp32p4/private_include/pmu_bit_defs.h
View File

@ -22,7 +22,7 @@ extern "C" {
#define PMU_LP_GPIO_WAKEUP_EN BIT(9)
#define PMU_LP_UART_WAKEUP_EN BIT(10)
#define PMU_TOUCH_WAKEUP_EN BIT(11)
#define PMU_EXT_IO_WAKEUP_EN BIT(12)
#define PMU_EXT1_WAKEUP_EN BIT(12)
#define PMU_LP_TIMER_WAKEUP_EN BIT(13)
#define PMU_BOD_WAKEUP_EN BIT(14)
#define PMU_VDDBAT_UNDERVOLT_WAKEUP_EN BIT(15)

26
components/esp_hw_support/sleep_modes.c
View File

@ -10,6 +10,7 @@
#include <sys/param.h>
#include "esp_attr.h"
#include "esp_rom_caps.h"
#include "esp_memory_utils.h"
#include "esp_sleep.h"
#include "esp_private/esp_sleep_internal.h"
@ -287,7 +288,7 @@ static void touch_wakeup_prepare(void);
static void gpio_deep_sleep_wakeup_prepare(void);
#endif
#if SOC_RTC_FAST_MEM_SUPPORTED && !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-7529
#if ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB && SOC_DEEP_SLEEP_SUPPORTED
#if SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
static RTC_FAST_ATTR esp_deep_sleep_wake_stub_fn_t wake_stub_fn_handler = NULL;
@ -842,28 +843,26 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
esp_sleep_isolate_digital_gpio();
#endif
#if ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
#if SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
#if !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-7529
esp_set_deep_sleep_wake_stub_default_entry();
#elif !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP && SOC_RTC_FAST_MEM_SUPPORTED
/* If not possible stack is in RTC FAST memory, use the ROM function to calculate the CRC and save ~140 bytes IRAM */
set_rtc_memory_crc();
#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
#endif
// Enter Deep Sleep
#if!ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB || SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY || !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
#if SOC_PMU_SUPPORTED
result = call_rtc_sleep_start(reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
#else
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
#endif
#else
#if !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
/* If not possible stack is in RTC FAST memory, use the ROM function to calculate the CRC and save ~140 bytes IRAM */
#if SOC_RTC_FAST_MEM_SUPPORTED
set_rtc_memory_crc();
#endif
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
#else
/* Otherwise, need to call the dedicated soc function for this */
result = rtc_deep_sleep_start(s_config.wakeup_triggers, reject_triggers);
#endif
#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
} else {
/* Cache Suspend 1: will wait cache idle in cache suspend */
suspend_cache();
@ -992,12 +991,12 @@ static esp_err_t IRAM_ATTR deep_sleep_start(bool allow_sleep_rejection)
// record current RTC time
s_config.rtc_ticks_at_sleep_start = rtc_time_get();
#if SOC_RTC_FAST_MEM_SUPPORTED
#if ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
// Configure wake stub
if (esp_get_deep_sleep_wake_stub() == NULL) {
esp_set_deep_sleep_wake_stub(esp_wake_deep_sleep);
}
#endif // SOC_RTC_FAST_MEM_SUPPORTED
#endif // ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
// Decide which power domains can be powered down
uint32_t pd_flags = get_power_down_flags();
@ -1014,6 +1013,9 @@ static esp_err_t IRAM_ATTR deep_sleep_start(bool allow_sleep_rejection)
#if SOC_PM_SUPPORT_HP_AON_PD
force_pd_flags |= PMU_SLEEP_PD_HP_AON;
#endif
#if SOC_PM_SUPPORT_CNNT_PD
force_pd_flags |= PMU_SLEEP_PD_CNNT;
#endif
#else
uint32_t force_pd_flags = RTC_SLEEP_PD_DIG | RTC_SLEEP_PD_VDDSDIO | RTC_SLEEP_PD_INT_8M | RTC_SLEEP_PD_XTAL;
#endif

4
components/esp_rom/esp32/Kconfig.soc_caps.in
View File

@ -50,3 +50,7 @@ config ESP_ROM_USB_OTG_NUM
config ESP_ROM_USB_SERIAL_DEVICE_NUM
int
default -1
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y

1
components/esp_rom/esp32/esp_rom_caps.h
View File

@ -18,3 +18,4 @@
#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions
#define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage.
#define ESP_ROM_USB_SERIAL_DEVICE_NUM (-1) // No USB_SERIAL_JTAG in the ROM, set -1 for Kconfig usage.
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.

4
components/esp_rom/esp32c3/Kconfig.soc_caps.in
View File

@ -90,3 +90,7 @@ config ESP_ROM_USB_OTG_NUM
config ESP_ROM_HAS_VERSION
bool
default y
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y

1
components/esp_rom/esp32c3/esp_rom_caps.h
View File

@ -28,3 +28,4 @@
#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions
#define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage.
#define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.

4
components/esp_rom/esp32c5/beta3/esp32c5/Kconfig.soc_caps.in
View File

@ -90,3 +90,7 @@ config ESP_ROM_USB_OTG_NUM
config ESP_ROM_HAS_VERSION
bool
default y
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y

1
components/esp_rom/esp32c5/beta3/esp32c5/esp_rom_caps.h
View File

@ -28,3 +28,4 @@
#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
#define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage.
#define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.

4
components/esp_rom/esp32c5/mp/esp32c5/Kconfig.soc_caps.in
View File

@ -78,3 +78,7 @@ config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
config ESP_ROM_HAS_VERSION
bool
default y
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y

1
components/esp_rom/esp32c5/mp/esp32c5/esp_rom_caps.h
View File

@ -27,3 +27,4 @@
#define ESP_ROM_WDT_INIT_PATCH (1) // ROM version does not configure the clock
#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
#define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.

4
components/esp_rom/esp32c6/Kconfig.soc_caps.in
View File

@ -102,3 +102,7 @@ config ESP_ROM_USB_OTG_NUM
config ESP_ROM_HAS_VERSION
bool
default y
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y

1
components/esp_rom/esp32c6/esp_rom_caps.h
View File

@ -31,3 +31,4 @@
#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions
#define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage.
#define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.

4
components/esp_rom/esp32h2/Kconfig.soc_caps.in
View File

@ -90,3 +90,7 @@ config ESP_ROM_USB_OTG_NUM
config ESP_ROM_HAS_VERSION
bool
default y
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y

1
components/esp_rom/esp32h2/esp_rom_caps.h
View File

@ -28,3 +28,4 @@
#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions
#define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage.
#define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.

4
components/esp_rom/esp32s2/Kconfig.soc_caps.in
View File

@ -50,3 +50,7 @@ config ESP_ROM_HAS_SW_FLOAT
config ESP_ROM_USB_SERIAL_DEVICE_NUM
int
default -1
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y

1
components/esp_rom/esp32s2/esp_rom_caps.h
View File

@ -18,3 +18,4 @@
#define ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG (1) // ROM api Cache_Count_Flash_Pages will return unexpected value
#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions
#define ESP_ROM_USB_SERIAL_DEVICE_NUM (-1) // No USB_SERIAL_JTAG in the ROM, set -1 for Kconfig usage.
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.

4
components/esp_rom/esp32s3/Kconfig.soc_caps.in
View File

@ -106,3 +106,7 @@ config ESP_ROM_HAS_SW_FLOAT
config ESP_ROM_HAS_VERSION
bool
default y
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y

1
components/esp_rom/esp32s3/esp_rom_caps.h
View File

@ -32,3 +32,4 @@
#define ESP_ROM_HAS_CACHE_WRITEBACK_BUG (1) // ROM api Cache_WriteBack_Addr address or size misalignment may cause cache hit with wrong value.
#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions
#define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.

3
components/esp_rom/include/esp32p4/rom/rtc.h
View File

@ -195,8 +195,7 @@ static inline void rtc_suppress_rom_log(void)
* you need to write to this register in the same format.
* Namely, the upper 16 bits and lower should be the same.
*/
// REG_SET_BIT(LP_SYS_LP_STORE4_REG, RTC_DISABLE_ROM_LOG);
abort();
REG_SET_BIT(LP_SYSTEM_REG_LP_STORE4_REG, RTC_DISABLE_ROM_LOG);
}
/**

2
components/esp_system/port/cpu_start.c
View File

@ -703,7 +703,7 @@ void IRAM_ATTR call_start_cpu0(void)
#endif
#endif
#if SOC_DEEP_SLEEP_SUPPORTED //TODO: IDF-7529, IDF-8638, IDF-9245
#if SOC_DEEP_SLEEP_SUPPORTED //TODO: IDF-8638, IDF-9245
// Need to unhold the IOs that were hold right before entering deep sleep, which are used as wakeup pins
if (rst_reas[0] == RESET_REASON_CORE_DEEP_SLEEP) {
esp_deep_sleep_wakeup_io_reset();

4
components/esp_system/port/soc/esp32p4/reset_reason.c
View File

@ -31,7 +31,6 @@ static esp_reset_reason_t get_reset_reason(soc_reset_reason_t rtc_reset_reason,
return ESP_RST_SW;
case RESET_REASON_CORE_PMU_PWR_DOWN:
/* Check when doing sleep bringup TODO IDF-7529 */
return ESP_RST_DEEPSLEEP;
case RESET_REASON_CPU_MWDT:
@ -57,6 +56,9 @@ static esp_reset_reason_t get_reset_reason(soc_reset_reason_t rtc_reset_reason,
return ESP_RST_CPU_LOCKUP;
case RESET_REASON_CORE_EFUSE_CRC:
#if CONFIG_IDF_TARGET_ESP32P4
return ESP_RST_DEEPSLEEP; // TODO: IDF-9564
#endif
return ESP_RST_EFUSE;
case RESET_REASON_CORE_PWR_GLITCH:

8
components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c
View File

@ -23,7 +23,8 @@
#define CHECK_VALUE 0x89abcdef
#if CONFIG_SOC_RTC_FAST_MEM_SUPPORTED || CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED
// TODO: IDF-9564
#if (CONFIG_SOC_RTC_FAST_MEM_SUPPORTED || CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED) && !CONFIG_IDF_TARGET_ESP32P4
#define CHECK_RTC_MEM 1
#endif //CONFIG_SOC_RTC_FAST_MEM_SUPPORTED || CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED
@ -141,8 +142,7 @@ static void setup_values(void)
#endif
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) // TODO IDF-7529
#if SOC_DEEP_SLEEP_SUPPORTED
static void do_deep_sleep(void)
{
setup_values();
@ -169,7 +169,7 @@ TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_DEEPSLEEP", "[reset_reason][rese
do_deep_sleep,
check_reset_reason_deep_sleep);
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(...)
#endif // SOC_DEEP_SLEEP_SUPPORTED
static void do_exception(void)
{

15
components/esp_system/test_apps/esp_system_unity_tests/main/test_sleep.c
View File

@ -31,8 +31,7 @@
#include "nvs_flash.h"
#include "nvs.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) // TODO IDF-7529
#if SOC_DEEP_SLEEP_SUPPORTED
#if SOC_PMU_SUPPORTED
#include "esp_private/esp_pmu.h"
#else
@ -79,6 +78,7 @@ TEST_CASE_MULTIPLE_STAGES("enter deep sleep on APP CPU and wake up using timer",
#endif
#if !(CONFIG_SPIRAM && CONFIG_IDF_TARGET_ESP32P4) // TODO: IDF-9569
static void do_deep_sleep_timer(void)
{
esp_sleep_enable_timer_wakeup(2000000);
@ -111,6 +111,7 @@ TEST_CASE("wake up from light sleep using timer", "[deepsleep]")
(tv_stop.tv_usec - tv_start.tv_usec) * 1e-3f;
TEST_ASSERT_INT32_WITHIN(500, 2000, (int) dt);
}
#endif
//NOTE: Explained in IDF-1445 | MR !14996
#if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
@ -252,6 +253,7 @@ TEST_CASE("light sleep and frequency switching", "[deepsleep]")
}
}
#if !(CONFIG_SPIRAM && CONFIG_IDF_TARGET_ESP32P4) // TODO: IDF-9569
static void do_deep_sleep(void)
{
esp_sleep_enable_timer_wakeup(100000);
@ -287,8 +289,9 @@ TEST_CASE_MULTIPLE_STAGES("enter deep sleep after abort", "[deepsleep][reset=abo
do_abort,
check_abort_reset_and_sleep,
check_sleep_reset);
#endif
#if SOC_RTC_FAST_MEM_SUPPORTED
#if ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
static RTC_DATA_ATTR uint32_t s_wake_stub_var;
static RTC_IRAM_ATTR void wake_stub(void)
@ -317,7 +320,6 @@ static void check_wake_stub(void)
TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub", "[deepsleep][reset=DEEPSLEEP_RESET]",
prepare_wake_stub,
check_wake_stub);
#endif // SOC_RTC_FAST_MEM_SUPPORTED
#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
@ -382,6 +384,7 @@ TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub from stack in RTC RAM", "[dee
check_wake_stub);
#endif // CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
#endif // ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
@ -404,7 +407,7 @@ __attribute__((unused)) static uint32_t get_cause(void)
return wakeup_cause;
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C6, ESP32H2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3) && SOC_PM_SUPPORT_EXT0_WAKEUP
// Fails on S2 IDF-2903
// This test case verifies deactivation of trigger for wake up sources
@ -575,4 +578,4 @@ static void check_time_deepsleep(void)
TEST_CASE_MULTIPLE_STAGES("check a time after wakeup from deep sleep", "[deepsleep][reset=DEEPSLEEP_RESET]", trigger_deepsleep, check_time_deepsleep);
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)
#endif // SOC_DEEP_SLEEP_SUPPORTED

1
components/freertos/test_apps/freertos/kernel/freertos_test_utils.c
View File

@ -68,6 +68,7 @@ void vTestOnAllCores(TestFunction_t pxTestCode, void * pvTestCodeArg, uint32_t u
vTaskDelete(xTaskHandles[ xCoreID ]);
}
vSemaphoreDelete(xTaskDoneSem);
vTaskDelay(10); // Short delay to allow task memory to be freed
}
#endif /* ( CONFIG_FREERTOS_NUMBER_OF_CORES > 1 ) */

52
components/hal/esp32p4/include/hal/lp_sys_ll.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -19,56 +19,6 @@
extern "C" {
#endif
/**
* @brief Get ext1 wakeup source status
* @return The lower 8 bits of the returned value are the bitmap of
* the wakeup source status, bit 0~7 corresponds to LP_IO 0~7
*/
static inline uint32_t lp_sys_ll_ext1_get_wakeup_status(void)
{
// TODO: IDF-7529
return 0;
}
/**
* @brief Clear the ext1 wakeup source status
*/
static inline void lp_sys_ll_ext1_clear_wakeup_status(void)
{
// TODO: IDF-7529
}
/**
* @brief Set the wake-up LP_IO of the ext1 wake-up source
* @param mask wakeup LP_IO bitmap, bit 0~7 corresponds to LP_IO 0~7
* @param mode 0: Wake the chip when all selected GPIOs go low
* 1: Wake the chip when any of the selected GPIOs go high
*/
static inline void lp_sys_ll_ext1_set_wakeup_pins(uint32_t mask, int mode)
{
// TODO: IDF-7529
}
/**
* @brief Clear all ext1 wakup-source setting
*/
static inline void lp_sys_ll_ext1_clear_wakeup_pins(void)
{
// TODO: IDF-7529
}
/**
* @brief Get ext1 wakeup source setting
* @return The lower 8 bits of the returned value are the bitmap of
* the wakeup source status, bit 0~7 corresponds to LP_IO 0~7
*/
static inline uint32_t lp_sys_ll_ext1_get_wakeup_pins(void)
{
// TODO: IDF-7529
return 0;
}
/**
* @brief ROM obtains the wake-up type through LP_SYS_STORE9_REG[0].
* Set the flag to inform

48
components/hal/esp32p4/include/hal/pmu_ll.h
View File

@ -649,6 +649,54 @@ FORCE_INLINE_ATTR void pmu_ll_set_dcdc_force_power_down(pmu_dev_t *hw, bool fpd)
hw->power.dcdc_switch.force_pd = fpd;
}
/**
* @brief Get ext1 wakeup source status
* @return The lower 8 bits of the returned value are the bitmap of
* the wakeup source status, bit 0~7 corresponds to LP_IO 0~7
*/
static inline uint32_t pmu_ll_ext1_get_wakeup_status(void)
{
return REG_GET_FIELD(PMU_EXT_WAKEUP_ST_REG, PMU_EXT_WAKEUP_STATUS);
}
/**
* @brief Clear the ext1 wakeup source status
*/
static inline void pmu_ll_ext1_clear_wakeup_status(void)
{
REG_SET_BIT(PMU_EXT_WAKEUP_CNTL_REG, PMU_EXT_WAKEUP_STATUS_CLR);
}
/**
* @brief Set the wake-up LP_IO of the ext1 wake-up source
* @param io_mask wakeup LP_IO bitmap, bit 0~7 corresponds to LP_IO 0~7
* @param level_mask 0: Wake the chip when all selected GPIOs go low
* 1: Wake the chip when any of the selected GPIOs go high
*/
static inline void pmu_ll_ext1_set_wakeup_pins(uint32_t io_mask, int level_mask)
{
REG_SET_FIELD(PMU_EXT_WAKEUP_SEL_REG, PMU_EXT_WAKEUP_SEL, io_mask);
REG_SET_FIELD(PMU_EXT_WAKEUP_LV_REG, PMU_EXT_WAKEUP_LV, level_mask);
}
/**
* @brief Clear all ext1 wakup-source setting
*/
static inline void pmu_ll_ext1_clear_wakeup_pins(void)
{
REG_SET_FIELD(PMU_EXT_WAKEUP_SEL_REG, PMU_EXT_WAKEUP_SEL, 0);
}
/**
* @brief Get ext1 wakeup source setting
* @return The lower 8 bits of the returned value are the bitmap of
* the wakeup source status, bit 0~7 corresponds to LP_IO 0~7
*/
static inline uint32_t pmu_ll_ext1_get_wakeup_pins(void)
{
return REG_GET_FIELD(PMU_EXT_WAKEUP_SEL_REG, PMU_EXT_WAKEUP_SEL);
}
#ifdef __cplusplus
}
#endif

10
components/hal/include/hal/rtc_hal.h
View File

@ -24,6 +24,10 @@
#include "hal/lp_aon_ll.h"
#endif
#if SOC_PM_EXT1_WAKEUP_BY_PMU
#include "hal/pmu_ll.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
@ -65,6 +69,12 @@ typedef struct rtc_cntl_sleep_retent {
#define rtc_hal_ext1_set_wakeup_pins(io_mask, mode_mask) lp_aon_ll_ext1_set_wakeup_pins(io_mask, mode_mask)
#define rtc_hal_ext1_clear_wakeup_pins() lp_aon_ll_ext1_clear_wakeup_pins()
#define rtc_hal_ext1_get_wakeup_pins() lp_aon_ll_ext1_get_wakeup_pins()
#elif SOC_PM_EXT1_WAKEUP_BY_PMU
#define rtc_hal_ext1_get_wakeup_status() pmu_ll_ext1_get_wakeup_status()
#define rtc_hal_ext1_clear_wakeup_status() pmu_ll_ext1_clear_wakeup_status()
#define rtc_hal_ext1_set_wakeup_pins(io_mask, mode_mask) pmu_ll_ext1_set_wakeup_pins(io_mask, mode_mask)
#define rtc_hal_ext1_clear_wakeup_pins() pmu_ll_ext1_clear_wakeup_pins()
#define rtc_hal_ext1_get_wakeup_pins() pmu_ll_ext1_get_wakeup_pins()
#else
#define rtc_hal_ext1_get_wakeup_status() rtc_cntl_ll_ext1_get_wakeup_status()
#define rtc_hal_ext1_clear_wakeup_status() rtc_cntl_ll_ext1_clear_wakeup_status()

2
components/idf_test/include/esp32p4/idf_performance_target.h
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@ -9,4 +9,4 @@
#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_UNICORE 150
/* Solicited yields (portYIELD() or taskYIELD()) take longer on esp32p4. TODO: IDF-2809 */
#define IDF_PERFORMANCE_MAX_SCHEDULING_TIME 2900
#define IDF_PERFORMANCE_MAX_SCHEDULING_TIME 3200

16
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
View File

@ -239,6 +239,10 @@ config SOC_LIGHT_SLEEP_SUPPORTED
bool
default y
config SOC_DEEP_SLEEP_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_40M
bool
default y
@ -1367,6 +1371,18 @@ config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
int
default 12
config SOC_PM_SUPPORT_EXT1_WAKEUP
bool
default y
config SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN
bool
default y
config SOC_PM_EXT1_WAKEUP_BY_PMU
bool
default y
config SOC_PM_SUPPORT_WIFI_WAKEUP
bool
default y

2
components/soc/esp32p4/include/soc/reset_reasons.h
View File

@ -29,7 +29,7 @@ extern "C" {
typedef enum {
RESET_REASON_CHIP_POWER_ON = 0x01, // Power on reset
RESET_REASON_CORE_SW = 0x03, // Software resets the digital core
RESET_REASON_CORE_DEEP_SLEEP = 0x05, // Deep sleep reset the digital core, check when doing sleep bringup TODO IDF-7529
RESET_REASON_CORE_DEEP_SLEEP = 0x05, // Deep sleep reset the digital core, check when doing sleep bringup
RESET_REASON_CORE_PMU_PWR_DOWN = 0x05, // PMU HP power down core reset
RESET_REASON_CORE_MWDT = 0x07, // MWDT core reset
RESET_REASON_CORE_RWDT = 0x09, // RWDT core reset

5
components/soc/esp32p4/include/soc/soc_caps.h
View File

@ -89,7 +89,7 @@
#define SOC_GP_LDO_SUPPORTED 1 // General purpose LDO
// #define SOC_PPA_SUPPORTED 1 //TODO: IDF-6878
#define SOC_LIGHT_SLEEP_SUPPORTED 1
// #define SOC_DEEP_SLEEP_SUPPORTED 1 //TODO: IDF-7529
#define SOC_DEEP_SLEEP_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
@ -568,6 +568,9 @@
// TODO: IDF-5351 (Copy from esp32c3, need check)
/*-------------------------- Power Management CAPS ----------------------------*/
#define SOC_PM_SUPPORT_EXT1_WAKEUP (1)
#define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN (1) /*!<Supports one bit per pin to configue the EXT1 trigger level */
#define SOC_PM_EXT1_WAKEUP_BY_PMU (1)
#define SOC_PM_SUPPORT_WIFI_WAKEUP (1)
#define SOC_PM_SUPPORT_XTAL32K_PD (1)
#define SOC_PM_SUPPORT_RC32K_PD (1)

4
examples/system/deep_sleep/README.md
View File

@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
# Deep Sleep Example

2
examples/system/deep_sleep/pytest_deep_sleep.py
View File

@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import logging
import time
@ -21,6 +20,7 @@ CONFIGS = [
pytest.mark.esp32c3,
pytest.mark.esp32c6,
pytest.mark.esp32h2,
pytest.mark.esp32p4,
pytest.mark.esp32c2,
],
),