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fix(adc): workaround to fix adc continuous get less results on c3

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This commit is contained in:
gaoxu 2024-01-23 18:47:19 +08:00
parent d922d4178f
commit 5101e52a36
5 changed files with 42 additions and 7 deletions
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5
components/esp_adc/adc_continuous.c
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@ -393,6 +393,11 @@ esp_err_t adc_continuous_stop(adc_continuous_handle_t handle)
//stop ADC //stop ADC
adc_hal_digi_stop(&handle->hal); adc_hal_digi_stop(&handle->hal);
#if ADC_LL_WORKAROUND_CLEAR_EOF_COUNTER
periph_module_reset(PERIPH_SARADC_MODULE);
adc_hal_digi_clr_eof();
#endif
adc_hal_digi_deinit(&handle->hal); adc_hal_digi_deinit(&handle->hal);
if (handle->use_adc2) { if (handle->use_adc2) {

5
components/esp_adc/test_apps/adc/main/test_adc_driver.c
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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -142,8 +142,6 @@ TEST_CASE("ADC oneshot fast work with ISR", "[adc_oneshot]")
#define ADC_DRIVER_TEST_GET_DATA(p_data) ((p_data)->type2.data) #define ADC_DRIVER_TEST_GET_DATA(p_data) ((p_data)->type2.data)
#endif #endif
#if !CONFIG_IDF_TARGET_ESP32C3 //TODO: DIG-270
#define ADC_RESTART_TEST_SIZE 4096 #define ADC_RESTART_TEST_SIZE 4096
#define ADC_READ_TEST_COUNT 10 #define ADC_READ_TEST_COUNT 10
@ -191,7 +189,6 @@ TEST_CASE("ADC continuous test after restarting", "[adc_continuous]")
TEST_ESP_OK(adc_continuous_deinit(handle)); TEST_ESP_OK(adc_continuous_deinit(handle));
free(result); free(result);
} }
#endif //!CONFIG_IDF_TARGET_ESP32C3
#if SOC_ADC_DIG_IIR_FILTER_SUPPORTED #if SOC_ADC_DIG_IIR_FILTER_SUPPORTED
TEST_CASE("ADC filter exhausted allocation", "[adc_oneshot]") TEST_CASE("ADC filter exhausted allocation", "[adc_oneshot]")

9
components/hal/adc_hal.c
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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -358,3 +358,10 @@ void adc_hal_digi_stop(adc_hal_dma_ctx_t *hal)
//disconnect DMA and peripheral //disconnect DMA and peripheral
adc_ll_digi_dma_disable(); adc_ll_digi_dma_disable();
} }
#if ADC_LL_WORKAROUND_CLEAR_EOF_COUNTER
void adc_hal_digi_clr_eof(void)
{
adc_ll_digi_dma_clr_eof();
}
#endif

21
components/hal/esp32c3/include/hal/adc_ll.h
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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -56,6 +56,13 @@ extern "C" {
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 #define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
/**
* Workaround: on ESP32C3, the internal hardware counter that counts ADC samples will not be automatically cleared,
* and there is no dedicated register to manually clear it. (see section 3.2 of the errata document).
* Therefore, traverse from 0 to the value configured last time, so as to clear the ADC sample counter.
*/
#define ADC_LL_WORKAROUND_CLEAR_EOF_COUNTER (1)
/*--------------------------------------------------------------- /*---------------------------------------------------------------
PWDET (Power Detect) PWDET (Power Detect)
---------------------------------------------------------------*/ ---------------------------------------------------------------*/
@ -437,6 +444,18 @@ static inline void adc_ll_digi_dma_set_eof_num(uint32_t num)
HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.dma_conf, apb_adc_eof_num, num); HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.dma_conf, apb_adc_eof_num, num);
} }
/**
* Clear ADC sample counter of adc digital controller.
*/
static inline void adc_ll_digi_dma_clr_eof(void)
{
uint32_t eof_num = HAL_FORCE_READ_U32_REG_FIELD(APB_SARADC.dma_conf, apb_adc_eof_num);
for (int i = 0; i <= eof_num; i++)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.dma_conf, apb_adc_eof_num, i);
}
}
/** /**
* Enable output data to DMA from adc digital controller. * Enable output data to DMA from adc digital controller.
*/ */

9
components/hal/include/hal/adc_hal.h
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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -207,6 +207,13 @@ void adc_hal_digi_dis_intr(adc_hal_dma_ctx_t *hal, uint32_t mask);
*/ */
void adc_hal_digi_stop(adc_hal_dma_ctx_t *hal); void adc_hal_digi_stop(adc_hal_dma_ctx_t *hal);
#if ADC_LL_WORKAROUND_CLEAR_EOF_COUNTER
/**
* @brief Clear the ADC sample counter
*/
void adc_hal_digi_clr_eof(void);
#endif
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif