Merge branch 'support/esp_phy_init_refactor' into 'master'

feat(phy): Add modem type to phy init

Closes TZ-183, TZ-184, WIFI-6117, and WIFI-6204

See merge request espressif/esp-idf!25027
This commit is contained in:
Jiang Jiang Jian 2023-09-27 18:48:30 +08:00
commit 500d415da0
35 changed files with 302 additions and 82 deletions

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -938,7 +938,7 @@ static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
static void btdm_sleep_enter_phase2_wrapper(void)
{
if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#ifdef CONFIG_PM_ENABLE
if (s_pm_lock_acquired) {
esp_pm_lock_release(s_pm_lock);
@ -946,7 +946,7 @@ static void btdm_sleep_enter_phase2_wrapper(void)
}
#endif
} else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
// pause bluetooth baseband
periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
}
@ -962,7 +962,7 @@ static void btdm_sleep_exit_phase3_wrapper(void)
#endif
if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
btdm_check_and_init_bb();
#ifdef CONFIG_PM_ENABLE
esp_timer_stop(s_btdm_slp_tmr);
@ -970,7 +970,7 @@ static void btdm_sleep_exit_phase3_wrapper(void)
} else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
// resume bluetooth baseband
periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
}
}
@ -1642,7 +1642,7 @@ static void bt_shutdown(void)
#else
bt_controller_shutdown(NULL);
#endif
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
return;
}
@ -1668,7 +1668,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
esp_pm_lock_acquire(s_pm_lock);
#endif
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
#if CONFIG_SW_COEXIST_ENABLE
coex_enable();
@ -1688,7 +1688,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
#if CONFIG_SW_COEXIST_ENABLE
coex_disable();
#endif
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#ifdef CONFIG_PM_ENABLE
if (!s_btdm_allow_light_sleep) {
esp_pm_lock_release(s_light_sleep_pm_lock);
@ -1728,7 +1728,7 @@ esp_err_t esp_bt_controller_disable(void)
coex_disable();
#endif
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
esp_unregister_shutdown_handler(bt_shutdown);

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@ -240,7 +240,7 @@ struct ext_funcs_t ext_funcs_ro = {
._ecc_gen_key_pair = esp_ecc_gen_key_pair,
._ecc_gen_dh_key = esp_ecc_gen_dh_key,
._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
._esp_bt_track_pll_cap = bt_track_pll_cap,
._esp_bt_track_pll_cap = NULL,
.magic = EXT_FUNC_MAGIC_VALUE,
};
@ -465,7 +465,7 @@ IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
r_ble_rtc_wake_up_state_clr();
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
s_ble_active = false;
}
@ -474,7 +474,7 @@ IRAM_ATTR void controller_wakeup_cb(void *arg)
if (s_ble_active) {
return;
}
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
// need to check if need to call pm lock here
#ifdef CONFIG_PM_ENABLE
esp_pm_lock_acquire(s_pm_lock);
@ -750,7 +750,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
esp_pm_lock_acquire(s_pm_lock);
#endif // CONFIG_PM_ENABLE
// init phy
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
s_ble_active = true;
}
// init bb
@ -772,7 +772,7 @@ error:
coex_disable();
#endif
if (s_ble_active) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#if CONFIG_PM_ENABLE
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE
@ -792,7 +792,7 @@ esp_err_t esp_bt_controller_disable(void)
}
if (s_ble_active) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#if CONFIG_PM_ENABLE
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE

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@ -246,6 +246,7 @@ extern bool btdm_deep_sleep_mem_init(void);
extern void btdm_deep_sleep_mem_deinit(void);
extern void btdm_ble_power_down_dma_copy(bool copy);
extern uint8_t btdm_sleep_clock_sync(void);
extern void sdk_config_extend_set_pll_track(bool enable);
#if CONFIG_MAC_BB_PD
extern void esp_mac_bb_power_down(void);
@ -747,7 +748,7 @@ static void btdm_sleep_enter_phase2_wrapper(void)
{
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
if (s_lp_stat.phy_enabled) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
s_lp_stat.phy_enabled = 0;
} else {
assert(0);
@ -776,7 +777,7 @@ static void btdm_sleep_exit_phase3_wrapper(void)
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
if (s_lp_stat.phy_enabled == 0) {
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
s_lp_stat.phy_enabled = 1;
}
}
@ -1442,7 +1443,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
/* Enable PHY when enabling controller to reduce power dissipation after controller init
* Notice the init order: esp_phy_enable() -> bt_bb_v2_init_cmplx() -> coex_pti_v2()
*/
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
s_lp_stat.phy_enabled = 1;
#if CONFIG_SW_COEXIST_ENABLE
@ -1464,6 +1465,9 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
}
} while (0);
// Disable pll track by default in BLE controller on ESP32-C3 and ESP32-S3
sdk_config_extend_set_pll_track(false);
if (btdm_controller_enable(mode) != 0) {
ret = ESP_ERR_INVALID_STATE;
goto error;
@ -1494,7 +1498,7 @@ error:
coex_disable();
#endif
if (s_lp_stat.phy_enabled) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
s_lp_stat.phy_enabled = 0;
}
return ret;
@ -1516,7 +1520,7 @@ esp_err_t esp_bt_controller_disable(void)
coex_disable();
#endif
if (s_lp_stat.phy_enabled) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
s_lp_stat.phy_enabled = 0;
}

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@ -487,7 +487,7 @@ IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
sleep_retention_do_extra_retention(true);
#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#ifdef CONFIG_PM_ENABLE
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE
@ -506,7 +506,7 @@ IRAM_ATTR void controller_wakeup_cb(void *arg)
sleep_retention_do_extra_retention(false);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG */
#endif //CONFIG_PM_ENABLE
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
s_ble_active = true;
}
@ -888,7 +888,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
#if CONFIG_PM_ENABLE
esp_pm_lock_acquire(s_pm_lock);
#endif // CONFIG_PM_ENABLE
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
esp_btbb_enable();
s_ble_active = true;
}
@ -909,7 +909,7 @@ error:
#endif
if (s_ble_active) {
esp_btbb_disable();
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#if CONFIG_PM_ENABLE
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE
@ -932,7 +932,7 @@ esp_err_t esp_bt_controller_disable(void)
#endif
if (s_ble_active) {
esp_btbb_disable();
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#if CONFIG_PM_ENABLE
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE

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@ -473,7 +473,7 @@ IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
r_ble_rtc_wake_up_state_clr();
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#ifdef CONFIG_PM_ENABLE
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE
@ -489,7 +489,7 @@ IRAM_ATTR void controller_wakeup_cb(void *arg)
esp_pm_lock_acquire(s_pm_lock);
r_ble_rtc_wake_up_state_clr();
#endif //CONFIG_PM_ENABLE
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
s_ble_active = true;
}
@ -867,7 +867,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
#if CONFIG_PM_ENABLE
esp_pm_lock_acquire(s_pm_lock);
#endif // CONFIG_PM_ENABLE
esp_phy_enable();
esp_phy_enable(PHY_MODEM_BT);
s_ble_active = true;
}
esp_btbb_enable();
@ -888,7 +888,7 @@ error:
#endif
esp_btbb_disable();
if (s_ble_active) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#if CONFIG_PM_ENABLE
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE
@ -911,7 +911,7 @@ esp_err_t esp_bt_controller_disable(void)
#endif
esp_btbb_disable();
if (s_ble_active) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_BT);
#if CONFIG_PM_ENABLE
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -26,6 +26,15 @@ typedef struct {
uint8_t params[128]; /*!< opaque PHY initialization parameters */
} esp_phy_init_data_t;
/**
* @brief PHY enable or disable modem
*/
typedef enum {
PHY_MODEM_WIFI = 1, /*!< PHY modem WIFI */
PHY_MODEM_BT = 2, /*!< PHY modem BT */
PHY_MODEM_IEEE802154 = 4, /*!< PHY modem IEEE802154 */
} esp_phy_modem_t;
/**
* @brief Opaque PHY calibration data
*/
@ -144,8 +153,9 @@ esp_err_t esp_phy_erase_cal_data_in_nvs(void);
* Now PHY and RF enabling job is done automatically when start WiFi or BT. Users should not
* call this API in their application.
*
* @param modem the modem to call the phy enable.
*/
void esp_phy_enable(void);
void esp_phy_enable(esp_phy_modem_t modem);
/**
* @brief Disable PHY and RF module
@ -154,8 +164,9 @@ void esp_phy_enable(void);
* Now PHY and RF disabling job is done automatically when stop WiFi or BT. Users should not
* call this API in their application.
*
* @param modem the modem to call the phy disable.
*/
void esp_phy_disable(void);
void esp_phy_disable(esp_phy_modem_t modem);
/**
* @brief Enable BTBB module
@ -259,16 +270,17 @@ esp_err_t esp_phy_apply_phy_init_data(uint8_t *init_data);
char * get_phy_version_str(void);
/**
* @brief Enable phy track pll
*
* @brief Set PHY init parameters
* @param param is 1 means combo module
*/
void phy_track_pll_init(void);
void phy_init_param_set(uint8_t param);
/**
* @brief Disable phy track pll
*
* @brief Wi-Fi RX enable
* @param enable True for enable wifi receiving mode as default, false for closing wifi receiving mode as default.
*/
void phy_track_pll_deinit(void);
void phy_wifi_enable_set(uint8_t enable);
#ifdef __cplusplus
}
#endif

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -140,6 +140,34 @@ void phy_eco_version_sel(uint8_t chip_ver);
void phy_improve_rx_special(bool enable);
#endif
/**
* @brief Enable phy track pll
*
*/
void phy_track_pll_init(void);
/**
* @brief Disable phy track pll
*
*/
void phy_track_pll_deinit(void);
/**
* @brief Set the flag recorded which modem has already enabled phy
*
*/
void phy_set_modem_flag(esp_phy_modem_t modem);
/**
* @brief Clear the flag to record which modem calls phy disenable
*/
void phy_clr_modem_flag(esp_phy_modem_t modem);
/**
* @brief Get the flag recorded which modem has already enabled phy
*
*/
esp_phy_modem_t phy_get_modem_flag(void);
#ifdef __cplusplus
}
#endif

@ -1 +1 @@
Subproject commit 95c370089907f74805eac72975b0e85c62e175ed
Subproject commit f1d9b9b5cb63dac81b9027f50f7a46b1d840ce5c

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@ -5,20 +5,46 @@
*/
#include "esp_timer.h"
#include "esp_phy_init.h"
#include <stdint.h>
static volatile uint16_t s_phy_modem_flag = 0;
extern void bt_track_pll_cap(void);
extern void phy_param_track_tot(bool en_wifi, bool en_ble_154);
static esp_timer_handle_t phy_track_pll_timer;
static volatile int64_t s_previous_timestamp;
#if CONFIG_WIFI_ENABLED
static volatile int64_t s_wifi_prev_timestamp;
#endif
#if CONFIG_IEEE802154_ENABLED || CONFIG_BT_ENABLED
static volatile int64_t s_bt_154_prev_timestamp;
#endif
#define PHY_TRACK_PLL_PERIOD_IN_US 1000000
#if CONFIG_IEEE802154_ENABLED || CONFIG_BT_ENABLED || CONFIG_WIFI_ENABLED
bool phy_enabled_modem_contains(esp_phy_modem_t modem)
{
return (s_phy_modem_flag & modem) != 0;
}
#endif
static void phy_track_pll_timer_callback(void* arg)
{
#if CONFIG_IEEE802154_ENABLED || CONFIG_BT_ENABLED
bt_track_pll_cap();
bool wifi_track_pll = false;
bool ble_154_track_pll = false;
#if CONFIG_WIFI_ENABLED
if (phy_enabled_modem_contains(PHY_MODEM_WIFI)) {
wifi_track_pll = true;
s_wifi_prev_timestamp = esp_timer_get_time();
}
#endif
s_previous_timestamp = esp_timer_get_time();
#if CONFIG_IEEE802154_ENABLED || CONFIG_BT_ENABLED
if (phy_enabled_modem_contains(PHY_MODEM_BT | PHY_MODEM_IEEE802154)) {
ble_154_track_pll = true;
s_bt_154_prev_timestamp = esp_timer_get_time();
}
#endif
phy_param_track_tot(wifi_track_pll, ble_154_track_pll);
}
void phy_track_pll_init(void)
@ -26,8 +52,14 @@ void phy_track_pll_init(void)
// Light sleep scenario: enabling and disabling PHY frequently, the timer will not get triggered.
// Using a variable to record the previously tracked time when PLL was last called.
// If the duration is larger than PHY_TRACK_PLL_PERIOD_IN_US, then track PLL.
int64_t now = esp_timer_get_time();
if (now - s_previous_timestamp > PHY_TRACK_PLL_PERIOD_IN_US) {
bool need_track_pll = false;
#if CONFIG_WIFI_ENABLED
need_track_pll = need_track_pll || ((esp_timer_get_time() - s_wifi_prev_timestamp) > PHY_TRACK_PLL_PERIOD_IN_US);
#endif
#if CONFIG_IEEE802154_ENABLED || CONFIG_BT_ENABLED
need_track_pll = need_track_pll || ((esp_timer_get_time() - s_bt_154_prev_timestamp) > PHY_TRACK_PLL_PERIOD_IN_US);
#endif
if (need_track_pll) {
phy_track_pll_timer_callback((void* )0);
}
@ -44,3 +76,18 @@ void phy_track_pll_deinit(void)
ESP_ERROR_CHECK(esp_timer_stop(phy_track_pll_timer));
ESP_ERROR_CHECK(esp_timer_delete(phy_track_pll_timer));
}
void phy_set_modem_flag(esp_phy_modem_t modem)
{
s_phy_modem_flag |= modem;
}
void phy_clr_modem_flag(esp_phy_modem_t modem)
{
s_phy_modem_flag &= ~modem;
}
esp_phy_modem_t phy_get_modem_flag(void)
{
return s_phy_modem_flag;
}

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@ -66,9 +66,6 @@ static DRAM_ATTR struct {
#endif // !SOC_PMU_SUPPORTED
#endif // SOC_PM_SUPPORT_MODEM_PD || SOC_PM_SUPPORT_WIFI_PD
/* Reference count of enabling PHY */
static uint8_t s_phy_access_ref = 0;
#if CONFIG_IDF_TARGET_ESP32
/* time stamp updated when the PHY/RF is turned on */
static int64_t s_phy_rf_en_ts = 0;
@ -233,11 +230,10 @@ static inline void phy_digital_regs_load(void)
}
#endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
void esp_phy_enable(void)
void esp_phy_enable(esp_phy_modem_t modem)
{
_lock_acquire(&s_phy_access_lock);
if (s_phy_access_ref == 0) {
if (phy_get_modem_flag() == 0) {
#if CONFIG_IDF_TARGET_ESP32
// Update time stamp
s_phy_rf_en_ts = esp_timer_get_time();
@ -275,18 +271,27 @@ void esp_phy_enable(void)
#if CONFIG_IDF_TARGET_ESP32
coex_bt_high_prio();
#endif
// ESP32 will track pll in the wifi/BT modem interrupt handler.
#if !CONFIG_IDF_TARGET_ESP32
phy_track_pll_init();
#endif
}
s_phy_access_ref++;
phy_set_modem_flag(modem);
_lock_release(&s_phy_access_lock);
}
void esp_phy_disable(void)
void esp_phy_disable(esp_phy_modem_t modem)
{
_lock_acquire(&s_phy_access_lock);
s_phy_access_ref--;
if (s_phy_access_ref == 0) {
phy_clr_modem_flag(modem);
if (phy_get_modem_flag() == 0) {
// ESP32 will track pll in the wifi/BT modem interrupt handler.
#if !CONFIG_IDF_TARGET_ESP32
phy_track_pll_deinit();
#endif
#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
phy_digital_regs_store();
#endif
@ -310,7 +315,6 @@ void esp_phy_disable(void)
// Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG
esp_phy_common_clock_disable();
}
_lock_release(&s_phy_access_lock);
}
@ -769,6 +773,13 @@ void esp_phy_load_cal_and_init(void)
#if CONFIG_IDF_TARGET_ESP32S2
phy_eco_version_sel(efuse_hal_chip_revision() / 100);
#endif
// Set PHY whether in combo module
// For comode mode, phy enable will be not in WiFi RX state
#if SOC_PHY_COMBO_MODULE
phy_init_param_set(1);
#endif
esp_phy_calibration_data_t* cal_data =
(esp_phy_calibration_data_t*) calloc(sizeof(esp_phy_calibration_data_t), 1);
if (cal_data == NULL) {

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@ -46,9 +46,10 @@ void IRAM_ATTR phy_exit_critical(uint32_t level)
}
}
void esp_phy_enable(void)
void esp_phy_enable(esp_phy_modem_t modem)
{
_lock_acquire(&s_phy_access_lock);
phy_set_modem_flag(modem);
if (s_phy_access_ref == 0) {
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_enable(PERIPH_PHY_MODULE);
@ -68,7 +69,7 @@ void esp_phy_enable(void)
_lock_release(&s_phy_access_lock);
}
void esp_phy_disable(void)
void esp_phy_disable(esp_phy_modem_t modem)
{
_lock_acquire(&s_phy_access_lock);
@ -85,5 +86,6 @@ void esp_phy_disable(void)
#endif
}
phy_clr_modem_flag(modem);
_lock_release(&s_phy_access_lock);
}

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@ -46,9 +46,15 @@ static void test_phy_rtc_init(void)
ret = nvs_flash_init();
}
TEST_ESP_OK(ret);
esp_phy_enable();
#if CONFIG_WIFI_ENABLED
esp_phy_enable(PHY_MODEM_WIFI);
#endif
#if CONFIG_BT_ENABLED
esp_phy_enable(PHY_MODEM_BT);
#endif
#if CONFIG_IEEE802154_ENABLED
esp_phy_enable(PHY_MODEM_IEEE802154);
#endif
//must run here, not blocking in above code
TEST_ASSERT(1);
nvs_flash_deinit();

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@ -1665,7 +1665,7 @@ lmacProcessTxTimeout = 0x40001d78;
lmacProcessCollision = 0x40001d80;
lmacProcessTxRtsError = 0x40001d84;
lmacProcessCtsTimeout = 0x40001d88;
lmacProcessTxComplete = 0x40001d8c;
/* lmacProcessTxComplete = 0x40001d8c;*/
lmacProcessAckTimeout = 0x40001d90;
lmacProcessTxError = 0x40001d94;
lmacProcessTxseckiderr = 0x40001d98;

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@ -547,6 +547,18 @@ static void IRAM_ATTR esp_empty_wrapper(void)
}
static void esp_phy_enable_wrapper(void)
{
esp_phy_enable(PHY_MODEM_WIFI);
phy_wifi_enable_set(1);
}
static void esp_phy_disable_wrapper(void)
{
phy_wifi_enable_set(0);
esp_phy_disable(PHY_MODEM_WIFI);
}
wifi_osi_funcs_t g_wifi_osi_funcs = {
._version = ESP_WIFI_OS_ADAPTER_VERSION,
._env_is_chip = esp_coex_common_env_is_chip_wrapper,
@ -600,8 +612,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._dport_access_stall_other_cpu_end_wrap = s_esp_dport_access_stall_other_cpu_end,
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
._phy_disable = esp_phy_disable,
._phy_enable = esp_phy_enable,
._phy_disable = esp_phy_disable_wrapper,
._phy_enable = esp_phy_enable_wrapper,
._phy_common_clock_enable = esp_phy_common_clock_enable,
._phy_common_clock_disable = esp_phy_common_clock_disable,
._phy_update_country_info = esp_phy_update_country_info,

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@ -517,6 +517,18 @@ static void IRAM_ATTR esp_empty_wrapper(void)
}
static void esp_phy_enable_wrapper(void)
{
esp_phy_enable(PHY_MODEM_WIFI);
phy_wifi_enable_set(1);
}
static void esp_phy_disable_wrapper(void)
{
phy_wifi_enable_set(0);
esp_phy_disable(PHY_MODEM_WIFI);
}
wifi_osi_funcs_t g_wifi_osi_funcs = {
._version = ESP_WIFI_OS_ADAPTER_VERSION,
._env_is_chip = esp_coex_common_env_is_chip_wrapper,
@ -570,8 +582,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper,
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
._phy_disable = esp_phy_disable,
._phy_enable = esp_phy_enable,
._phy_disable = esp_phy_disable_wrapper,
._phy_enable = esp_phy_enable_wrapper,
._phy_update_country_info = esp_phy_update_country_info,
._read_mac = esp_read_mac_wrapper,
._timer_arm = timer_arm_wrapper,

View File

@ -534,6 +534,18 @@ static void IRAM_ATTR esp_empty_wrapper(void)
}
static void esp_phy_enable_wrapper(void)
{
esp_phy_enable(PHY_MODEM_WIFI);
phy_wifi_enable_set(1);
}
static void esp_phy_disable_wrapper(void)
{
phy_wifi_enable_set(0);
esp_phy_disable(PHY_MODEM_WIFI);
}
wifi_osi_funcs_t g_wifi_osi_funcs = {
._version = ESP_WIFI_OS_ADAPTER_VERSION,
._env_is_chip = esp_coex_common_env_is_chip_wrapper,
@ -587,8 +599,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper,
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
._phy_disable = esp_phy_disable,
._phy_enable = esp_phy_enable,
._phy_disable = esp_phy_disable_wrapper,
._phy_enable = esp_phy_enable_wrapper,
._phy_update_country_info = esp_phy_update_country_info,
._read_mac = esp_read_mac_wrapper,
._timer_arm = timer_arm_wrapper,

View File

@ -523,6 +523,18 @@ static void IRAM_ATTR esp_empty_wrapper(void)
}
static void esp_phy_enable_wrapper(void)
{
esp_phy_enable(PHY_MODEM_WIFI);
phy_wifi_enable_set(1);
}
static void esp_phy_disable_wrapper(void)
{
phy_wifi_enable_set(0);
esp_phy_disable(PHY_MODEM_WIFI);
}
wifi_osi_funcs_t g_wifi_osi_funcs = {
._version = ESP_WIFI_OS_ADAPTER_VERSION,
._env_is_chip = esp_coex_common_env_is_chip_wrapper,
@ -576,8 +588,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper,
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
._phy_disable = esp_phy_disable,
._phy_enable = esp_phy_enable,
._phy_disable = esp_phy_disable_wrapper,
._phy_enable = esp_phy_enable_wrapper,
._phy_update_country_info = esp_phy_update_country_info,
._read_mac = esp_read_mac_wrapper,
._timer_arm = timer_arm_wrapper,

View File

@ -542,6 +542,16 @@ static void IRAM_ATTR esp_empty_wrapper(void)
}
static void esp_phy_enable_wrapper(void)
{
esp_phy_enable(PHY_MODEM_WIFI);
}
static void esp_phy_disable_wrapper(void)
{
esp_phy_disable(PHY_MODEM_WIFI);
}
wifi_osi_funcs_t g_wifi_osi_funcs = {
._version = ESP_WIFI_OS_ADAPTER_VERSION,
._env_is_chip = esp_coex_common_env_is_chip_wrapper,
@ -595,8 +605,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper,
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
._phy_disable = esp_phy_disable,
._phy_enable = esp_phy_enable,
._phy_disable = esp_phy_disable_wrapper,
._phy_enable = esp_phy_enable_wrapper,
._phy_common_clock_enable = esp_phy_common_clock_enable,
._phy_common_clock_disable = esp_phy_common_clock_disable,
._phy_update_country_info = esp_phy_update_country_info,

View File

@ -559,6 +559,19 @@ static void IRAM_ATTR esp_empty_wrapper(void)
}
static void esp_phy_enable_wrapper(void)
{
esp_phy_enable(PHY_MODEM_WIFI);
phy_wifi_enable_set(1);
}
static void esp_phy_disable_wrapper(void)
{
phy_wifi_enable_set(0);
esp_phy_disable(PHY_MODEM_WIFI);
}
wifi_osi_funcs_t g_wifi_osi_funcs = {
._version = ESP_WIFI_OS_ADAPTER_VERSION,
._env_is_chip = esp_coex_common_env_is_chip_wrapper,
@ -612,8 +625,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper,
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
._phy_disable = esp_phy_disable,
._phy_enable = esp_phy_enable,
._phy_disable = esp_phy_disable_wrapper,
._phy_enable = esp_phy_enable_wrapper,
._phy_update_country_info = esp_phy_update_country_info,
._read_mac = esp_read_mac,
._timer_arm = timer_arm_wrapper,

@ -1 +1 @@
Subproject commit 7759f9bdf087eb7fb31e4a612b4d310633fb4dcb
Subproject commit 174341fbe17d6527f25a1c4e936323b6f3e691e2

View File

@ -796,7 +796,7 @@ IRAM_ATTR static void ieee802154_rf_disable(void)
{
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
if (s_rf_closed == false) {
esp_phy_disable();
esp_phy_disable(PHY_MODEM_IEEE802154);
s_rf_closed = true;
}
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
@ -806,7 +806,7 @@ IRAM_ATTR static void ieee802154_rf_enable(void)
{
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
if (s_rf_closed) {
esp_phy_enable();
esp_phy_enable(PHY_MODEM_IEEE802154);
s_rf_closed = false;
}
#endif //CONFIG_FREERTOS_USE_TICKLESS_IDLE

View File

@ -22,7 +22,7 @@
esp_err_t esp_ieee802154_enable(void)
{
ieee802154_enable();
esp_phy_enable();
esp_phy_enable(PHY_MODEM_IEEE802154);
esp_btbb_enable();
return ieee802154_mac_init();
}

View File

@ -31,7 +31,6 @@ static void initialize_nvs(void)
void app_main(void)
{
esp_ieee802154_enable();
esp_phy_enable();
esp_console_repl_t *repl = NULL;
esp_console_repl_config_t repl_config = ESP_CONSOLE_REPL_CONFIG_DEFAULT();
/* Prompt to be printed before each line.

View File

@ -894,3 +894,7 @@ config SOC_BLUFI_SUPPORTED
config SOC_ULP_HAS_ADC
bool
default y
config SOC_PHY_COMBO_MODULE
bool
default y

View File

@ -435,3 +435,6 @@
/*-------------------------- ULP CAPS ----------------------------------------*/
#define SOC_ULP_HAS_ADC (1) /* ADC can be accessed from ULP */
/*------------------------------------- PHY CAPS -------------------------------------*/
#define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi, BT and BLE*/

View File

@ -710,3 +710,7 @@ config SOC_BLUFI_SUPPORTED
config SOC_PHY_IMPROVE_RX_11B
bool
default y
config SOC_PHY_COMBO_MODULE
bool
default y

View File

@ -330,3 +330,4 @@
/*------------------------------------- PHY CAPS -------------------------------------*/
#define SOC_PHY_IMPROVE_RX_11B (1)
#define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi and BLE*/

View File

@ -1026,3 +1026,7 @@ config SOC_BLE_DEVICE_PRIVACY_SUPPORTED
config SOC_BLUFI_SUPPORTED
bool
default y
config SOC_PHY_COMBO_MODULE
bool
default y

View File

@ -442,3 +442,6 @@
#define SOC_BLE_50_SUPPORTED (1) /*!< Support Bluetooth 5.0 */
#define SOC_BLE_DEVICE_PRIVACY_SUPPORTED (1) /*!< Support BLE device privacy mode */
#define SOC_BLUFI_SUPPORTED (1) /*!< Support BLUFI */
/*------------------------------------- PHY CAPS -------------------------------------*/
#define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi and BLE*/

View File

@ -1346,3 +1346,7 @@ config SOC_BLE_MULTI_CONN_OPTIMIZATION
config SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND
bool
default y
config SOC_PHY_COMBO_MODULE
bool
default y

View File

@ -550,3 +550,6 @@
#define SOC_BLE_MULTI_CONN_OPTIMIZATION (1) /*!< Support multiple connections optimization */
#define SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND (1)
/*------------------------------------- PHY CAPS -------------------------------------*/
#define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi, BLE and 15.4*/

View File

@ -1114,3 +1114,7 @@ config SOC_WIFI_NAN_SUPPORT
config SOC_ULP_HAS_ADC
bool
default y
config SOC_PHY_COMBO_MODULE
bool
default n

View File

@ -480,3 +480,6 @@
#define SOC_WIFI_NAN_SUPPORT (1) /*!< Support WIFI Aware (NAN) */
/*-------------------------- ULP CAPS ----------------------------------------*/
#define SOC_ULP_HAS_ADC (1) /* ADC can be accessed from ULP */
/*------------------------------------- PHY CAPS -------------------------------------*/
#define SOC_PHY_COMBO_MODULE (0) /*!< Only support Wi-Fi*/

View File

@ -1322,3 +1322,7 @@ config SOC_BLUFI_SUPPORTED
config SOC_ULP_HAS_ADC
bool
default y
config SOC_PHY_COMBO_MODULE
bool
default y

View File

@ -532,3 +532,6 @@
/*-------------------------- ULP CAPS ----------------------------------------*/
#define SOC_ULP_HAS_ADC (1) /* ADC can be accessed from ULP */
/*------------------------------------- PHY CAPS -------------------------------------*/
#define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi and BLE*/