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Merge branch 'bugfix/fix_incorrect_regbase_name_of_i2s' into 'master'

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fix(i2s): fixed incorrect reg base name on C3

Closes IDFGH-11518

See merge request espressif/esp-idf!28421
This commit is contained in:
Kevin (Lao Kaiyao) 2024-01-16 19:37:28 +08:00
commit 4f506a30df
4 changed files with 4 additions and 4 deletions
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2
components/soc/esp32c3/include/soc/reg_base.h
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@ -41,7 +41,7 @@
#define DR_REG_SYSCON_BASE 0x60026000
#define DR_REG_APB_CTRL_BASE 0x60026000 /* Old name for SYSCON, to be removed */
#define DR_REG_TWAI_BASE 0x6002B000
#define DR_REG_I2S0_BASE 0x6002D000
#define DR_REG_I2S_BASE 0x6002D000
#define DR_REG_APB_SARADC_BASE 0x60040000
#define DR_REG_USB_SERIAL_JTAG_BASE 0x60043000
#define DR_REG_XTS_AES_BASE 0x600CC000

2
components/soc/esp32c3/include/soc/soc.h
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@ -20,7 +20,7 @@
#define REG_UART_BASE(i) (DR_REG_UART_BASE + (i) * 0x10000)
#define REG_UART_AHB_BASE(i) (0x60000000 + (i) * 0x10000)
#define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0)
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1E000)
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE) // only one I2S on C3
#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE - (i) * 0x1000)
#define REG_SPI_BASE(i) (((i)==2) ? (DR_REG_SPI2_BASE) : (0)) // only one GPSPI

2
components/soc/esp32h2/include/soc/soc.h
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@ -20,7 +20,7 @@
#define REG_UART_BASE(i) (DR_REG_UART_BASE + (i) * 0x1000)
#define REG_UART_AHB_BASE(i) (0x60000000 + (i) * 0x10000)
#define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0)
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1E000)
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE) // only one I2S on H2
#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE + (i) * 0x1000)
#define REG_SPI_BASE(i) (((i)==2) ? (DR_REG_SPI2_BASE) : (0)) // only one GPSPI

2
components/soc/esp32p4/include/soc/soc.h
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@ -19,7 +19,7 @@
#define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE) // only one UHCI on C6
#define REG_UART_BASE(i) (DR_REG_UART_BASE + (i) * 0x1000) // UART0 and UART1
#define UART_FIFO_AHB_REG(i) (REG_UART_BASE(i) + 0x0)
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1000) // only one I2S on C6
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1000)
#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i) * 0x1000) // TIMERG0 and TIMERG1
#define REG_SPI_MEM_BASE(i) (DR_REG_FLASH_SPI0_BASE + (i) * 0x1000) // SPIMEM0 and SPIMEM1
#define REG_SPI_BASE(i) (((i)>=2) ? (DR_REG_SPI2_BASE + (i-2) * 0x1000) : (0)) // GPSPI2 and GPSPI3