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Merge branch 'bugfix/fix_adc_continuous_do_not_rst_apb_clk' into 'master'
fix(adc): fix adc continuous get less results beacuse do not reset apb clk Closes IDF-8414 See merge request espressif/esp-idf!27115
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commit
4e843a1a70
@ -359,6 +359,9 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle)
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ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_STATE, ADC_TAG, "The driver isn't initialised");
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ESP_RETURN_ON_FALSE(handle->fsm == ADC_FSM_INIT, ESP_ERR_INVALID_STATE, ADC_TAG, "ADC continuous mode isn't in the init state, it's started already");
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//reset ADC digital part to reset ADC sampling EOF counter
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periph_module_reset(PERIPH_SARADC_MODULE);
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if (handle->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(handle->pm_lock), ADC_TAG, "acquire pm_lock failed");
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}
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@ -264,6 +264,57 @@ TEST_CASE("ADC continuous flush internal pool", "[adc_continuous][mannual][ignor
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TEST_ESP_OK(adc_continuous_deinit(handle));
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}
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#if !CONFIG_IDF_TARGET_ESP32C3 //TODO: DIG-270
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#define ADC_RESTART_TEST_SIZE 4096
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#define ADC_READ_TEST_COUNT 10
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TEST_CASE("ADC continuous test after restarting", "[adc_continuous]")
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{
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adc_continuous_handle_t handle = NULL;
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adc_continuous_handle_cfg_t adc_config = {
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.max_store_buf_size = ADC_RESTART_TEST_SIZE,
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.conv_frame_size = ADC_RESTART_TEST_SIZE,
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};
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TEST_ESP_OK(adc_continuous_new_handle(&adc_config, &handle));
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adc_continuous_config_t dig_cfg = {
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.sample_freq_hz = 50 * 1000,
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.conv_mode = ADC_CONV_SINGLE_UNIT_1,
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.format = ADC_DRIVER_TEST_OUTPUT_TYPE,
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};
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adc_digi_pattern_config_t adc_pattern[SOC_ADC_PATT_LEN_MAX] = {0};
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adc_pattern[0].atten = ADC_ATTEN_DB_12;
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adc_pattern[0].channel = ADC1_TEST_CHAN0;
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adc_pattern[0].unit = ADC_UNIT_1;
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adc_pattern[0].bit_width = SOC_ADC_DIGI_MAX_BITWIDTH;
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dig_cfg.adc_pattern = adc_pattern;
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dig_cfg.pattern_num = 1;
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TEST_ESP_OK(adc_continuous_config(handle, &dig_cfg));
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uint8_t* result = malloc(ADC_RESTART_TEST_SIZE);
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TEST_ASSERT(result);
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test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0);
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for (int i = 0; i < ADC_READ_TEST_COUNT; i++) {
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uint32_t ret_num = 0;
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TEST_ESP_OK(adc_continuous_start(handle));
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TEST_ESP_OK(adc_continuous_read(handle, result, ADC_RESTART_TEST_SIZE, &ret_num, ADC_MAX_DELAY));
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TEST_ASSERT_EQUAL(ADC_RESTART_TEST_SIZE, ret_num);
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for (int i = 0; i < ret_num; i += SOC_ADC_DIGI_RESULT_BYTES) {
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adc_digi_output_data_t *p = (void*)&result[i];
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uint32_t chan_num = ADC_DRIVER_TEST_GET_CHANNEL(p);
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TEST_ASSERT(chan_num < SOC_ADC_CHANNEL_NUM(ADC_UNIT_1));
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}
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TEST_ESP_OK(adc_continuous_stop(handle));
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}
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TEST_ESP_OK(adc_continuous_deinit(handle));
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free(result);
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}
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#endif //!CONFIG_IDF_TARGET_ESP32C3
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#if SOC_ADC_DIG_IIR_FILTER_SUPPORTED
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TEST_CASE("ADC filter exhausted allocation", "[adc_continuous]")
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{
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@ -93,7 +93,7 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
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switch (periph) {
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case PERIPH_SARADC_MODULE:
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return PCR_SARADC_RST_EN;
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return PCR_SARADC_REG_RST_EN;
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case PERIPH_RMT_MODULE:
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return PCR_RMT_RST_EN;
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case PERIPH_PCNT_MODULE:
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@ -106,7 +106,7 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
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switch (periph) {
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case PERIPH_SARADC_MODULE:
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return PCR_SARADC_RST_EN;
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return PCR_SARADC_REG_RST_EN;
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case PERIPH_RMT_MODULE:
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return PCR_RMT_RST_EN;
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case PERIPH_PCNT_MODULE:
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