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https://github.com/espressif/esp-idf.git
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SPI: Small fixes according to MR comments
This commit is contained in:
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@ -1,4 +1,4 @@
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// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD
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//
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// you may not use this file except in compliance with the License.
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@ -79,8 +79,8 @@ bool spicommon_periph_free(spi_host_device_t host);
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#define SPICOMMON_BUSFLAG_SLAVE 0 ///< Initialize I/O in slave mode
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#define SPICOMMON_BUSFLAG_SLAVE 0 ///< Initialize I/O in slave mode
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#define SPICOMMON_BUSFLAG_MASTER 1 ///< Initialize I/O in master mode
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#define SPICOMMON_BUSFLAG_MASTER (1<<0) ///< Initialize I/O in master mode
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#define SPICOMMON_BUSFLAG_QUAD 2 ///< Also initialize WP/HD pins, if specified
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#define SPICOMMON_BUSFLAG_QUAD (1<<1) ///< Also initialize WP/HD pins, if specified
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/**
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/**
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* @brief Connect a SPI peripheral to GPIO pins
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* @brief Connect a SPI peripheral to GPIO pins
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@ -93,13 +93,13 @@ bool spicommon_periph_free(spi_host_device_t host);
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* @param bus_config Pointer to a spi_bus_config struct detailing the GPIO pins
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* @param bus_config Pointer to a spi_bus_config struct detailing the GPIO pins
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* @param dma_chan DMA-channel (1 or 2) to use, or 0 for no DMA.
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* @param dma_chan DMA-channel (1 or 2) to use, or 0 for no DMA.
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* @param flags Combination of SPICOMMON_BUSFLAG_* flags
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* @param flags Combination of SPICOMMON_BUSFLAG_* flags
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* @param is_native A value of 'true' will be written to this address if the GPIOs can be
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* @param[out] is_native A value of 'true' will be written to this address if the GPIOs can be
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* routed using the IO_mux, 'false' if the GPIO matrix is used.
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* routed using the IO_mux, 'false' if the GPIO matrix is used.
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* @return
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* @return
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* - ESP_ERR_INVALID_ARG if parameter is invalid
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* - ESP_ERR_INVALID_ARG if parameter is invalid
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* - ESP_OK on success
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* - ESP_OK on success
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*/
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*/
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esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, spi_bus_config_t *bus_config, int dma_chan, int flags, bool *is_native);
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esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_config_t *bus_config, int dma_chan, int flags, bool *is_native);
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/**
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/**
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* @brief Free the IO used by a SPI peripheral
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* @brief Free the IO used by a SPI peripheral
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@ -170,7 +170,7 @@ int spicommon_irqsource_for_host(spi_host_device_t host);
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/**
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/**
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* @note V0 and V1 of the ESP32 silicon has a bug where in some (well-known) cases a SPI DMA channel will get confused. This can be remedied
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* @note In some (well-defined) cases in the ESP32 (at least rev v.0 and v.1), a SPI DMA channel will get confused. This can be remedied
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* by resetting the SPI DMA hardware in case this happens. Unfortunately, the reset knob used for thsi will reset _both_ DMA channels, and
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* by resetting the SPI DMA hardware in case this happens. Unfortunately, the reset knob used for thsi will reset _both_ DMA channels, and
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* as such can only done safely when both DMA channels are idle. These functions coordinate this.
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* as such can only done safely when both DMA channels are idle. These functions coordinate this.
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*
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*
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@ -190,7 +190,7 @@ typedef void(*dmaworkaround_cb_t)(void *arg);
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/**
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/**
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* @brief Request a reset for a certain DMA channel
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* @brief Request a reset for a certain DMA channel
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*
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*
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* @param host The SPI host
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* @param dmachan DMA channel associated with the SPI host that needs a reset
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* @param cb Callback to call in case DMA channel cannot be reset immediately
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* @param cb Callback to call in case DMA channel cannot be reset immediately
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* @param arg Argument to the callback
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* @param arg Argument to the callback
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*
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*
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@ -1,4 +1,4 @@
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// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD
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//
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// you may not use this file except in compliance with the License.
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@ -31,7 +31,6 @@ extern "C"
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#define SPI_SLAVE_TXBIT_LSBFIRST (1<<0) ///< Transmit command/address/data LSB first instead of the default MSB first
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#define SPI_SLAVE_TXBIT_LSBFIRST (1<<0) ///< Transmit command/address/data LSB first instead of the default MSB first
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#define SPI_SLAVE_RXBIT_LSBFIRST (1<<1) ///< Receive data LSB first instead of the default MSB first
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#define SPI_SLAVE_RXBIT_LSBFIRST (1<<1) ///< Receive data LSB first instead of the default MSB first
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#define SPI_SLAVE_BIT_LSBFIRST (SPI_TXBIT_LSBFIRST|SPI_RXBIT_LSBFIRST); ///< Transmit and receive LSB first
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#define SPI_SLAVE_BIT_LSBFIRST (SPI_TXBIT_LSBFIRST|SPI_RXBIT_LSBFIRST); ///< Transmit and receive LSB first
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#define SPI_SLAVE_POSITIVE_CS (1<<3) ///< Make CS positive during a transaction instead of negative
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typedef struct spi_slave_transaction_t spi_slave_transaction_t;
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typedef struct spi_slave_transaction_t spi_slave_transaction_t;
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@ -41,9 +40,9 @@ typedef void(*slave_transaction_cb_t)(spi_slave_transaction_t *trans);
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* @brief This is a configuration for a SPI host acting as a slave device.
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* @brief This is a configuration for a SPI host acting as a slave device.
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*/
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*/
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typedef struct {
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typedef struct {
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int spics_io_num; ///< CS GPIO pin for this device, or -1 if not used
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int spics_io_num; ///< CS GPIO pin for this device
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uint32_t flags; ///< Bitwise OR of SPI_DEVICE_* flags
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uint32_t flags; ///< Bitwise OR of SPI_SLAVE_* flags
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int queue_size; ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_device_queue_trans but not yet finished using spi_device_get_trans_result) at the same time
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int queue_size; ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_slave_queue_trans but not yet finished using spi_slave_get_trans_result) at the same time
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uint8_t mode; ///< SPI mode (0-3)
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uint8_t mode; ///< SPI mode (0-3)
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slave_transaction_cb_t post_setup_cb; ///< Callback called after the SPI registers are loaded with new data
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slave_transaction_cb_t post_setup_cb; ///< Callback called after the SPI registers are loaded with new data
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slave_transaction_cb_t post_trans_cb; ///< Callback called after a transaction is done
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slave_transaction_cb_t post_trans_cb; ///< Callback called after a transaction is done
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@ -56,6 +55,7 @@ struct spi_slave_transaction_t {
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size_t length; ///< Total data length, in bits
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size_t length; ///< Total data length, in bits
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const void *tx_buffer; ///< Pointer to transmit buffer, or NULL for no MOSI phase
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const void *tx_buffer; ///< Pointer to transmit buffer, or NULL for no MOSI phase
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void *rx_buffer; ///< Pointer to receive buffer, or NULL for no MISO phase
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void *rx_buffer; ///< Pointer to receive buffer, or NULL for no MISO phase
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void *user; ///< User-defined variable. Can be used to store eg transaction ID.
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};
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};
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/**
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/**
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@ -75,7 +75,7 @@ struct spi_slave_transaction_t {
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* - ESP_ERR_NO_MEM if out of memory
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* - ESP_ERR_NO_MEM if out of memory
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* - ESP_OK on success
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* - ESP_OK on success
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*/
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*/
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esp_err_t spi_slave_initialize(spi_host_device_t host, spi_bus_config_t *bus_config, spi_slave_interface_config_t *slave_config, int dma_chan);
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esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *bus_config, const spi_slave_interface_config_t *slave_config, int dma_chan);
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/**
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/**
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* @brief Free a SPI bus claimed as a SPI slave interface
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* @brief Free a SPI bus claimed as a SPI slave interface
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@ -97,26 +97,27 @@ esp_err_t spi_slave_free(spi_host_device_t host);
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* unhandled transactions before it and the master initiates a SPI transaction by pulling down CS and sending out
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* unhandled transactions before it and the master initiates a SPI transaction by pulling down CS and sending out
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* clock signals.
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* clock signals.
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*
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*
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* @param handle Device handle obtained using spi_host_add_dev
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* @param host SPI peripheral that is acting as a slave
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* @param trans_desc Description of transaction to execute
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* @param trans_desc Description of transaction to execute. Not const because we may want to write status back
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* into the transaction description.
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* @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
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* @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
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* never time out.
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* never time out.
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* @return
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* @return
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* - ESP_ERR_INVALID_ARG if parameter is invalid
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* - ESP_ERR_INVALID_ARG if parameter is invalid
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* - ESP_OK on success
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* - ESP_OK on success
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*/
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*/
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esp_err_t spi_slave_queue_trans(spi_host_device_t host, spi_slave_transaction_t *trans_desc, TickType_t ticks_to_wait);
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esp_err_t spi_slave_queue_trans(spi_host_device_t host, const spi_slave_transaction_t *trans_desc, TickType_t ticks_to_wait);
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/**
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/**
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* @brief Get the result of a SPI transaction queued earlier
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* @brief Get the result of a SPI transaction queued earlier
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*
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*
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* This routine will wait until a transaction to the given device (queued earlier with
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* This routine will wait until a transaction to the given device (queued earlier with
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* spi_device_queue_trans) has succesfully completed. It will then return the description of the
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* spi_slave_queue_trans) has succesfully completed. It will then return the description of the
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* completed transaction so software can inspect the result and e.g. free the memory or
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* completed transaction so software can inspect the result and e.g. free the memory or
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* re-use the buffers.
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* re-use the buffers.
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*
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*
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* @param handle Device handle obtained using spi_host_add_dev
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* @param host SPI peripheral to that is acting as a slave
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* @param trans_desc Pointer to variable able to contain a pointer to the description of the
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* @param trans_desc Pointer to variable able to contain a pointer to the description of the
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* transaction that is executed
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* transaction that is executed
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* @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
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* @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
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@ -131,13 +132,14 @@ esp_err_t spi_slave_get_trans_result(spi_host_device_t host, spi_slave_transacti
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/**
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/**
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* @brief Do a SPI transaction
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* @brief Do a SPI transaction
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*
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*
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* Essentially does the same as spi_device_queue_trans followed by spi_device_get_trans_result. Do
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* Essentially does the same as spi_slave_queue_trans followed by spi_slave_get_trans_result. Do
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* not use this when there is still a transaction queued that hasn't been finalized
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* not use this when there is still a transaction queued that hasn't been finalized
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* using spi_device_get_trans_result.
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* using spi_slave_get_trans_result.
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*
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*
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* @param handle Device handle obtained using spi_host_add_dev
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* @param host SPI peripheral to that is acting as a slave
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* @param trans_desc Pointer to variable able to contain a pointer to the description of the
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* @param trans_desc Pointer to variable able to contain a pointer to the description of the
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* transaction that is executed
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* transaction that is executed. Not const because we may want to write status back
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* into the transaction description.
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* @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
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* @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
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* out.
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* out.
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* @return
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* @return
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@ -19,7 +19,6 @@
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#include "soc/spi_reg.h"
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#include "soc/spi_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/spi_struct.h"
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#include "soc/spi_struct.h"
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#include "soc/rtc_cntl_reg.h"
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#include "rom/ets_sys.h"
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#include "rom/ets_sys.h"
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#include "esp_types.h"
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#include "esp_types.h"
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#include "esp_attr.h"
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#include "esp_attr.h"
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@ -27,16 +26,9 @@
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#include "esp_intr_alloc.h"
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#include "esp_intr_alloc.h"
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#include "esp_log.h"
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#include "esp_log.h"
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#include "esp_err.h"
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#include "esp_err.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/task.h"
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#include "freertos/ringbuf.h"
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#include "soc/soc.h"
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#include "soc/soc.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/uart_struct.h"
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#include "rom/lldesc.h"
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#include "rom/lldesc.h"
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#include "driver/uart.h"
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#include "driver/gpio.h"
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#include "driver/gpio.h"
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#include "driver/periph_ctrl.h"
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#include "driver/periph_ctrl.h"
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#include "esp_heap_alloc_caps.h"
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#include "esp_heap_alloc_caps.h"
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@ -189,7 +181,7 @@ Do the common stuff to hook up a SPI host to a bus defined by a bunch of GPIO pi
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bus config struct and it'll set up the GPIO matrix and enable the device. It will set is_native to 1 if the bus
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bus config struct and it'll set up the GPIO matrix and enable the device. It will set is_native to 1 if the bus
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config can be done using the IOMUX instead of using the GPIO matrix.
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config can be done using the IOMUX instead of using the GPIO matrix.
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*/
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*/
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esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, spi_bus_config_t *bus_config, int dma_chan, int flags, bool *is_native)
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esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_config_t *bus_config, int dma_chan, int flags, bool *is_native)
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{
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{
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bool native=true;
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bool native=true;
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bool is_master=(flags&SPICOMMON_BUSFLAG_MASTER)?true:false;
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bool is_master=(flags&SPICOMMON_BUSFLAG_MASTER)?true:false;
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@ -40,7 +40,6 @@ queue and re-enabling the interrupt will trigger the interrupt again, which can
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#include "soc/spi_reg.h"
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#include "soc/spi_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/spi_struct.h"
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#include "soc/spi_struct.h"
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#include "soc/rtc_cntl_reg.h"
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#include "rom/ets_sys.h"
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#include "rom/ets_sys.h"
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#include "esp_types.h"
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#include "esp_types.h"
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#include "esp_attr.h"
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#include "esp_attr.h"
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@ -55,9 +54,7 @@ queue and re-enabling the interrupt will trigger the interrupt again, which can
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#include "freertos/ringbuf.h"
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#include "freertos/ringbuf.h"
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#include "soc/soc.h"
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#include "soc/soc.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/uart_struct.h"
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#include "rom/lldesc.h"
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#include "rom/lldesc.h"
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#include "driver/uart.h"
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#include "driver/gpio.h"
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#include "driver/gpio.h"
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#include "driver/periph_ctrl.h"
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#include "driver/periph_ctrl.h"
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#include "esp_heap_alloc_caps.h"
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#include "esp_heap_alloc_caps.h"
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#include "soc/spi_reg.h"
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#include "soc/spi_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/spi_struct.h"
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#include "soc/spi_struct.h"
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#include "soc/rtc_cntl_reg.h"
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#include "rom/ets_sys.h"
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#include "rom/ets_sys.h"
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#include "esp_types.h"
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#include "esp_types.h"
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#include "esp_attr.h"
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#include "esp_attr.h"
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@ -34,9 +33,7 @@
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#include "freertos/ringbuf.h"
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#include "freertos/ringbuf.h"
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#include "soc/soc.h"
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#include "soc/soc.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/uart_struct.h"
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#include "rom/lldesc.h"
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#include "rom/lldesc.h"
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#include "driver/uart.h"
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#include "driver/gpio.h"
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#include "driver/gpio.h"
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#include "driver/periph_ctrl.h"
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#include "driver/periph_ctrl.h"
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#include "esp_heap_alloc_caps.h"
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#include "esp_heap_alloc_caps.h"
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@ -48,7 +45,7 @@ static const char *SPI_TAG = "spi_slave";
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return (ret_val); \
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return (ret_val); \
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}
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}
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#define VALID_HOST(x) (host>SPI_HOST && host<=VSPI_HOST)
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#define VALID_HOST(x) (x>SPI_HOST && x<=VSPI_HOST)
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typedef struct {
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typedef struct {
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spi_slave_interface_config_t cfg;
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spi_slave_interface_config_t cfg;
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@ -68,7 +65,7 @@ static spi_slave_t *spihost[3];
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static void IRAM_ATTR spi_intr(void *arg);
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static void IRAM_ATTR spi_intr(void *arg);
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esp_err_t spi_slave_initialize(spi_host_device_t host, spi_bus_config_t *bus_config, spi_slave_interface_config_t *slave_config, int dma_chan)
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esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *bus_config, const spi_slave_interface_config_t *slave_config, int dma_chan)
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{
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{
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bool native, claimed;
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bool native, claimed;
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//We only support HSPI/VSPI, period.
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//We only support HSPI/VSPI, period.
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@ -200,7 +197,7 @@ esp_err_t spi_slave_free(spi_host_device_t host)
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}
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}
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esp_err_t spi_slave_queue_trans(spi_host_device_t host, spi_slave_transaction_t *trans_desc, TickType_t ticks_to_wait)
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esp_err_t spi_slave_queue_trans(spi_host_device_t host, const spi_slave_transaction_t *trans_desc, TickType_t ticks_to_wait)
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||||||
{
|
{
|
||||||
BaseType_t r;
|
BaseType_t r;
|
||||||
SPI_CHECK(VALID_HOST(host), "invalid host", ESP_ERR_INVALID_ARG);
|
SPI_CHECK(VALID_HOST(host), "invalid host", ESP_ERR_INVALID_ARG);
|
||||||
@ -368,7 +365,7 @@ static void IRAM_ATTR spi_intr(void *arg)
|
|||||||
host->hw->user.usr_miso_highpart=0;
|
host->hw->user.usr_miso_highpart=0;
|
||||||
host->hw->user.usr_mosi_highpart=0;
|
host->hw->user.usr_mosi_highpart=0;
|
||||||
if (trans->tx_buffer) {
|
if (trans->tx_buffer) {
|
||||||
uint32_t *data=host->cur_trans->tx_buffer;
|
const uint32_t *data=host->cur_trans->tx_buffer;
|
||||||
for (int x=0; x<trans->length; x+=32) {
|
for (int x=0; x<trans->length; x+=32) {
|
||||||
uint32_t word;
|
uint32_t word;
|
||||||
memcpy(&word, &data[x/32], 4);
|
memcpy(&word, &data[x/32], 4);
|
||||||
|
@ -47,7 +47,7 @@ starts sending out clock pulses on the CLK line: every clock pulse causes a data
|
|||||||
the master to the slave on the MOSI line and vice versa on the MISO line. At the end of the transaction,
|
the master to the slave on the MOSI line and vice versa on the MISO line. At the end of the transaction,
|
||||||
the master makes CS high again.
|
the master makes CS high again.
|
||||||
|
|
||||||
Using the spi_master driver
|
Using the spi_slave driver
|
||||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||||
|
|
||||||
- Initialize a SPI peripheral as a slave by calling ``spi_slave_initialize``. Make sure to set the
|
- Initialize a SPI peripheral as a slave by calling ``spi_slave_initialize``. Make sure to set the
|
||||||
@ -79,9 +79,9 @@ case the length of the transmission is larger than the buffer length, only the s
|
|||||||
will be sent and received. In case the transmission length is shorter than the buffer length, only data up
|
will be sent and received. In case the transmission length is shorter than the buffer length, only data up
|
||||||
to the length of the buffer will be exchanged.
|
to the length of the buffer will be exchanged.
|
||||||
|
|
||||||
Warning: Due to a design peculiarity in the V0 and V1 silicon of the ESP32, if the amount of bytes sent
|
Warning: Due to a design peculiarity in the ESP32, if the amount of bytes sent by the master or the length
|
||||||
by the master or the length of the transmission sent to the slave driver is not both larger than eight and
|
of the transmission queues in the slave driver, in bytes, is not both larger than eight and dividable by
|
||||||
dividable by four, the SPI hardware can fail to write the last one to seven bytes to the receive buffer.
|
four, the SPI hardware can fail to write the last one to seven bytes to the receive buffer.
|
||||||
|
|
||||||
|
|
||||||
Application Example
|
Application Example
|
||||||
|
@ -4,3 +4,19 @@ These two projects illustrate the SPI Slave driver. They're supposed to be flash
|
|||||||
eachother using the SPI pins defined in app_main.c. Once connected and flashed, they will use the spi master and spi slave
|
eachother using the SPI pins defined in app_main.c. Once connected and flashed, they will use the spi master and spi slave
|
||||||
driver to communicate with eachother. The example also includes a handshaking line to allow the master to only poll the
|
driver to communicate with eachother. The example also includes a handshaking line to allow the master to only poll the
|
||||||
slave when it is actually ready to parse a transaction.
|
slave when it is actually ready to parse a transaction.
|
||||||
|
|
||||||
|
Please run wires between the following GPIOs between the slave and master to make the example function:
|
||||||
|
|
||||||
|
========= ====== =======
|
||||||
|
Signal Slave Master
|
||||||
|
========= ====== =======
|
||||||
|
Handshake GPIO2 GPIO2
|
||||||
|
MOSI GPIO12 GPIO12
|
||||||
|
MISO GPIO13 GPIO13
|
||||||
|
SCLK GPIO15 GPIO15
|
||||||
|
CS GPIO14 GPIO14
|
||||||
|
========= ====== =======
|
||||||
|
|
||||||
|
Be aware that the example by default uses lines normally reserved for JTAG. If this is an issue, either because of hardwired
|
||||||
|
JTAG hardware or because of the need to do JTAG debugging, feel free to change the GPIO settings by editing defines in the top
|
||||||
|
of main.c in the master/slave source code.
|
@ -3,7 +3,7 @@
|
|||||||
# project subdirectory.
|
# project subdirectory.
|
||||||
#
|
#
|
||||||
|
|
||||||
PROJECT_NAME := app-template
|
PROJECT_NAME := spi-slave-receiver
|
||||||
|
|
||||||
include $(IDF_PATH)/make/project.mk
|
include $(IDF_PATH)/make/project.mk
|
||||||
|
|
||||||
|
@ -3,7 +3,7 @@
|
|||||||
# project subdirectory.
|
# project subdirectory.
|
||||||
#
|
#
|
||||||
|
|
||||||
PROJECT_NAME := app-template
|
PROJECT_NAME := spi-slave-sender
|
||||||
|
|
||||||
include $(IDF_PATH)/make/project.mk
|
include $(IDF_PATH)/make/project.mk
|
||||||
|
|
||||||
|
@ -196,7 +196,7 @@ CONFIG_FATFS_MAX_LFN=255
|
|||||||
# CONFIG_FREERTOS_UNICORE is not set
|
# CONFIG_FREERTOS_UNICORE is not set
|
||||||
CONFIG_FREERTOS_CORETIMER_0=y
|
CONFIG_FREERTOS_CORETIMER_0=y
|
||||||
# CONFIG_FREERTOS_CORETIMER_1 is not set
|
# CONFIG_FREERTOS_CORETIMER_1 is not set
|
||||||
CONFIG_FREERTOS_HZ=100
|
CONFIG_FREERTOS_HZ=1000
|
||||||
CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y
|
CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y
|
||||||
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
|
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
|
||||||
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
|
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
|
||||||
|
Loading…
x
Reference in New Issue
Block a user