From 7c8a43ffc2d66145114734fde1740ca5d8477b81 Mon Sep 17 00:00:00 2001 From: "nilesh.kale" Date: Fri, 31 May 2024 11:33:18 +0530 Subject: [PATCH] fix(hal): update ECDSA API to set register values correctly for ESP32C5 This commit updates the ECDSA API to enable and clear interrupts by setting the respective registers correctly for the ESP32C5. --- components/hal/esp32c5/include/hal/ecdsa_ll.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/components/hal/esp32c5/include/hal/ecdsa_ll.h b/components/hal/esp32c5/include/hal/ecdsa_ll.h index e88ffb0d0e..a1cbc2f75d 100644 --- a/components/hal/esp32c5/include/hal/ecdsa_ll.h +++ b/components/hal/esp32c5/include/hal/ecdsa_ll.h @@ -113,9 +113,9 @@ static inline void ecdsa_ll_enable_intr(ecdsa_ll_intr_type_t type) switch (type) { case ECDSA_INT_CALC_DONE: #if !CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION - REG_SET_FIELD(ECDSA_INT_ENA_REG, ECDSA_PREP_DONE_INT_ENA, 0); + REG_SET_FIELD(ECDSA_INT_ENA_REG, ECDSA_PREP_DONE_INT_ENA, 1); #else - REG_SET_FIELD(ECDSA_INT_ENA_REG, ECDSA_CALC_DONE_INT_ENA, 0); + REG_SET_FIELD(ECDSA_INT_ENA_REG, ECDSA_CALC_DONE_INT_ENA, 1); #endif break; case ECDSA_INT_SHA_RELEASE: @@ -161,9 +161,9 @@ static inline void ecdsa_ll_clear_intr(ecdsa_ll_intr_type_t type) switch (type) { case ECDSA_INT_CALC_DONE: #if !CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION - REG_SET_FIELD(ECDSA_INT_ENA_REG, ECDSA_PREP_DONE_INT_CLR, 0); + REG_SET_FIELD(ECDSA_INT_ENA_REG, ECDSA_PREP_DONE_INT_CLR, 1); #else - REG_SET_FIELD(ECDSA_INT_ENA_REG, ECDSA_CALC_DONE_INT_CLR, 0); + REG_SET_FIELD(ECDSA_INT_ENA_REG, ECDSA_CALC_DONE_INT_CLR, 1); #endif break; case ECDSA_INT_SHA_RELEASE: