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Merge branch 'bugfix/fix_s3_bbpll_cali_fail_bug_v5.1' into 'release/v5.1'
fix: fix s3 bbpll calibration fail bug (v5.1) See merge request espressif/esp-idf!29645
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commit
4885b77b47
@ -308,7 +308,7 @@ static inline __attribute__((always_inline)) void clk_ll_bbpll_set_config(uint32
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uint8_t dr3;
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uint8_t dchgp;
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uint8_t dcur;
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uint8_t dbias;
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uint8_t dbias = 3;
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if (pll_freq_mhz == CLK_LL_PLL_480M_FREQ_MHZ) {
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/* Configure 480M PLL */
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@ -320,7 +320,6 @@ static inline __attribute__((always_inline)) void clk_ll_bbpll_set_config(uint32
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dr3 = 0;
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dchgp = 5;
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dcur = 3;
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dbias = 2;
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break;
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case RTC_XTAL_FREQ_32M:
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div_ref = 1;
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@ -329,7 +328,6 @@ static inline __attribute__((always_inline)) void clk_ll_bbpll_set_config(uint32
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dr3 = 1;
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dchgp = 4;
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dcur = 0;
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dbias = 2;
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break;
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default:
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div_ref = 0;
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@ -338,7 +336,6 @@ static inline __attribute__((always_inline)) void clk_ll_bbpll_set_config(uint32
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dr3 = 0;
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dchgp = 5;
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dcur = 3;
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dbias = 2;
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break;
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}
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REGI2C_WRITE(I2C_BBPLL, I2C_BBPLL_MODE_HF, 0x6B);
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@ -352,7 +349,6 @@ static inline __attribute__((always_inline)) void clk_ll_bbpll_set_config(uint32
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dr3 = 0;
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dchgp = 5;
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dcur = 3;
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dbias = 2;
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break;
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case RTC_XTAL_FREQ_32M:
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div_ref = 1;
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@ -361,7 +357,6 @@ static inline __attribute__((always_inline)) void clk_ll_bbpll_set_config(uint32
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dr3 = 0;
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dchgp = 5;
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dcur = 3;
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dbias = 2;
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break;
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default:
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div_ref = 0;
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@ -370,7 +365,6 @@ static inline __attribute__((always_inline)) void clk_ll_bbpll_set_config(uint32
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dr3 = 0;
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dchgp = 5;
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dcur = 3;
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dbias = 2;
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break;
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}
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REGI2C_WRITE(I2C_BBPLL, I2C_BBPLL_MODE_HF, 0x69);
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