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ci: Fix for ETSTimers arm & disarm run from IRAM UT

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- For ESP32 | SPIRAM_MALLOC_ALWAYSINTERNAL=0
- Forced `esp_timer_create` to allocate resource from the internal memory
- WiFi/BT coexistence will sometimes arm/disarm timers from an ISR
  where flash may be disabled. This can lead to a cache-based
  exception as the timer instance will be located in the PSRAM.
This commit is contained in:
Laukik Hase 2022-01-03 18:17:43 +05:30 committed by liuning
parent 8c1e87e0c8
commit 4800e9b3c4
1 changed files with 1 additions and 1 deletions
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2
components/esp_timer/src/esp_timer.c
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@ -121,7 +121,7 @@ esp_err_t esp_timer_create(const esp_timer_create_args_t* args,
args->dispatch_method < 0 || args->dispatch_method >= ESP_TIMER_MAX) {
return ESP_ERR_INVALID_ARG;
}
esp_timer_handle_t result = (esp_timer_handle_t) calloc(1, sizeof(*result));
esp_timer_handle_t result = (esp_timer_handle_t) heap_caps_calloc(1, sizeof(*result), MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL);
if (result == NULL) {
return ESP_ERR_NO_MEM;
}