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feat(pm): support ext1_wakeup/esp_deep_sleep_enable_gpio_wakeup for esp32c5mp deepsleep

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This commit is contained in:
Lou Tianhao 2024-07-18 18:11:14 +08:00
parent 04485a655f
commit 47a0677525
12 changed files with 33 additions and 27 deletions
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6
components/esp_hw_support/CMakeLists.txt
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@ -143,12 +143,6 @@ if(NOT BOOTLOADER_BUILD)
list(APPEND srcs "esp_clock_output.c") list(APPEND srcs "esp_clock_output.c")
endif() endif()
if(CONFIG_IDF_TARGET_ESP32C5)
list(REMOVE_ITEM srcs
"sleep_wake_stub.c" # TODO: [ESP32C5] IDF-8638
)
endif()
if(CONFIG_IDF_TARGET_ESP32C61) # TODO: [ESP32C61] IDF-9245, IDF-9247, IDF-9248 if(CONFIG_IDF_TARGET_ESP32C61) # TODO: [ESP32C61] IDF-9245, IDF-9247, IDF-9248
list(REMOVE_ITEM srcs list(REMOVE_ITEM srcs
"sleep_cpu.c" "sleep_cpu.c"

2
components/esp_hw_support/sleep_modes.c
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@ -454,7 +454,7 @@ void esp_deep_sleep_deregister_hook(esp_deep_sleep_cb_t old_dslp_cb)
s_sleep_hook_deregister(old_dslp_cb, s_dslp_cb); s_sleep_hook_deregister(old_dslp_cb, s_dslp_cb);
} }
#if CONFIG_ESP_PHY_ENABLED #if CONFIG_ESP_PHY_ENABLED && SOC_DEEP_SLEEP_SUPPORTED
esp_err_t esp_deep_sleep_register_phy_hook(esp_deep_sleep_cb_t new_dslp_cb) esp_err_t esp_deep_sleep_register_phy_hook(esp_deep_sleep_cb_t new_dslp_cb)
{ {
return s_sleep_hook_register(new_dslp_cb, s_dslp_phy_cb); return s_sleep_hook_register(new_dslp_cb, s_dslp_phy_cb);

4
components/esp_phy/src/phy_init.c
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@ -895,11 +895,11 @@ void esp_phy_load_cal_and_init(void)
#else #else
esp_phy_release_init_data(init_data); esp_phy_release_init_data(init_data);
#endif #endif
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638 #if CONFIG_ESP_PHY_ENABLED && SOC_DEEP_SLEEP_SUPPORTED
ESP_ERROR_CHECK(esp_deep_sleep_register_phy_hook(&phy_close_rf)); ESP_ERROR_CHECK(esp_deep_sleep_register_phy_hook(&phy_close_rf));
#endif #endif
#if !CONFIG_IDF_TARGET_ESP32 #if !CONFIG_IDF_TARGET_ESP32
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638 #if CONFIG_ESP_PHY_ENABLED && SOC_DEEP_SLEEP_SUPPORTED
ESP_ERROR_CHECK(esp_deep_sleep_register_phy_hook(&phy_xpd_tsens)); ESP_ERROR_CHECK(esp_deep_sleep_register_phy_hook(&phy_xpd_tsens));
#endif #endif
#endif #endif

2
components/esp_system/port/cpu_start.c
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@ -732,7 +732,7 @@ void IRAM_ATTR call_start_cpu0(void)
#endif #endif
#endif #endif
#if SOC_DEEP_SLEEP_SUPPORTED //TODO: IDF-8638, IDF-9245 #if SOC_DEEP_SLEEP_SUPPORTED //TODO: IDF-9245
// Need to unhold the IOs that were hold right before entering deep sleep, which are used as wakeup pins // Need to unhold the IOs that were hold right before entering deep sleep, which are used as wakeup pins
if (rst_reas[0] == RESET_REASON_CORE_DEEP_SLEEP) { if (rst_reas[0] == RESET_REASON_CORE_DEEP_SLEEP) {
esp_deep_sleep_wakeup_io_reset(); esp_deep_sleep_wakeup_io_reset();

12
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
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@ -223,6 +223,10 @@ config SOC_LIGHT_SLEEP_SUPPORTED
bool bool
default y default y
config SOC_DEEP_SLEEP_SUPPORTED
bool
default y
config SOC_PM_SUPPORTED config SOC_PM_SUPPORTED
bool bool
default y default y
@ -1203,6 +1207,14 @@ config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
int int
default 12 default 12
config SOC_PM_SUPPORT_EXT1_WAKEUP
bool
default y
config SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN
bool
default y
config SOC_PM_SUPPORT_CPU_PD config SOC_PM_SUPPORT_CPU_PD
bool bool
default y default y

6
components/soc/esp32c5/include/soc/soc_caps.h
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@ -75,9 +75,9 @@
#define SOC_RNG_SUPPORTED 1 #define SOC_RNG_SUPPORTED 1
// #define SOC_KEY_MANAGER_SUPPORTED 1 // TODO: [ESP32C5] IDF-8621 // #define SOC_KEY_MANAGER_SUPPORTED 1 // TODO: [ESP32C5] IDF-8621
// #define SOC_HUK_SUPPORTED 1 // TODO: [ESP32C5] IDF-8617 // #define SOC_HUK_SUPPORTED 1 // TODO: [ESP32C5] IDF-8617
// #define SOC_DEEP_SLEEP_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638
#define SOC_MODEM_CLOCK_SUPPORTED 1 #define SOC_MODEM_CLOCK_SUPPORTED 1
#define SOC_LIGHT_SLEEP_SUPPORTED 1 #define SOC_LIGHT_SLEEP_SUPPORTED 1
#define SOC_DEEP_SLEEP_SUPPORTED 1
#define SOC_PM_SUPPORTED 1 #define SOC_PM_SUPPORTED 1
#define SOC_SPIRAM_SUPPORTED 1 #define SOC_SPIRAM_SUPPORTED 1
@ -539,8 +539,8 @@
// #define SOC_PM_SUPPORT_WIFI_WAKEUP (1) // #define SOC_PM_SUPPORT_WIFI_WAKEUP (1)
// #define SOC_PM_SUPPORT_BEACON_WAKEUP (1) // #define SOC_PM_SUPPORT_BEACON_WAKEUP (1)
// #define SOC_PM_SUPPORT_BT_WAKEUP (1) // #define SOC_PM_SUPPORT_BT_WAKEUP (1)
// #define SOC_PM_SUPPORT_EXT1_WAKEUP (1) #define SOC_PM_SUPPORT_EXT1_WAKEUP (1)
// #define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */ #define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */
#define SOC_PM_SUPPORT_CPU_PD (1) #define SOC_PM_SUPPORT_CPU_PD (1)
#define SOC_PM_SUPPORT_MODEM_PD (1) #define SOC_PM_SUPPORT_MODEM_PD (1)
#define SOC_PM_SUPPORT_XTAL32K_PD (1) #define SOC_PM_SUPPORT_XTAL32K_PD (1)

4
examples/system/deep_sleep/README.md
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@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
# Deep Sleep Example # Deep Sleep Example

8
examples/system/deep_sleep/main/Kconfig.projbuild
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@ -40,7 +40,7 @@ menu "Example Configuration"
depends on !IDF_TARGET_ESP32 depends on !IDF_TARGET_ESP32
default 2 if !IDF_TARGET_ESP32H2 default 2 if !IDF_TARGET_ESP32H2
default 10 if IDF_TARGET_ESP32H2 default 10 if IDF_TARGET_ESP32H2
range 0 7 if IDF_TARGET_ESP32C6 range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
range 7 14 if IDF_TARGET_ESP32H2 range 7 14 if IDF_TARGET_ESP32H2
range 0 21 if IDF_TARGET_ESP32S2 range 0 21 if IDF_TARGET_ESP32S2
range 0 21 if IDF_TARGET_ESP32S3 range 0 21 if IDF_TARGET_ESP32S3
@ -115,7 +115,7 @@ menu "Example Configuration"
depends on !IDF_TARGET_ESP32 depends on !IDF_TARGET_ESP32
default 4 if !IDF_TARGET_ESP32H2 default 4 if !IDF_TARGET_ESP32H2
default 11 if IDF_TARGET_ESP32H2 default 11 if IDF_TARGET_ESP32H2
range 0 7 if IDF_TARGET_ESP32C6 range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
range 7 14 if IDF_TARGET_ESP32H2 range 7 14 if IDF_TARGET_ESP32H2
range 0 21 if IDF_TARGET_ESP32S2 range 0 21 if IDF_TARGET_ESP32S2
range 0 21 if IDF_TARGET_ESP32S3 range 0 21 if IDF_TARGET_ESP32S3
@ -269,9 +269,9 @@ menu "Example Configuration"
config EXAMPLE_GPIO_WAKEUP_PIN config EXAMPLE_GPIO_WAKEUP_PIN
int "Enable wakeup from GPIO" int "Enable wakeup from GPIO"
default 0 default 0
range 0 7 if IDF_TARGET_ESP32C6 range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
range 0 15 if IDF_TARGET_ESP32P4 range 0 15 if IDF_TARGET_ESP32P4
range 0 5 if !IDF_TARGET_ESP32C6 range 0 5 if !IDF_TARGET_ESP32C6 && !IDF_TARGET_ESP32C5
config EXAMPLE_GPIO_WAKEUP_HIGH_LEVEL config EXAMPLE_GPIO_WAKEUP_HIGH_LEVEL
bool "Enable GPIO high-level wakeup" bool "Enable GPIO high-level wakeup"

4
examples/system/ulp/lp_core/gpio/README.md
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@ -1,5 +1,5 @@
| Supported Targets | ESP32-C6 | ESP32-P4 | | Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
| ----------------- | -------- | -------- | | ----------------- | -------- | -------- | -------- |
# LP Core simple example with GPIO Polling: # LP Core simple example with GPIO Polling:

4
examples/system/ulp/lp_core/gpio_intr_pulse_counter/README.md
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@ -1,5 +1,5 @@
| Supported Targets | ESP32-C6 | ESP32-P4 | | Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
| ----------------- | -------- | -------- | | ----------------- | -------- | -------- | -------- |
# LP Core Pulse Counting Example # LP Core Pulse Counting Example

4
examples/system/ulp/lp_core/lp_uart/lp_uart_echo/README.md
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@ -1,5 +1,5 @@
| Supported Targets | ESP32-C6 | ESP32-P4 | | Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
| ----------------- | -------- | -------- | | ----------------- | -------- | -------- | -------- |
# LP UART Echo Example # LP UART Echo Example

4
examples/system/ulp/lp_core/lp_uart/lp_uart_print/README.md
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@ -1,5 +1,5 @@
| Supported Targets | ESP32-C6 | ESP32-P4 | | Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
| ----------------- | -------- | -------- | | ----------------- | -------- | -------- | -------- |
# LP UART Print Example # LP UART Print Example