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esp32c3: correct name for RTC memory region in heap

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This commit is contained in:
Mahavir Jain 2021-03-18 17:48:31 +05:30
parent 6cfef8ce93
commit 4725249385
1 changed files with 2 additions and 1 deletions
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3
components/soc/esp32c3/soc_memory_layout.c
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@ -42,7 +42,8 @@ const soc_memory_type_desc_t soc_memory_types[] = {
{ "D/IRAM", { 0, MALLOC_CAP_DMA | MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL | MALLOC_CAP_DEFAULT, MALLOC_CAP_32BIT | MALLOC_CAP_EXEC }, true, false},
// Type 3: IRAM
{ "IRAM", { MALLOC_CAP_EXEC | MALLOC_CAP_32BIT | MALLOC_CAP_INTERNAL, 0, 0 }, false, false},
{ "FAKEDRAM", { MALLOC_CAP_8BIT|MALLOC_CAP_DEFAULT, MALLOC_CAP_INTERNAL|MALLOC_CAP_32BIT, 0 }, false, false},
// Type 4: RTCRAM
{ "RTCRAM", { MALLOC_CAP_8BIT|MALLOC_CAP_DEFAULT, MALLOC_CAP_INTERNAL|MALLOC_CAP_32BIT, 0 }, false, false},
};
#ifdef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE